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Электронный компонент: MB88346BP

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1
DS04-13501-2E
FUJITSU SEMICONDUCTOR
DATA SHEET
LINEAR IC
R-2R TYPE 8-BIT D/A CONVERTER WITH
OPERATIONAL AMPLIFIER OUTPUT BUFFERS
MB88346B
s
DESCRIPTION
The Fujitsu MB88346B is an R-2R type 8-bit resolution digital-to-analog
converter (DAC), designed for interface with a wide range of general 4-
bit and 8-bit microcontrollers including Fujitsu's MB88200 family,
MB8850 family, and MB88500 family 4-bit single-chip microcontrollers.
The MB88346B has an 8-bit x 12-channel D/A converter with operational
amplifier output buffers. Digital data are input serially by individual chan-
nel units. The loaded digital data are converted into analog DC voltages
by the D/A converter in 20
s settling time. Also, the MB88346B has
operational amplifier output buffers. These operational amplifier output
buffers are connected to each channel of the D/A converter, and provide
high current drive capability. The MB88346B is suitable for electronic
volumes and replacement for potentiometers for adjustment, in addition
to normal D/A converter applications.
s
FEATURES
Conversion method : R-2R resistor ladder
8-bit x 12-channel D/A converter with operational amplifier output
buffers
Max. 2.5MHz Serial data input
Serial data output for cascade connection
Max. 20
s DAC output settling time
Max. +1.0/-1.0 mA analog output sink/source current
Two separate power supply/ground lines for MCU interface block/
operational amplifier output buffer block and D/A converter block
Pin compatible with MB88341
Single +5V power supply
Wide operating temperature range: -20
C to +85
C
Silicon-gate CMOS process
Three package options :
20-pin plastic DIP (Suffix : -P), 20-pin plastic SOP (Suffix : -PF),
20-pin plastic SSOP(Suffix : -PFV)
This device contains circuitry to protect the inputs against damage
due to high static voltages or electric fields. However, it is advised
that normal precautions be taken to avoid application of any voltage
higher than maximum rated voltages to this high impedance circuit.
(DIP-20P-M02)
MB88346B-P
PLASTIC DIP
MB88346B-PF
(FPT-20P-M01)
PLASTIC SOP
MB88346B-PFV
(FPT-20P-M03)
PLASTIC SSOP
2
MB88346B
s
PIN ASSIGNMENT
Vss
AO3
AO4
AO5
AO6
AO7
AO8
AO9
AO10
V
DD
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
GND
AO2
AO1
DI
CLK
LD
DO
AO12
AO11
Vcc
Vss
AO3
AO4
AO5
AO6
AO7
AO8
AO9
AO10
V
DD
GND
AO2
AO1
DI
CLK
LD
DO
AO12
AO11
Vcc
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
MB88346B-P
MB88346B-PF
(Top View)
(Top View)
Vss
AO3
AO4
AO5
AO6
AO7
AO8
AO9
AO10
V
DD
GND
AO2
AO1
DI
CLK
LD
DO
AO12
AO11
Vcc
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
MB88346B-PFV
(Top View)
+5V
+5V
AO1 - AO12
DO
DI
LD
CLK
V
DD
Vcc
GND Vss
Figure 1 Logic Symbol
MB88346B
DAC Output
Data Input
Load Strobe Input
Shift Clock Input
12
Data Output
3
MB88346B
s
BLOCK DIAGRAM
D7
D7
D6
D1
D0
LD
DO
12-bit Shift Register
Vcc
GND
DI
CLK
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
8
12
8-bit Data Latch
#1
1 2 3 4
12
4-bit Address Decoder
Vss*
V
DD
*
AO12
AO1
R-2R Type 8-bit
D/A Converter
#1
Analog Block (D/A Converter with operational
amplifier output buffers)
Digital Block (MCU Interface)
10 11
D6
D1
D0
8-bit Data Latch
#12
R-2R Type 8-bit
D/A Converter
#12
+
-
+
-
* : Only for D/A converter block except operational amplifier block
4
MB88346B
s
PIN DESCRIPTION
PIN ASSIGNMENT and Tableshow the pin assignment and pin description of the MB88346B.
Table 1 Pin Description
Symbol
Pin No.
Type
Name & Function
Power Supply
V
CC
11
-
+5V DC power supply pin for the digital block (MCU interface) and operational
amplifier output buffers.
GND
20
-
Ground pin for the digital block (MCU interface) and operational amplifier out-
put buffers.
V
DD
10
-
DC power supply pin for the analog block (D/A converter) except operational
amplifier output buffers.
V
SS
1
-
Ground pin for the analog block (D/A converter) except operational amplifier
output buffers.
Control Input
CLK
16
I
Shift clock input to the internal 12-bit shift register: At the rising edge of CLK
data on the DI pin is shifted into the LSB of the shift register and contents of
the shift register are shifted right (to the MSB).
LD
15
I
Load strobe input for a 12-bit address/data : A high level on the LD pin latches
a 4-bit address (upper 4 bits: D11 to D8) of the internal 12-bit shift register into
the internal address decoder, and writes 8-bit data (lower 8 bits: D7 to D0) of
the shift register into an internal data latch selected by the latched address.
Data Input/Output
D
I
17
I
Serial address/data input to the internal 12-bit shift register: The address/
data format is that upper 4 bits (D11 to D8) indicate an address and lower 8
bits (D7 to D0) indicate data. The D11 (MSB) is the first-in bit and D0 (LSB) is
the last-in bit.
D
O
14
O
Serial address/data output from the internal 12-bit shift register: This is an
output pin of the MSB bit data of the 12-bit shift register. This pin allows a
cascade connection of the device.
DAC Output
AO1
AO2
AO3
AO4
AO5
AO6
AO7
AO8
AO9
AO10
AO11
AO12
18
19
2
3
4
5
6
7
8
9
12
13
O
8-bit resolution D/A converter outputs : 12 channels of DAC outputs (AO1 to
AO12) are provided.
Each output channel has an operational amplifier output buffer for analog out-
put data.
5
MB88346B
s
FUNCTIONAL DESCRIPTION
OVERVIEW
The MB88346B is an R-2R resistor ladder type, 8-bit resolution digital-to-analog converter (DAC) device. The MB88346B has 12 channels of
D/A converters with operational amplifier output buffers. 8-bit digital data are loaded into internal data latches by individual DAC channel units.
The loaded digital data are converted into analog DC voltages through the internal D/A converter in max. 20
s settling time. And the analog
DC voltages source/sink the output current through the operational amplifier output buffers. For cascade connection, a serial data output is
provided.
DEVICE CONFIGURATION
As illustrated in BLOCK DIAGRAM, the MB88346B device is composed by the digital block (MCU interface) and analog block (D/A converter
with operational amplifier output buffers). The digital block consists of a 12-bit shift register, a 4-bit address decoder, and 12-channels of 8-bit
data latches. The analog block includes 12 channels of 8-bit D/A converters with operational amplifier output buffers connecting to the data
latches. For electrically stable operation the power supply and ground lines are separate between the digital block (MCU interface) and
operational amplifier output buffers, and analog block except operational amplifier output buffers.
DEVICE OPERATION
Figure 2 shows the input/output timing. A 12-bit address/data is serially input into the shift register through the DI pin synchronously with the
rising edge of CLK. The format of the shift register is shown in Figure 3. The lower 8 bits (D7 to D0) are data bits to be converted, and the
upper 4 bits are address bits (D11 to D8) to select a data latch to be written. A high level on the LD pin loads the address decoder with the 4-
bit address to select a data latch, and writes the 8-bit data into a selected data latch. Figure 4 shows the data latch address map, and Table,
address decoding. 8-bit data written into individual data latches are converted into analog DC voltages, dividing the supply voltage |V
DD
-Vss|
through R-2R resistor ladders of D/A converters. The operational amplifier output buffers at individual D/A converter outputs can source up to
1.0 mA of the output current. Figure 5 shows a configuration of the R-2R resistor ladder D/A converter with operational amplifier, and Table
3analog DC voltages corresponding to each digital data.
DI
CLK
LD
AOx
MSB
LSB
D11
D10
D9
D8
D2
D1
D0
Figure 2 Input/Output Timing
Previous Data
New Data