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Электронный компонент: C7943

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Hamamatsu C7942 and C7943 Flat Panel Sensors are digital X-ray image sensors newly developed as key devices for non-destructive
inspection, biomedical imaging, X-ray microscopy and other real-time X-ray imaging applications requiring high resolution and high image quality.
C7942 and C7943 consist of a sensor board and a control board, both assembled in a thin, flat and compact package. The sensor board contains
a CsI scintillator plate, a two-dimensional photodiode array with FET switches and a signal processing IC chip. The photodiode array has a 2400
2400 (C7942) or 1248 1248 (C7943) pixel format with minimized blooming and is highly sensitive to bluish green light emitted from the CsI
scintillator. Each row of pixels is addressed in sequence by the vertical shift register connected to the gate line.
Light emission occurs when X-rays are absorbed in the CsI scintillator. This light emission enters directly into the two-dimensional photodiode
array where an electric charge is stored in each pixel according to the light intensity. This charge is then transferred to the corresponding data line
by applying a control signal to the vertical shift register.
The sensor board also has 8 charge sensitive amplifier arrays each having 300 channel (C7942) or 156 channel (C7943) amplifiers with a
horizontal shift register. These amplifiers with a total of 2400 channels (C7942) or 1248 channels (C7943) are connected to a CDS (Correlated
Double Sampling) circuit that senses the charge on each video line and sends it as the analog video signal from each amplifier array. The control
board converts the analog video signal into a 12-bit digital signal and outputs it to an external frame grabber from a 12-bit parallel port.
C7943 delivers a frame rate of 30 frames per second using 4 4 binning and is ideal for high frame rate applications. On the other hand, C7942
is ideal for applications requiring high resolution because of its 50 m pixel size. Massive digital image data can easily be monitored on a display
unit by using a frame grabber board and video memory installed in the PC. C7942 and C7943 will prove ideal tools for real-time X-ray imaging
and processing where easy-to-use, high-resolution X-ray digital image sensors are needed.
Features
l Non-destructive inspection
l Digital X-ray photography
Applications
l C7942: 2400 2400 pixels
C7943: 1248 1248 pixels
l Digital output (12 bit)
l Dynamic picture image
C7942: 9 frame/s (4 4 binning)
C7943: 30 frame/s (4 4 binning)
l Low noise and wide dynamic range
l Compact package
l Easy use
I M A G E S E N S O R
Flat panel sensor
Acquire digital X-ray image in real time and 170 & 176 mm diagonal size
C7942, C7943
AMP ARRAY No. 1
SHIFT REGISTER
TIMING
PULSE
GENERATOR
OSCILLATOR
ExtTrg
PIXEL NUMBER
Vsync
Hsync
Pclk
A/D
IntExt
IntExt
BINNING
(bin0, bin1)
EXTERNAL POWER SUPPLY
A. Vdd, D. Vdd V (7.5)
(not attached)
AMP ARRAY No. 8
PHOTODIODE
ARRAY
BUFFER
AMP
BUFFER
AMP
PROCESSING
AMP
PROCESSING
AMP
1
2
5760000
5759999
2400
2339
4800
4799
2401
SCINTILLATOR
(120 mm 120 mm)
BIAS
GENERATER
FIFO
A/D
FIFO
VIDEO OUTPUT
(12 BIT DIGITAL)
I Block diagram (C7942)
KACCC0137EA
1
Flat panel sensor
C7942, C7943
I Functional specification
Parameter
C7942
C7943
Readout
Charge amplifier array
Feedback capacitance of each amplifier
0.15 pF
0.6 pF
Video output (Data1 - 12)
RS-422 (differential) 12 bit
Output data rate
15.15 MHz
Synchronous signal (Vsync, Hsync, Pclk)
RS-422 (differential)
bin0, 1, ExtTrg, IntExt
TTL
I Absolute maximum ratings (Ta=25 C)
Parameter
Symbol
Value
Unit
Supply voltage for digital circuitry (+5 V)
D.vdd
+6.0
V
Supply voltage for analog circuitry (+5 V)
A.vdd
+6.0
V
Supply voltage for analog circuitry (7.5 V)
V(+/-7.5)
12
V
Operating temperature (not condensed)
Topr
0 to +35
C
Storage temperature (not condensed)
Tstg
0 to +50
C
I Specification (Unless otherwise noted, Typ. Ta=25 C A.vdd= 5.0 V, D.vdd= 5.0 V, V (7.5)= 7.5 V)
Parameter
Symbol
C7942
C7943
Unit
Pixel size
50
100
m
Active area
120 120
124.8 124.8
mm
Pixel number
5.76
(2400 2400)
1.56
(1248 1248)
M pixels
Number of active pixels (horizontal vertical)
-
2240 2368
1216 1232
pixels
Frame speed (single operation)
Sf (int)
2
7
frame/s
Frame speed (2 2 binning)
4
15
frame/s
Frame speed (4 4 binning)
9
30
frame/s
Frame speed external (single operation)
Sf (ext)
Sf (int) to 0.1
Sf (int) to 0.1
frame/s
Noise (rms.)
N (rms.)
1100
2300
electrons
Saturation charge
Csat
2.2
10
M electrons
Resolution
Reso
8
5
line pairs/mm
Dynamic range
2000
4300
-
Defect line *
-
20 Max.
10 Max.
lines
Scintillator
-
CsI
-
* Without a couple of adjacent defect line that has no response.
I Timing chart
To acquire images through an image grabber board, parameters that match the following timing chart should be described in the
software program or parameter file.
Internal mode
KACCC0138EB
Vsync+
(RS-422)
Hsync+
(RS-422)
Hsync+
(RS-422)
Pclk+
(RS-422)
Data1 - 12
(RS-422)
In case of C7942, the number of n is 300.
In case of C7943 the number of n is 156.
Tvc (1 FRAME)
Thd
Thdpw
Thc (1 LINE)
Tvdpw
Thdpw
Thc (1 LINE)
Tpd
Tpdb
Tpc (1 PIXEL)
Tppw
Tpdb
1
2
n-1
n
n+1
8n-1
8n
Tdc
Tdd
2
Flat panel sensor
C7942, C7943
External mode
KACCC0139EB
1 1 mode (Typ.)
Parameter
Symbol
Value
Unit
Delay time (only external trigger mode)
Tvd
390
s
Cycle time
Tvc
470
ms
Vsync
Dummy pulse width
Tvdpw
770
s
Delay time
Thd
1.4
s
Cycle time
Thc
190
s
Hsync
Dummy pulse width
Thdpw
35
s
Delay time
Tpd
65
ns
Cycle time
Tpc
66
ns
Pulse width
Tppw
33
ns
Pclk
Delay time between each block
Tpdb
200
ns
Delay time
Tdd
34
ns
Data1-12
Cycle time
Tdc
66
ns
2 2 mode (Typ.)
Parameter
Symbol
Value
Unit
Delay time (only external trigger mode)
Tvd
390
s
Cycle time
Tvc
230
ms
Vsync
Dummy pulse width
Tvdpw
770
s
Delay time
Thd
1.4
s
Cycle time
Thc
190
s
Hsync
Dummy pulse width
Thdpw
110
s
Delay time
Tpd
65
ns
Cycle time
Tpc
66
ns
Pulse width
Tppw
33
ns
Pclk
Delay time between each block
Tpdb
200
ns
Delay time
Tdd
34
ns
Data1-12
Cycle time
Tdc
66
ns
4 4 mode (Typ.)
Parameter
Symbol
Value
Unit
Delay time (only external trigger mode)
Tvd
390
s
Cycle time
Tvc
117
ms
Vsync
Dummy pulse width
Tvdpw
770
s
Delay time
Thd
1.4
s
Cycle time
Thc
190
s
Hsync
Dummy pulse width
Thdpw
150
s
Delay time
Tpd
65
ns
Cycle time
Tpc
66
ns
Pulse width
Tppw
33
ns
Pclk
Delay time between each block
Tpdb
200
ns
Delay time
Tdd
34
ns
Data1-12
Cycle time
Tdc
66
ns
Note) The numbers of siginificant figures is two. (except Tvc)
RECOMMENDATION: 50 % OF FRAME TIME
FROM Tvc TO 10 s
Tvc - Tvdpw
Tvd
ExtTrg
(TTL)
Vsync+
(RS-422)
Hsync+, Pclk and Data 1-12 are the same as internal trigger mode.
C7942
3
Flat panel sensor
C7942, C7943
1 1 mode (Typ.)
Parameter
Symbol
Value
Unit
Delay time (only external trigger mode)
Tvd
210
s
Cycle time
Tvc
130
ms
Vsync
Dummy pulse width
Tvdpw
420
s
Delay time
Thd
1.8
s
Cycle time
Thc
110
s
Hsync
Dummy pulse width
Thdpw
22
s
Delay time
Tpd
65
ns
Cycle time
Tpc
66
ns
Pulse width
Tppw
33
ns
Pclk
Delay time between each block
Tpdb
200
ns
Delay time
Tdd
33
ns
Data1-12
Cycle time
Tdc
66
ns
2 2 mode (Typ.)
Parameter
Symbol
Value
Unit
Delay time (only external trigger mode)
Tvd
210
s
Cycle time
Tvc
66
ms
Vsync
Dummy pulse width
Tvdpw
420
s
Delay time
Thd
1.8
s
Cycle time
Thc
110
s
Hsync
Dummy pulse width
Thdpw
63
s
Delay time
Tpd
65
ns
Cycle time
Tpc
66
ns
Pulse width
Tppw
33
ns
Pclk
Delay time between each block
Tpdb
200
ns
Delay time
Tdd
33
ns
Data1-12
Cycle time
Tdc
66
ns
4 4 mode (Typ.)
Parameter
Symbol
Value
Unit
Delay time (only external trigger mode)
Tvd
210
s
Cycle time
Tvc
33
ms
Vsync
Dummy pulse width
Tvdpw
420
s
Delay time
Thd
1.8
s
Cycle time
Thc
110
s
Hsync
Dummy pulse width
Thdpw
84
s
Delay time
Tpd
65
ns
Cycle time
Tpc
66
ns
Pulse width
Tppw
33
ns
Pclk
Delay time between each block
Tpdb
200
ns
Delay time
Tdd
33
ns
Data1-12
Cycle time
Tdc
66
ns
Note) The numbers of siginificant figures is two.
C7943
4
Flat panel sensor
C7942, C7943
I System requirements
To operate C7942 and C7943 Flat Panel Sensors at full performance, the following system and peripherals are required.
PC: IBM compatible PC running on Windows 98 or later operating system
Digital frame grabber card: Monochrome 16 bits or more, pixel clock 16 MHz or more, RS-422 interface synchronous signal (See
the frame grabber manual.)
The National Instruments IMAQ PCI-1424 (NI parts No. 777662-01) frame grabber with optional memory 64 MB (NI parts No.
920130-64) has been verified to successfully acquire 12-bit digital images from both C7942 and C7943. The IMAQ PCI-1422 (NI
parts No. 777959-01) also acquires satisfactory images from C7943. You can utilize the demonstration software that comes with
the frame grabber as a simple viewer, to acquire and save an image. To do so, refer to the frame grabber user's guide for how to
use the camera information file for the demonstration software.
Power source: A. Vdd = +5.0 0.1 V (700 mA), D. Vdd = +5.0 0.1 V (1000 mA), V (7.5) = 7.5 0.5 V (100 mA). Use of a series
power supply is recommended. (Avoid using a switching power supply.) A power cable (terminated with an FGG.2B.307.CLAD92Z
plug at one end and open at the other end; 2 m; see Table 2.) comes supplied with C7942 and C7943. An optional 36-pin cable
for interface with the 36-pin receptacle (see Table 1) on C7942 and C7943 is also available for synchronous signal input, video
output and external control.
The voltages described above are specified at the flat panel sensor side. The impedance of the power cable attached with the
flat panel sensor is low enough but it causes 0.1 V approx. drop. Therefore the voltage at the power source side should be set
0.1 V higher than the voltage specified above.
Table 1 Pin assignment of 36-pin receptacle
Pin No.
Signal
Pin No.
Signal
1
Data1+ (MSB)
19
Data1- (MSB)
2
Data2+
20
Data2-
3
Data3+
21
Data3-
4
Data4+
22
Data4-
5
Data5+
23
Data5-
6
Data6+
24
Data6-
7
Data7+
25
Data7-
8
Data8+
26
Data8-
9
Data9+
27
Data9-
10
Data10+
28
Data10-
11
Data11+
29
Data11-
12
Data12+(LSB)
30
Data12- (LSB)
13
bin0 (TTL)
31
Gnd
14
bin1 (TTL)
32
Gnd
15
ExtTrg (TTL)
33
IntExt (TTL)
16
Vsync+
34
Vsync-
17
Hsync+
35
Hsync-
18
Pclk+
36
Pclk-
Unless otherwise noted, signal level is RS-422.
36-pin receptacle: TX20A-36R-D2GF1-A1L made by JAE (Japan Aviation Electronics Industry limited)
36-pin mating plug: TX20A-36PH1-D2P1-D1 made by JAE (Japan Aviation Electronics Industry limited)
Table 2 Power pin assignment and cable color
Pin No.
Color
Signal
1
Brown
+7.5 V
2
Red
Analog GND
3
Orange
-7.5 V
4
Yellow
Analog GND
5
Green
Analog +5 V
6
Blue
Digital GND
7
Purple
Digital +5 V
Shield
-
Analog GND
7-pin power plug: FGG.2B.307.CLAD92Z made by LEMO S. A. (http://www.lemo.ch)
7-pin power receptacle: ECG.2B.307.CLV made by LEMO S. A.
5