CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper I.C. Handling Procedures.
Copyright
Harris Corporation 1997
1
Semiconductor
HIP2500
Half Bridge 500V
DC
Driver
Description
The HIP2500 is a high voltage integrated circuit (HVIC) optimized
to drive N-Channel MOS gated power devices in half bridge topol-
ogies. It provides the necessary control for PWM motor drive,
power supply, and UPS applications. The SD pin allows external
shutdown of gate drive to both upper and lower gate outputs. Und-
ervoltage lockout will not allow gating when the bias voltage is too
low to drive the external switches into saturation.
The HIP2500IP is pin and function compatible to the Interna-
tional Rectifier IR2110. The HIP2500 has superior ability to
accept negative voltages from the V
S
pin to the COM pin due to
forward recovery of the lower flyback diode.
The HIP2500IB is a SOIC or small outline IC form of the
HIP2500. The HIP2500IB drives high side and low side refer-
enced power switches just like the HIP2500IP.
The HIP2500IP1 is a 16 lead Plastic DIP form of the HIP2500.
Pins 4 and 5 removed from lead frame to provide extra creep-
age and strike distances in high voltage applications.
Please see Application Note AN9010 for more information.
Functional Block Diagram
DRIVER
UV
LATCH
S
R
LEVEL
SHIFT
LOGIC
UV
HIN
SD
LIN
HO
LO
COM
HIP2500
V
DD
V
SS
V
CC
V
S
V
B
DRIVER
Features
Maximum Rating . . . . . . . . . . . . . . . . . . . . . . . . 500V
Ability to Interface and Drive N-Channel Power
Devices
Floating Bootstrap Power Supply for Upper Rail
Drive
CMOS Schmitt-Triggered Inputs with Hysteresis
and Pull-Down
Up to 400kHz Operation
Single Low Current Bias Supply
Latch-Up Immune CMOS Logic
Peak Drive. . . . . . . . . . . . . . . . . . . . . . . . . .Up to 2.0A
Gate Drive Rise Time (+125
o
C) . . . . . . . < 25ns (Typ)
Applications
High Frequency Switch-Mode Power Supply
Induction Heating and Welding
Switch Mode Amplifiers
AC and DC Motor Drives
Electronic Lamp Ballasts
Battery Chargers
UPS Inverters
Noise Cancellation in Amplifier Systems
Ordering Information
PART
NUMBER
TEMP.
RANGE (
o
C)
PACKAGE
PKG NO.
HIP2500IP
-40 to +85
14 Ld PDIP
E14.3
HIP2500IP1
-40 to +85
16 Ld PDIP
E16.3
HIP2500IB
-40 to +85
16 Ld SOIC (W)
M16.3
July 1998
File Number
2801.9
Pinouts
HIP2500 (PDIP)
TOP VIEW
HIP2500 (SOIC)
TOP VIEW
HIP2500 (PDIP)
TOP VIEW
LIN
SD
HIN
14
13
12
11
10
9
8
NC
NC
1
2
3
5
6
7
4
LO
COM
HO
NC
V
DD
V
CC
V
SS
V
S
V
B
14
15
16
9
13
12
11
10
1
2
3
7
6
8
LO
COM
V
CC
V
S
HO
V
B
NC
LIN
SD
HIN
V
DD
NC
NC
V
SS
4
5
NC
NC
14
15
16
9
13
12
11
10
1
2
3
7
6
8
LO
COM
V
CC
V
S
HO
V
B
NC
LIN
SD
HIN
V
DD
NC
NC
V
SS
PAR
T WITHDRA
WN, PR
OCESS OBSOLETE
NO NEW DESIGNS, SEE
IR2110, IR2112
IR2113
2
HIP2500
Absolute Maximum Ratings
Full Temperature Range Unless
Otherwise Noted, All Voltages Referenced to V
SS
Unless Otherwise Noted.
Thermal Information
Floating Supply Voltage, V
B
. . . . . . . . . . . . . . .V
S
-0.5V to V
S
+18.0V
(Positive Terminal)
Floating Supply Voltage, V
S
. . . . . . . . . . . . . . . . . . . . . . . . . . . 500V
(Common Terminal)
High Side Channel Output Voltage, V
HO
. . . . . . . . -0.5V to V
B
+0.5V
Fixed Supply Voltage, V
CC
. . . . . . . . . . . . . . . . . . . . . -0.5V to 18.0V
Low Side Channel Output Voltage, V
LO
. . . . . . . .-0.5V to V
CC
+0.5V
Logic Supply Voltage, V
DD
. . . . . . . . . . . . . . . . . . . . . -0.5V to 18.0V
Logic Input Voltage, V
IN
. . . . . . . . . . . . . . . . . . . .-0.5V to V
DD
+0.5V
[HIN, LIN & SD (Shutdown)]
V
DD
to COM and V
CC
to V
SS
Voltage . . . . . . . . . . . . . -0.5V to 18.0V
Thermal Resistance (Note 1, Typical)
JA
HIP2500IP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
75
o
C/W
HIP2500IP1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
80
o
C/W
HIP2500IB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
90
o
C/W
See Maximum Power Dissipation vs Temperature Curve
Junction Temperature Range . . . . . . . . . . . . . . . . . -40
o
C to +125
o
C
Storage Temperature Range, T
S
. . . . . . . . . . . . . . . -40
o
C to +150
o
C
Operating Ambient Temperature Range, T
A
. . . . . . . -40
o
C to +85
o
C
NOTE:
1.
JA
is measured with the component mounted on an evaluation PC board in free air.
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Recommended DC Operating Conditions
Floating Supply Voltage, V
B
. . . . . . . . . . . . . . . . V
S
+10V to V
S
+15V
(Floating Terminal)
High Side Channel Output Voltage, V
HO
. . . . . . . . . . . . . .10V to V
B
(With Respect to V
S
)
Fixed Supply Voltage, V
CC
. . . . . . . . . . . . . . . . . . . . . . . .10V to 15V
Low Side Channel Output Voltage, V
LO
. . . . . . . . . . . . . . 0V to V
CC
Logic Supply Voltage, V
DD
. . . . . . . . . . . . . . . . . . . . . . . . 4V to V
CC
Floating Supply Voltage, V
S
. . . . . . . . . . . . . . . . . . . . -4.0V to 500V
(Common Terminal)
V
SS
and COM potentials to be equal.
Electrical Specifications
V
CC
= (V
B
- V
S
) = V
DD
= 15V, COM = V
SS
= 0, Unless Otherwise Noted
T
J
= +25
o
C
T
J
= -40
o
C TO +125
o
C
PARAMETER
SYMBOL
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
DC CHARACTERISTICS
Quiescent V
CC
Current
I
QCC
-
1.5
1.9
-
-
2.0
mA
Quiescent V
BS
Current
I
QBS
-
300
400
-
300
435
A
Quiescent V
DD
Current
I
QDD
-
0.1
1
-
-
1.8
A
Quiescent Leakage Current
I
S
(500V)
-
0.4
3.0
-
-
-
A
Logic Input Pulldown Current, V
IN
= V
DD
(HIN, LIN, SD)
IN+
-
12
20
-
-
22
A
Logic Input Leakage Current, V
IN
= V
SS
(HIN, LIN, SD)
IN-
-
0
1
-
0
1
A
Logic Input Positive Going Threshold (Note 2)
V
TH
+
7.5
8.0
8.5
7.5
8.0
8.6
V
Logic Input Negative Going Threshold (Note 2)
V
TH
-
5.5
5.9
6.3
5.5
5.9
6.4
V
Undervoltage Positive Going Threshold
UV+
8.0
9.35
9.99
7.8
-
9.99
V
Undervoltage Negative Going Threshold
UV-
7.7
9.05
9.69
7.5
-
9.69
V
Undervoltage Hysteresis (V
CC
)
UVHYS (V
CC
)
250
-
450
170
-
530
mV
Undervoltage Hysteresis (V
BS
)
UVHYS (V
BS
)
250
-
450
170
-
530
mV
Output High Open Circuit Voltage (HO, LO)
V
OUT
+
14.95
15
-
14.95
15
-
V
Output Low Open Circuit Voltage (HO, LO)
V
OUT
-
-
-
0.05
-
-
0.05
V
Output High Short Circuit Current (Sourcing)
I
OUT
+
1.65
2.1
-
1.15
1.6
-
A
Output Low Short Circuit Current (Sinking)
I
OUT
-
1.85
2.3
-
1.35
1.7
-
A
NOTE:
2. See Figure 8 for logic supply voltages other than 15.0V.
3
HIP2500
Switching Specifications
PARAMETER
SYMBOL
T
J
= +25
o
C
T
J
= -40
o
C TO +125
o
C
UNITS
MIN
TYP
MAX
MIN
TYP
MAX
HIGH SIDE CHANNEL WITH 500V OFFSET, C
L
= 1000pF
High Side Turn-On Propagation Delay
t
ON
320
420
525
230
-
725
ns
High Side Turn-Off Propagation Delay
t
OFF
260
385
450
190
-
625
ns
High Side Rise Time
t
R
-
25
50
-
25
50
ns
High Side Turn-Off Fall Time
t
F
-
25
50
-
25
50
ns
LOW SIDE CHANNEL, C
L
= 1000pF
Low Side Turn-On Propagation Delay
t
ON
250
365
450
190
-
600
ns
Low Side Turn-Off Propagation Delay
t
OFF
175
295
370
125
-
475
ns
Low Side Turn-On Rise Time
t
R
-
25
50
-
30
50
ns
Low Side Turn-Off Fall Time
t
F
-
25
50
-
30
50
ns
Shutdown Propagation Delay
High Side Shutdown
Low Side Shutdown
t
SDHO
300
400
490
200
-
650
ns
t
SDLO
175
320
400
125
-
500
ns
HIGH SIDE CHANNEL WITH 500V OFFSET, C
L
= 1000pF
Turn-On Propagation Delay Matching
(Between HO and LO)
M
t
0
-
125
0
-
185
ns
Minimum On Output Pulse Width (HO, LO)
PW
OUT(MIN)
-
35
50
-
35
55
ns
Minimum Off Output Pulse Width (HO, LO)
PW
OUTMIN
275
440
640
250
440
650
ns
Minimum On Input Pulse Width (HIN, LIN)
PW
ON(MIN)
-
100
145
-
100
175
ns
Minimum Off Input Pulse Width (HIN, LIN)
PW
OFF(MIN)
-
110
200
-
110
220
ns
Deadtime LO Turn-Off to HO Turn-On
DHt
ON
-
125
-
-
125
-
ns
Deadtime HO Turn-Off to LO Turn-On
DLt
ON
-
-20
-
-
-20
-
ns
MAXIMUM TRANSIENT CONDITIONS
Offset Supply Operating Transient
dV
S
/dt
-
-
50
-
-
50
V/ns
Logic Truth Table
HIN
LIN
UV
H
UV
L
SD
HO
LO
COMMENTS
0
0
0
0
0
0
0
Normal Off
0
1
0
0
0
0
1
Lower On
1
0
0
0
0
1
0
Upper On
1
1
0
0
0
1
1
Both On
X
X
X
X
1
0
0
Chip Disabled
X
X
1
1
X
0
0
V
CC
UV Lockout and V
BS
Lockout
X
1
1
0
0
0
1
V
BS
UV Lockout
1
X
0
1
0
1
0
V
CC
UV Lockout
4
HIP2500
Typical Performance Curves
FIGURE 1. MAXIMUM POWER DISSIPATION vs TEMPERATURE
FIGURE 2. HIGH VOLTAGE POWER DISSIPATION vs
SWITCHING FREQUENCY
FIGURE 3. LOW VOLTAGE POWER DISSIPATION vs
FREQUENCY
FIGURE 4. V
SS
OFFSET vs V
CC
SUPPLY VOLTAGE
FIGURE 5. OFFSET SUPPLY LEAKAGE vs TEMPERATURE
FIGURE 6. MAXIMUM NEGATIVE V
S
OFFSET VOLTAGE vs V
BS
VOLTAGE
0
0.25
0.5
0.75
1
1.25
1.5
1.75
2
2.25
2.5
-40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100110120130
AMBIENT TEMPERATURE (
o
C)
HIP2500-IB
HIP2500-IP1
MAXIMUM PO
WER DISSIP
A
TION (W)
HIP2500-IP
10
100
1000
SWITCHING FREQUENCY (kHz)
1.0
0.1
0.01
0.001
HIGH V
O
L
T
A
GE PO
WER DISSIP
A
TION (W)
V
BIAS
= 15V
C
L
= 100pF
T
A
= +25
o
C
V
S
= 400V
V
S
= 300V
V
S
= 200V
V
S
= 100V
10
1.0
0.1
0.01
PO
WER DISSIP
A
TION (W)
10
100
1000
SWITCHING FREQUENCY (kHz)
2100pF
907pF
100pF
V
S
= V
SS
= COM
V
BS
= V
CC
= 15V
DC
T
A
= +25
o
C
NOTE: All switching losses assumed to be in IC.
6
4
2
0
-2
-4
LOGIC SUPPL
Y
OFFSET V
O
L
T
A
GE (V)
10
12
14
16
SUPPLY VOLTAGE (V)
MAX V
SS
OFFSET
MIN V
SS
OFFSET
10
1.0
0.1
OFFSET SUPPL
Y LEAKA
GE
CURRENT (
A)
0
20
40
60
80
100
120
140
TEMPERATURE (
o
C)
100V
200V
500V
400V
300V
10
9
8
7
6
5
4
3
2
MAX V
S
OFFSET V
O
L
T
A
GE (NEGA
TIVE)
10
11
12
13
14
15
16
17
18
BOOTSTRAP SUPPLY VOLTAGE
V
CC
= 15V AND 12V
T
J
= +25
o
C
V
CC
= 15V
V
CC
= 12V
5
HIP2500
FIGURE 7. UNDERVOLTAGE LOCKOUT vs TEMPERATURE
FIGURE 8. INPUT LOGIC THRESHOLD vs SUPPLY VOLTS
FIGURE 9. QUIESCENT V
BS
SUPPLY CURRENT vs
TEMPERATURE
FIGURE 10. RISE AND FALL TIME vs LOAD CAPACITANCE
FIGURE 11. DRIVER SINK/SOURCE V-I CHARACTERISTIC
FIGURE 12. RISE AND FALL TIME vs TEMPERATURE
Typical Performance Curves
(Continued)
9.35
9.2
9.0
8.9
UNDER
V
O
L
T
A
GE
LOCK
OUT (V)
-40
0
40
100
140
TEMPERATURE (
o
C)
120
80
60
20
-20
8.95
9.05
9.1
9.15
9.25
9.3
V
CC
UV+
V
BS
UV+
V
CC
UV-
V
BS
UV-
10
8
6
4
2
LOGIC THRESHOLD (V)
6
8
10
12
14
16
18
LOGIC SUPPLY VOLTAGE (V)
T
J
= -40
o
C TO +125
o
C
VTH+
VTH-
5
(V
DD
TO V
SS
)
450
400
350
300
250
200
150
V
BS
SUPPL
Y CURRENT (
A)
-50
0
50
100
150
JUNCTION TEMPERATURE (
o
C)
18V IQBS1
18V IQBS0
14V IQBS1
14V IQBS0
10V IQBS1
10V IQBS0
120
100
80
60
40
20
0
RISE AND F
ALL TIMES (ns)
100
1000
1E4
LOAD CAPACITANCE (pF)
t
F
t
R
0
2
4
6
8
10
12
14
16
SOURCE/SINK DRAIN-SOURCE VOLTAGE
3.0
2.5
2.0
1.5
1.0
0.5
0
PEAK OUTPUT CURRENT (A)
25
-40
125
0
25
-40
125
0
SINK DRIVER
SOURCE DRIVER
30
28
26
24
22
20
18
16
14
12
10
RISE AND F
ALL TIME (ns)
-50
0
50
100
150
TEMPERATURE (
o
C)
t
F
t
R
6
HIP2500
Typical Application Diagram
FIGURE 13. RISE AND FALL TIME vs SUPPLY VOLTAGE
FIGURE 14. PROPAGATION DELAY vs SUPPLY VOLTAGE
FIGURE 15. PROPAGATION DELAYS AT V
CC
= 15V
Typical Performance Curves
(Continued)
30
28
26
24
22
20
18
16
14
12
10
RISE AND F
ALL TIME (ns)
10
11
12
13
14
15
16
SUPPLY VOLTAGE (V)
t
F
t
R
460
440
420
400
380
360
340
320
300
PR
OP
A
G
A
TION DELA
Y (ns)
10
11
12
13
14
15
16
SUPPLY VOLTAGE (V)
Ht
ON
Ht
OFF
Lt
ON
Lt
OFF
700
600
500
400
300
200
PR
OP
A
G
A
TION DELA
Y (ns)
-50
0
50
100
150
JUNCTION TEMPERATURE (
o
C)
Lt
OFF
Ht
OFF
Ht
ON
Lt
ON
V
SS
DRIVER
UV
LATCH
S
R
LEVEL
SHIFT
LOGIC
UV
HIN
SD
LIN
HO
LO
COM
HIP2500
V
DD
V
CC
V
S
V
B
DRIVER
C
F
D
F
R
G
R
G
V
CC
H
V
TO
LOAD
7
HIP2500
NOTES:
1. Controlling Dimensions: INCH. In case of conflict between
English and Metric dimensions, the inch dimensions control.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Symbols are defined in the "MO Series Symbol List" in Section
2.2 of Publication No. 95.
4. Dimensions A, A1 and L are measured with the package seated
in JEDEC seating plane gauge GS-3.
5. D, D1, and E1 dimensions do not include mold flash or protru-
sions. Mold flash or protrusions shall not exceed 0.010 inch
(0.25mm).
6. E and
are measured with the leads constrained to be per-
pendicular to datum
.
7. e
B
and e
C
are measured at the lead tips with the leads uncon-
strained. e
C
must be zero or greater.
8. B1 maximum dimensions do not include dambar protrusions.
Dambar protrusions shall not exceed 0.010 inch (0.25mm).
9. N is the maximum number of terminal positions.
10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3,
E28.3, E42.6 will have a B1 dimension of 0.030 - 0.045 inch
(0.76 - 1.14mm).
C
L
E
e
A
C
e
B
e
C
-B-
E1
INDEX
1 2 3
N/2
N
AREA
SEATING
BASE
PLANE
PLANE
-C-
D1
B1
B
0.010 (0.25)
C
A
M
B S
e
D
D1
A
A2
L
A1
-A-
e
A
-C-
E14.3
(JEDEC MS-001-AA ISSUE D)
14 LEAD DUAL-IN-LINE PLASTIC PACKAGE
SYMBOL
INCHES
MILLIMETERS
NOTES
MIN
MAX
MIN
MAX
A
-
0.210
-
5.33
4
A1
0.015
-
0.39
-
4
A2
0.115
0.195
2.93
4.95
-
B
0.014
0.022
0.356
0.558
-
B1
0.045
0.070
1.15
1.77
8
C
0.008
0.014
0.204
0.355
-
D
0.735
0.775
18.66
19.68
5
D1
0.005
-
0.13
-
5
E
0.300
0.325
7.62
8.25
6
E1
0.240
0.280
6.10
7.11
5
e
0.100 BSC
2.54 BSC
-
e
A
0.300 BSC
7.62 BSC
6
e
B
-
0.430
-
10.92
7
L
0.115
0.150
2.93
3.81
4
N
14
14
9
Rev. 0 12/93
Dual-In-Line Plastic Packages (PDIP)
8
HIP2500
E16.3
(JEDEC MS-001-BB ISSUE D)
16 LEAD DUAL-IN-LINE PLASTIC PACKAGE
SYMBOL
INCHES
MILLIMETERS
NOTES
MIN
MAX
MIN
MAX
A
-
0.210
-
5.33
4
A1
0.015
-
0.39
-
4
A2
0.115
0.195
2.93
4.95
-
B
0.014
0.022
0.356
0.558
-
B1
0.045
0.070
1.15
1.77
8, 10
C
0.008
0.014
0.204
0.355
-
D
0.735
0.775
18.66
19.68
5
D1
0.005
-
0.13
-
5
E
0.300
0.325
7.62
8.25
6
E1
0.240
0.280
6.10
7.11
5
e
0.100 BSC
2.54 BSC
-
e
A
0.300 BSC
7.62 BSC
6
e
B
-
0.430
-
10.92
7
L
0.115
0.150
2.93
3.81
4
N
16
16
9
Rev. 0 12/93
NOTES:
1. Controlling Dimensions: INCH. In case of conflict between
English and Metric dimensions, the inch dimensions control.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Symbols are defined in the "MO Series Symbol List" in Section
2.2 of Publication No. 95.
4. Dimensions A, A1 and L are measured with the package seated
in JEDEC seating plane gauge GS-3.
5. D, D1, and E1 dimensions do not include mold flash or protru-
sions. Mold flash or protrusions shall not exceed 0.010 inch
(0.25mm).
6. E and
are measured with the leads constrained to be per-
pendicular to datum
.
7. e
B
and e
C
are measured at the lead tips with the leads uncon-
strained. e
C
must be zero or greater.
8. B1 maximum dimensions do not include dambar protrusions.
Dambar protrusions shall not exceed 0.010 inch (0.25mm).
9. N is the maximum number of terminal positions.
10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3,
E28.3, E42.6 will have a B1 dimension of 0.030 - 0.045 inch
(0.76 - 1.14mm).
C
L
E
e
A
C
e
B
e
C
-B-
E1
INDEX
1 2 3
N/2
N
AREA
SEATING
BASE
PLANE
PLANE
-C-
D1
B1
B
e
D
D1
A
A2
L
A1
-A-
0.010 (0.25)
C
A
M
B S
e
A
-C-
Dual-In-Line Plastic Packages (PDIP)
9
HIP2500
NOTES:
1. Symbols are defined in the "MO Series Symbol List" in Section
2.2 of Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension "D" does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.15mm (0.006 inch) per side.
4. Dimension "E" does not include interlead flash or protrusions. In-
terlead flash and protrusions shall not exceed 0.25mm (0.010
inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual
index feature must be located within the crosshatched area.
6. "L" is the length of terminal for soldering to a substrate.
7. "N" is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width "B", as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch)
10. Controlling dimension: MILLIMETER. Converted inch dimen-
sions are not necessarily exact.
INDEX
AREA
E
D
N
1
2
3
-B-
0.25(0.010)
C A
M
B S
e
-A-
L
B
M
-C-
A1
A
SEATING PLANE
0.10(0.004)
h x 45
o
C
H
0.25(0.010)
B
M
M
Small Outline Plastic Packages (SOIC)
M16.3
(JEDEC MS-013-AA ISSUE C)
16 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE
SYMBOL
INCHES
MILLIMETERS
NOTES
MIN
MAX
MIN
MAX
A
0.0926
0.1043
2.35
2.65
-
A1
0.0040
0.0118
0.10
0.30
-
B
0.013
0.0200
0.33
0.51
9
C
0.0091
0.0125
0.23
0.32
-
D
0.3977
0.4133
10.10
10.50
3
E
0.2914
0.2992
7.40
7.60
4
e
0.050 BSC
1.27 BSC
-
H
0.394
0.419
10.00
10.65
-
h
0.010
0.029
0.25
0.75
5
L
0.016
0.050
0.40
1.27
6
N
16
16
7
0
o
8
o
0
o
8
o
-
Rev. 0 12/93
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