HD74ALVCH162831
1-bit 4-bit Address Register / Driver with 3-state Outputs
ADE-205-195 (Z)
Preliminary
1st. Edition
March 1998
Description
This 1-bit to 4-bit address register / driver is designed for 2.3 V to 3.6 V V
CC
operation. The device is ideal
for use in applications in which a single address bus is driving four separate memory locations. The
HD74ALVCH162831 can be used as a buffer or a register, depending on the logic level of the select (
SEL)
input. When
SEL is logic high, the device is in the buffer mode. The outputs follow the inputs and are
controlled by the two output enable (
OE) controls. Each OE controls two groups of nine outputs. When
SEL is logic low, the device is in the register mode. The register is an edge triggered D-type flip flop. On
the positive transition of the clock (CLK) input, data set up at the A inputs is stored in the internal registers.
OE controls operate the same as in buffer mode. When OE is logic low, the outputs are in a normal logic
state (high or low logic level). When
OE is logic high, the outputs are in the high impedance state. To
ensure the high impedance state during power up or power down,
OE should be tied to V
CC
through a
pullup registor; the minimum value of the registor is determined by the current sinking capability of the
driver.
SEL and OE do not affect the internal operation of the flip flops. Old data can be retained or new
data can be entered while the outputs are in the high impedance state. Active bus hold circuitry is provided
to hold unused or floating data inputs at a valid logic level. All outputs, which are designed to sink up to
12 mA, include 26
resistors to reduce overshoot and undershoot.
Features
V
CC
= 2.3 V to 3.6 V
Typical V
OL
ground bounce < 0.8 V (@V
CC
= 3.3 V, Ta = 25C)
Typical V
OH
undershoot > 2.0 V (@V
CC
= 3.3 V, Ta = 25C)
High output current 12 mA (@V
CC
= 3.0 V)
Bus hold on data inputs eliminates the need for external pullup / pulldown resistors.
All outputs have equivalent 26
series resistors, so no external resistors are required.
HD74ALVCH162831
4
Absolute Maximum Ratings
Item
Symbol
Ratings
Unit
Conditions
Supply voltage
V
CC
0.5 to 4.6
V
Input voltage
*1
V
I
0.5 to 4.6
V
Output voltage
*1, 2
V
O
0.5 to V
CC
+0.5
V
Input clamp current
I
IK
50
mA
V
I
< 0
Output clamp current
I
OK
50
mA
V
O
< 0 or V
O
> V
CC
Continuous output current
I
O
50
mA
V
O
= 0 to V
CC
V
CC
, GND current / pin
I
CC
or I
GND
100
mA
Maximum power dissipation
at Ta = 55
C (in still air)
*3
P
T
1
W
TVSOP
Storage temperature
T
stg
65 to 150
C
Notes:
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage
to the device. These are stress ratings only, and functional operation of the device at these or
any other conditions beyond those indicated under "recommended operating conditions" is not
implied. Exposure to absolute maximum rated conditions for extended periods may affect device
reliability.
1. The input and output negative voltage ratings may be exceeded if the input and output clamp
current ratings are observed.
2. This value is limited to 4.6 V maximum.
3. The maximum package power dissipation is calculated using a junction temperature of 150
C
and a board trace length of 750 mils.
Recommended Operating Conditions
Item
Symbol
Min
Max
Unit
Conditions
Supply voltage
V
CC
2.3
3.6
V
Input voltage
V
I
0
V
CC
V
Output voltage
V
O
0
V
CC
V
High level output current
I
OH
--
6
mA
V
CC
= 2.3 V
--
8
V
CC
= 2.7 V
--
12
V
CC
= 3.0 V
Low level output current
I
OL
--
6
mA
V
CC
= 2.3 V
--
8
V
CC
= 2.7 V
--
12
V
CC
= 3.0 V
Input transition rise or fall rate
t /
v
0
10
ns / V
Operating temperature
T
a
40
85
C
Note:
Unused control inputs must be held high or low to prevent them from floating.
PDF 
ZIP
