HD74HCT125/HD74HCT126
Quad. Bus Buffer Gates (with 3-state outputs)
Description
The HD74HCT125, HD74HCT126 require the 3-state control input C to be taken high to put the output
into the high impedance condition, whereas the HD74HCT125, HD74HCT126 requires the control input to
be low to put the output into high impedance.
Features
LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility
High Speed Operation: t
pd
(A to Y) = 12 ns typ (C
L
= 50 pF)
High Output Current: Fanout of 15 LSTTL Loads
Wide Operating Voltage: V
CC
= 4.5 to 5.5 V
Low Input Current: 1 A max
Low Quiescent Supply Current: I
CC
(static) = 4 A max (Ta = 25C)
Function Table
Input
C
Output Y
HCT125
HCT126
A
HD74HCT125
HD74HCT126
H
L
X
Z
Z
L
H
L
L
L
L
H
H
H
H
Notes: X: Irrelevant
Z: Off (High-impedance) state of a 3-state output.
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