HM5116405 Series
HM5117405 Series
16 M EDO DRAM (4-Mword 4-bit)
4 k Refresh/2 k Refresh
ADE-203-633D (Z)
Rev. 4.0
Nov. 1997
Description
The Hitachi HM5116405 Series, HM5117405 Series are CMOS dynamic RAMs organized 4,194,304-word
4-bit. They employ the most advanced CMOS technology for high performance and low power. The
HM5116405 Series, HM5117405 Series offer Extended Data Out (EDO) Page Mode as a high speed
access mode. They have package variations of standard 26-pin plastic SOJ and standard 26-pin plastic
TSOP II.
Features
Single 5 V ( 10%)
Access time: 50 ns/60 ns/70 ns (max)
Power dissipation
Active mode : 495 mW/440 mW/385 mW (max) (HM5116405 Series)
: 550 mW/495 mW/440 mW (max) (HM5117405 Series)
Standby mode :
11 mW (max)
:
0.83 mW (max) (L-version)
EDO page mode capability
Long refresh period
4096 refresh cycles : 64 ms (HM5116405 Series)
: 128 ms (L-version)
2048 refresh cycles : 32 ms (HM5117405 Series)
: 128 ms (L-version)
3 variations of refresh
-only refresh
-before-
refresh
Hidden refresh
HM5116405 Series, HM5117405 Series
2
Battery backup operation (L-version)
Test function
16-bit parallel test mode
Ordering Information
Type No.
Access time
Package
HM5116405S-5
HM5116405S-6
HM5116405S-7
50 ns
60 ns
70 ns
300-mil 26-pin plastic SOJ
(CP-26/24DB)
HM5116405LS-5
HM5116405LS-6
HM5116405LS-7
50 ns
60 ns
70 ns
HM5117405S-5
HM5117405S-6
HM5117405S-7
50 ns
60 ns
70 ns
HM5117405LS-5
HM5117405LS-6
HM5117405LS-7
50 ns
60 ns
70 ns
HM5116405TS-5
HM5116405TS-6
HM5116405TS-7
50 ns
60 ns
70 ns
300-mil 26-pin plastic TSOP II
(TTP-26/24DA)
HM5116405LTS-5
HM5116405LTS-6
HM5116405LTS-7
50 ns
60 ns
70 ns
HM5117405TS-5
HM5117405TS-6
HM5117405TS-7
50 ns
60 ns
70 ns
HM5117405LTS-5
HM5117405LTS-6
HM5117405LTS-7
50 ns
60 ns
70 ns
HM5116405 Series, HM5117405 Series
3
Pin Arrangement
26
25
24
23
22
21
19
18
17
16
15
14
1
2
3
4
5
6
8
9
10
11
12
13
V
CC
I/O1
I/O2
A11
A10
A0
A1
A2
A3
V
CC
V
CC
I/O1
I/O2
A11
A10
A0
A1
A2
A3
V
CC
V
I/O4
I/O3
A9
A8
A7
A6
A5
A4
V
SS
SS
V
I/O4
I/O3
A9
A8
A7
A6
A5
A4
V
SS
SS
1
2
3
4
5
6
8
9
10
11
12
13
26
25
24
23
22
21
19
18
17
16
15
14
HM5116405S/LS Series
HM5116405TS/LTS Series
(Top view)
(Top view)
Pin Description
Pin name
Function
A0 to A11
Address input
Row/Refresh address
Column address
A0 to A11
A0 to A9
I/O1 to I/O4
Data input/Data output
Row address strobe
Column address strobe
Write enable
Output enable
V
CC
Power supply
V
SS
Ground
HM5116405 Series, HM5117405 Series
4
Pin Arrangement
26
25
24
23
22
21
19
18
17
16
15
14
1
2
3
4
5
6
8
9
10
11
12
13
V
CC
I/O1
I/O2
NC
A10
A0
A1
A2
A3
V
CC
V
I/O4
I/O3
A9
A8
A7
A6
A5
A4
V
SS
SS
V
CC
I/O1
I/O2
NC
A10
A0
A1
A2
A3
V
CC
V
I/O4
I/O3
A9
A8
A7
A6
A5
A4
V
SS
SS
1
2
3
4
5
6
8
9
10
11
12
13
26
25
24
23
22
21
19
18
17
16
15
14
HM5117405S/LS Series
HM5117405TS/LTS Series
(Top view)
(Top view)
Pin Description
Pin name
Function
A0 to A10
Address input
Row/Refresh address
Column address
A0 to A10
A0 to A10
I/O1 to I/O4
Data input/Data output
Row address strobe
Column address strobe
Write enable
Output enable
V
CC
Power supply
V
SS
Ground
NC
No connection
HM5116405 Series, HM5117405 Series
5
Block Diagram (HM5116405 Series)
Timing and control
Column
address
buffers
Row
address
buffers
I/O buffers
A0
A1
to
A9
A11
I/O1
to
I/O4
A10
Column decoder
R
o
w
d
e
c
o
d
e
r
4M array
4M array
4M array
4M array
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