Features
Low-power standby
-- 0.1 mW (typ)
-- 10 W (typ) L-/LL-version
Low power operation
-- 15 mW/MHz (typ)
Fast access time
-- l00/120/150 ns (max)
Single +5 V supply
Completely static memory
-- No clock or timing strobe required
Equal access and cycle time
Common data input and output, three-state
output
Directly TTL compatible
-- All inputs and outputs
Battery back up operation capability
(L-/LL-version)
Ordering Information
Access
Type No.
time
Package
HM6264AP-10
100 ns
HM6264AP-12
120 ns
HM6264AP-15
150 ns
HM6264ALP-10
100 ns
HM6264ALP-12
120 ns
HM6264ALP-15
150 ns
HM6264ALP-10L 100 ns
HM6264ALP-12L 120 ns
HM6264ALP-15L 150 ns
Access
Type No.
time
Package
HM6264ASP-10
100 ns
HM6264ASP-12
120 ns
HM6264ASP-15
150 ns
HM6264ALSP-10 100 ns
HM6264ALSP-12 120 ns
HM6264ALSP-15 150 ns
HM6264ALSP-10L 100 ns
HM6264ALSP-12L 120 ns
HM6264ALSP-15L 150 ns
HM6264AFP-10
100 ns
HM6264AFP-12
120 ns
HM6264AFP-15
150 ns
HM6264ALFP-10 100 ns
HM6264ALFP-12 120 ns
HM6264ALFP-15 150 ns
HM6264ALFP-10L 100 ns
HM6264ALFP-12L 120 ns
HM6264ALFP-15L 150 ns
Note: 1. T is added to the end of the type number
for a SOP of 3.00 mm (max) thickness.
28-pin plastic
SOP
*1
(FP-28D/DA)
300-mil, 28-pin
plastic DIP
(DP-28N)
600-mil, 28-pin
plastic DIP
(DP-28)
1
HM6264A Series
8192-word
8-bit High Speed CMOS Static RAM
Pin Arrangement
Block Diagram
2
HM6264A Series
HM6264A Series
V
CC
V
SS
Memory array
256
256
Row
decoder
A11
A8
A9
A7
A12
A5
A6
A4
Column I/O
Column decoder
Input
data
control
A1
A3
Timing pulse generator
I/O1
I/O8
CS2
CS1
WE
OE
A2A0A10
WE
I/O2
27
1
NC
2
A12
3
A7
4
A6
5
A5
6
A4
7
A3
8
A2
9
A1
10
A0
11
I/O1
12
13
14
V
SS
I/O3
V
CC
28
CS2
26
A8
25
A9
24
A11
23
22
A10
21
CS1
20
I/O8
19
I/O7
18
I/O6
17
I/O5
16
I/O4
15
(Top view)
OE
3
HM6264A Series
HM6264A Series
Truth Table
WE
CS1
CS2
OE
Mode
I/O pin
V
CC
current
Note
High Z
I
SB
, I
SB1
High Z
I
SB
, I
SB1
H
L
H
H
Output disabled
High Z
I
CC
H
L
H
L
Read
Dout
I
CC
Read cycle
L
L
H
H
Write
Din
I
CC
Write cycle 1
L
L
H
L
Write
Din
I
CC
Write cycle 2
Note:
: Don't care.
Absolute Maximum Ratings
Parameter
Symbol
Rating
Unit
Terminal voltage
*1
V
T
0.5
*2
to +7.0
V
Power dissipation
P
T
1.0
W
Operating temperature
Topr
0 to +70
C
Storage temperature
Tstg
55 to +125
C
Storage temperature (under bias)
Tbias
10 to +85
C
Notes:
1. With respect to V
SS.
2. 3.0 V for pulse width
50 ns
Recommended DC Operating Conditions (Ta = 0 to +70C)
Parameter
Symbol
Min
Typ
Max
Unit
V
CC
4.5
5.0
5.5
V
V
SS
0
0
0
V
V
IH
2.2
--
6.0
V
V
IL
0.3
*1
--
0.8
V
Note:
1. 3.0 V for pulse width
50 ns
Input voltage
Supply voltage
Not selected
(power down)
H
L
DC and Operating Characteristics (V
CC
= 5 V 10%,V
SS
= 0 V, Ta = 0 to +70C)
Parameter
Symbol
Min
Typ
Max
Unit
Test condition
Input leakage current
|I
LI
|
--
--
2
A
Vin = V
SS
to V
CC
Output leakage current |I
LO
|
--
--
2
A
CS1
= V
IH
or CS2 = V
IL
or
OE
= V
IH
or
WE
= V
IL
, V
I/O
= V
SS
to V
CC
Operating power
I
CCDC
--
7
15
mA
CS1
= V
IL
, CS2 = V
IH
, I
I/O
= 0 mA
supply current
I
CC1
--
30
45
*5
mA
Min. cycle, duty = 100%,
--
30
55
*6
CS1
= V
IL
, CS2 = V
IH
, I
I/O
= 0 mA
I
CC2
--
3
5
mA
Cycle time = 1 s, duty = 100%,
I
I/O
= 0 mA,
CS1
0.2 V,
CS2
V
CC
0.2 V, V
IH
V
CC
0.2 V,
V
IL
0.2 V
I
SB
--
1
3
mA
CS1
= V
IH
or CS2 = V
IL
I
SB1 *2
--
0.02
2
mA
CS1
V
CC
0.2 V, CS2
V
CC
0.2 V or
------------------------
--
2
*3
100
*3
A
0 V
CS2
0.2 V, 0 V
Vin
------------------
--
2
*4
50
*4
V
OL
--
--
0.4
V
I
OL
= 2.1 mA
V
OH
2.4
--
--
V
I
OH
= 1.0 mA
Notes:
1. Typical values are at V
CC
= 5.0 V, Ta = 25C and not guaranteed.
2. V
IL
min = 0.3 V
3. These characteristics are guaranteed only for the L-version.
4. These characteristics are guaranteed only for the LL-version.
5. For 120 ns/150 ns version.
6. For 100 ns version.
Capacitance (f = 1 MHz, Ta = 25C)
*1
Parameter
Symbol
Typ
Max
Unit
Test condition
Input capacitance
Cin
--
5
pF
Vin = 0 V
Input/output capacitance
C
I/O
--
7
pF
V
I/O
= 0 V
Note:
1. This parameter is sampled and is not 100% tested.
Output voltage
Standby power supply
current
Average operating
current
4
HM6264A Series
HM6264A Series
AC Characteristics (V
CC
= 5 V 10%, Ta = 0 to +70C)
AC Test Conditions:
Input pulse levels: 0.8 V/2.4 V
Input rise and fall time: 10 ns
Input timing reference level: 1.5 V
Output timing reference level
-- HM6264A-10: 1.5 V
-- HM6264A-12/15: 0.8 V/2.0 V
Output load: 1 TTL gate and C
L
(100 pF) (including scope and jig)
Read Cycle
HM6264A-10
HM6264A-12
HM6264A-15
--------------
--------------
--------------
Parameter
Symbol
Min
Max
Min
Max
Min
Max
Unit
Read cycle time
t
RC
100
--
120
--
150
--
ns
Address access time
t
AA
--
100
--
120
--
150
ns
CS1
t
CO1
--
100
--
120
--
150
ns
CS2
t
CO2
--
100
--
120
--
150
ns
Output enable to output valid
t
OE
--
50
--
60
--
70
ns
CS1
t
LZ1
10
--
10
--
15
--
ns
CS2
t
LZ2
10
--
10
--
15
--
ns
Output enable to output in low Z
t
OLZ
5
--
5
--
5
--
ns
CS1
t
HZ1
0
35
0
40
0
50
ns
CS2
t
HZ2
0
35
0
40
0
50
ns
Output disable to output in high Z
t
OHZ
0
35
0
40
0
50
ns
Output hold from address change
t
OH
10
--
10
--
10
--
ns
Notes
1. t
HZ
and t
OHZ
are defined as the time at which the outputs to achieve the open circuit
condition and are not referred to output voltage levels.
2. At any given temperature and voltage condition, t
HZ
maximum is less than t
LZ
minimum both for
a given device and from device to device.
Chip deselection to
output in high Z
Chip selection to output
in low Z
Chip selection to output
5
HM6264A Series
HM6264A Series
PDF 
ZIP