ChipFind - документация

Электронный компонент: HM62V16256CLTT-7SL

Скачать:  PDF   ZIP
HM62V16256C Series
4 M SRAM (256-kword
16-bit)
ADE-203-1099D (Z)
Rev. 1.0
Jan. 31, 2001
Description
The Hitachi HM62V16256C Series is 4-Mbit static RAM organized 262,144-word
16-bit. HM62V16256C
Series has realized higher density, higher performance and low power consumption by employing CMOS
process technology (6-transistor memory cell). It offers low power standby power dissipation; therefore, it is
suitable for battery backup systems. It is packaged in standard 44-pin plastic TSOPII.
Features
Single 2.5 V and 3.0 V supply: 2.2 V to 3.6 V
Fast access time: 55 ns/70 ns (max)
Power dissipation:
Active: 5.0 mW/MHz (typ)(V
CC
= 2.5 V)
: 6.0 mW/MHz (typ) (V
CC
= 3.0 V)
Standby: 2 W (typ) (V
CC
= 2.5 V)
: 2.4 W (typ) (V
CC
= 3.0 V)
Completely static memory.
No clock or timing strobe required
Equal access and cycle times
Common data input and output.
Three state output
Battery backup operation.
2 chip selection for battery backup
HM62V16256C Series
2
Ordering Information
Type No.
Access time
Package
HM62V16256CLTT-5
HM62V16256CLTT-7
55 ns
70 ns
400-mil 44-pin plastic TSOPII (normal-bend type) (TTP-44DB)
HM62V16256CLTT-5SL
HM62V16256CLTT-7SL
55 ns
70 ns
HM62V16256C Series
3
Pin Arrangement
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A4
A3
A2
A1
A0
CS1
I/O0
I/O1
I/O2
I/O3
V
V
I/O4
I/O5
I/O6
I/O7
WE
A17
A16
A15
A14
A13
CC
SS
A5
A6
A7
OE
UB
LB
I/O15
I/O14
I/O13
I/O12
V
V
I/O11
I/O10
I/O9
I/O8
CS2
A8
A9
A10
A11
A12
CC
SS
(Top view)
44-pin TSOP
Pin Description
Pin name
Function
A0 to A17
Address input
I/O0 to I/O15
Data input/output
CS1
Chip select 1
CS2
Chip select 2
WE
Write enable
OE
Output enable
LB
Lower byte select
UB
Upper byte select
V
CC
Power supply
V
SS
Ground
HM62V16256C Series
4
Block Diagram






I/O0
I/O15
CS2
WE
OE
A4 A3 A2
A5
A0
V
V
CC
SS
Row
decoder
Memory matrix
2,048 x 2,048
Column I/O
Column decoder
Input
data
control
Control logic
A6
A12
A11
A10
A9
A8
A13
A14
A15
A16
A17
A7
CS1
LB
UB
A1
LSB
MSB
LSB
MSB
HM62V16256C Series
5
Operation Table
CS1
CS2
WE
OE
UB
LB
I/O0 to I/O7
I/O8 to I/O15
Operation
H
High-Z
High-Z
Standby
L
High-Z
High-Z
Standby
H
H
High-Z
High-Z
Standby
L
H
H
L
L
L
Dout
Dout
Read
L
H
H
L
H
L
Dout
High-Z
Lower byte read
L
H
H
L
L
H
High-Z
Dout
Upper byte read
L
H
L
L
L
Din
Din
Write
L
H
L
H
L
Din
High-Z
Lower byte write
L
H
L
L
H
High-Z
Din
Upper byte write
L
H
H
H
High-Z
High-Z
Output disable
Note: H:
V
IH
, L: V
IL
,
: V
IH
or V
IL
Absolute Maximum Ratings
Parameter
Symbol
Value
Unit
Power supply voltage relative to V
SS
V
CC
0.5 to + 4.6
V
Terminal voltage on any pin relative to V
SS
V
T
0.5*
1
to V
CC
+ 0.3*
2
V
Power dissipation
P
T
1.0
W
Storage temperature range
Tstg
55 to +125
C
Storage temperature range under bias
Tbias
20 to +85
C
Notes: 1. V
T
min: 3.0 V for pulse half-width
30 ns.
2. Maximum voltage is +4.6 V.
DC Operating Conditions
Parameter
Symbol
Min
Typ
Max
Unit
Note
Supply voltage
V
CC
2.2
2.5/3.0
3.6
V
V
SS
0
0
0
V
Input high voltage
V
CC
= 2.2 V to 2.7 V V
IH
2.0
--
V
CC
+ 0.3
V
V
CC
= 2.7 V to 3.6 V V
IH
2.0
--
V
CC
+ 0.3
V
Input low voltage
V
CC
= 2.2 V to 2.7 V V
IL
0.2
--
0.4
V
1
V
CC
= 2.7 V to 3.6 V V
IL
0.3
--
0.6
V
1
Ambient temperature range
Ta
20
--
70
C
Note:
1. V
IL
min: 3.0 V for pulse half-width
30 ns.