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Электронный компонент: HM62W16255CJPI12

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HM62W16255HCI Series
Wide Temperature Range Version
4M High Speed SRAM (256-kword
16-bit)
ADE-203-1263A (Z)
Rev. 1.0
Nov. 1, 2001
Description
The HM62W16255HCI is a 4-Mbit high speed static RAM organized 256-kword
16-bit. It has realized
high speed access time by employing CMOS process (6-transistor memory cell) and high speed circuit
designing technology. It is most appropriate for the application which requires high speed, high density
memory and wide bit width configuration, such as cache and buffer memory in system. The
HM62W16255HCI is packaged in 400-mil 44-pin SOJ and 400-mil 44-pin plastic TSOPII for high density
surface mounting.
Features
Single 3.3 V supply: 3.3 V 0.3 V
Access time: 12 ns (max)
Completely static memory
No clock or timing strobe required
Equal access and cycle times
Directly TTL compatible
All inputs and outputs
Operating current: 130 mA (max)
TTL standby current: 40 mA (max)
CMOS standby current: 5 mA (max)
Center V
CC
and V
SS
type pinout
Temperature range: 40 to +85
C
HM62W16255HCI Series
Rev.1, Nov. 2001, page 2 of 17
Ordering Information
Type No.
Access time
Device marking
Package
HM62W16255HCJPI-12 12 ns
HM62W16255CJPI12
400-mil 44-pin plastic SOJ (CP-44D)
HM62W16255HCTTI-12 12 ns
HM62W16255CTTI12
400-mil 44-pin plastic TSOPII (TTP-44DE)
HM62W16255HCI Series
Rev.1, Nov. 2001, page 3 of 17
Pin Arrangement
Pin Description
Pin name
Function
A0 to A17
Address input
I/O1 to I/O16
Data input/output
CS
Chip select
OE
Output enable
WE
Write enable
UB
Upper byte select
LB
Lower byte select
V
CC
Power supply
V
SS
Ground
NC
No connection
HM62W16255HCI Series
Rev.1, Nov. 2001, page 4 of 17
Block Diagram
HM62W16255HCI Series
Rev.1, Nov. 2001, page 5 of 17
Operation Table
C S
C S
O E
O E W E
W E L B
L B
U B
U B
Mode
V
CC
current
I/O1I/O8
I/O9I/O16
Ref. cycle
H
Standby
I
SB
, I
SB1
High-Z
High-Z
--
L
H
H
Output disable
I
CC
High-Z
High-Z
--
L
L
H
L
L
Read
I
CC
Output
Output
Read cycle
L
L
H
L
H
Lower byte read I
CC
Output
High-Z
Read cycle
L
L
H
H
L
Upper byte read I
CC
High-Z
Output
Read cycle
L
L
H
H
H
--
I
CC
High-Z
High-Z
--
L
L
L
L
Write
I
CC
Input
Input
Write cycle
L
L
L
H
Lower byte write I
CC
Input
High-Z
Write cycle
L
L
H
L
Upper byte write I
CC
High-Z
Input
Write cycle
L
L
H
H
--
I
CC
High-Z
High-Z
--
Note:
H: V
IH
, L: V
IL
,
: V
IH
or V
IL
Absolute Maximum Ratings
Parameter
Symbol
Value
Unit
Supply voltage relative to V
SS
V
CC
0.5 to +4.6
V
Voltage on any pin relative to V
SS
V
T
0.5*
1
to V
CC
+ 0.5*
2
V
Power dissipation
P
T
1.0
W
Operating temperature
Topr
40 to +85
C
Storage temperature
Tstg
55 to +125
C
Storage temperature under bias
Tbias
40 to +85
C
Notes: 1. V
T
(min) = 2.0 V for pulse width (under shoot)
6 ns
2. V
T
(max) = V
CC
+ 2.0 V for pulse width (over shoot)
6 ns