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Электронный компонент: HN27C4000G

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HN27C4000G Series
524288-Word
8-Bit/262144-Word
16-Bit
CMOS UV Erasable and Programmable ROM
Rev. 1
Nov. 10, 1994
The Hitachi HN27C4000 is a 4-Mbit UV erasable
and electrically programmable ROM that is
organized either as 524288-word
8 bit or as
262144-word
16 bit, featuring extra-high speed
burst mode that gives two times faster 4-word or 8-
byte serial access than normal. And also high
speed and fast programming are served as well as
the existing Hitachi 4M device HN27C4096 and
HN27C4001. Fabricated on advanced fine process
and high speed circuitry technique, HN27C4000
makes high speed access time and low power
dissipation in either active or stand-by mode.
Therefore, it is suitable for all systems featuring
high speed microprocessor such as the 80386,
80486, 68030, 68040 and so on.
Features
Organization: 524288-word
8-bit/262144-
word
16-bit (
BYTE/V
PP
enables
selection byte-wide or word-wide)
High speed: Access time 100 ns/120 ns/150 ns
(max)
Burst access time 50 ns/60 ns/60 ns
(max)
Low power dissipation:
Standby mode; 5 W (typ),
Active mode; 150 mW/MHz (typ)
Fast high reliability page programming, fast
high-reliability programming and option
programming: Program voltage; +12.5 V DC
Program time; 3.5 sec (min)
(Theoretical in Page
programming)
Inputs and outputs TTL compatible during both
read and program modes
Pin arrangement: 40-pin EIAJ standard pin
compatible with HN62414/
HN62434
Device identifier mode: Manufacturer code and
device code
ADE-203-311A (Z)
Pin Arrangement
2
HN27C4000G Series
A17
A7
A6
A5
A4
A3
A2
A1
A0
CE
V
OE
I/O0
I/O8
I/O1
I/O9
I/O2
I/O10
I/O3
I/O11
SS
A8
A9
A10
A11
A12
A13
A14
A15
A16
BYTE/V
V
I/O15/A-1
I/O7
I/O14
I/O6
I/O13
I/O5
I/O12
I/O4
V
SS
PP
CC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
HN27C4000G Series
(Top view)
Ordering Information
Access
Type No.
time
Package
HN27C4000G-10
100 ns
600-mil
HN27C4000G-12
120 ns
40-pin cerdip
HN27C4000G-15
150 ns
(DG-40A)
Pin Description
Pin name
Function
A0 A17
Address
I/O0 I/O14
Input/output
I/O15/A-1
Input/output/address
CE
Chip enable
OE
Output enable
V
CC
Power supply
BYTE
/V
PP
Byte/word selection/
Programming power supply
V
SS
Ground
Block Diagram
Mode Selection
Pin
CE
OE
A9
BYTE
/V
PP
V
CC
I/O0 I/O7, I/O8 I/O14, I/O15/A-1
Mode
DG-40A
(10)
(12)
(39)
(31)
(21)
(13 20,
22 28,
29)
Read (X16 bit)
V
IL
V
IL
X
V
IH
V
CC
Dout
Dout
Dout
Read (X8 bit)
V
IL
V
IL
X
V
IL
V
CC
Dout
High-Z
V
IH
/V
IL
Output disable (X16 bit)
V
IL
V
IH
X
V
IH
V
CC
High-Z
High-Z
High-Z
Output disable (X8 bit)
V
IL
V
IH
X
V
IL
V
CC
High-Z
High-Z
V
IH
/V
IL
3
HN27C4000G Series
I/O0
:
:
:
I/O15
X-
Decoder
2,048 x 2,048
Memory Matrix
Y-Decoder
CE
OE
Input
Data
Control
Y-Gating
V
CC
V
V
SS
H
A0 A6
H
: High threshold inverter
A7
:
:
:
:
:
:
:
:
:
:
:
:
A17
PP
. . . . . . . . . . . . .
Mode Selection (cont)
Pin
CE
OE
A9
BYTE
/V
PP
V
CC
I/O0 I/O7, I/O8 I/O14, I/O15/A-1
Mode
DG-40A
(10)
(12)
(39)
(31)
(21)
(13 20,
22 28,
29)
Standby
V
IH
X
X
V
SS
V
CC
V
CC
High-Z
High-Z
High-Z
Page Page program set
V
IH
V
H
*2
X
V
PP
V
CC
High-Z
High-Z
High-Z
prog.
Page data latch
V
IL
V
H
*2
X
V
PP
V
CC
Din
Din
Din
Page program
V
IL
V
IH
X
V
PP
V
CC
High-Z
High-Z
High-Z
Page program verify V
IH
V
IL
X
V
PP
V
CC
Dout
Dout
Dout
Page program reset V
IH
V
IH
X
V
CC
V
CC
High-Z
High-Z
High-Z
Word Program
V
IL
V
IH
X
V
PP
V
CC
Din
Din
Din
prog.
Program verify
V
IH
V
IL
X
V
PP
V
CC
Dout
Dout
Dout
Optional verify
V
IL
V
IL
X
V
PP
V
CC
Dout
Dout
Dout
Program inhibit
V
IH
V
IH
X
V
PP
V
CC
High-Z
High-Z
High-Z
Identifier
V
IL
V
IL
V
H
*2
V
SS
V
CC
V
CC
Code
Code
Code
Notes: 1. X: Don't care.
2. V
H
: 12.0 V 0.5 V
Absolute Maximum Ratings
Item
Symbol
Value
Unit
All input and output voltages
*1
Vin, Vout
0.6
*2
to +7.0
V
Voltage on pin A9 and
OE
V
ID
0.6
*2
to +13.0
V
V
PP
voltage
*1
V
PP
0.6 to +13.5
V
V
CC
voltage
*1
V
CC
0.6 to +7.0
V
Operating temperature range
Topr
0 to +70
C
Storage temperature range
*3
Tstg
65 to +125
C
Storage temperature under bias
Tbias
20 to +80
C
Notes: 1. Relative to V
SS
.
2. Vin, Vout, V
ID
min = 2.0 V for pulse width
20 ns
3. Storage temperature range of device before programming.
4
HN27C4000G Series
Capacitance (Ta = 25C, f = 1 MHz)
Item
Symbol
Min
Typ
Max
Unit
Test conditions
Notes
Input capacitance
Cin
--
--
12
pF
Vin = 0 V
Except
BYTE
/V
PP
Output capacitance
Cout
--
--
20
pF
Vout = 0 V
Read Operation
DC Characteristics (V
CC
= 5 V 10%, V
PP
= V
SS
to V
CC
, Ta = 0 to +70C)
Item
Symbol
Min
Typ
Max
Unit
Test conditions
Input leakage current
I
LI
--
--
2
A
Vin = 5.5 V
Output leakage current
I
LO
--
--
2
A
Vout = 5.5 V/0.45 V
V
PP
current
I
PP1
--
1
20
A
V
PP
= 5.5 V
Standby V
CC
current
I
SB1
--
--
1
mA
CE
= V
IH
I
SB2
--
1
20
A
CE
= V
CC
0.3 V
Operating V
CC
current
I
CC1
--
--
35
mA
Iout = 0 mA, f = 1 MHz
I
CC2
--
--
120
mA
Iout = 0 mA, f = 10 MHz
Input voltage
V
IL
0.3
*1
--
0.8
V
V
IH
2.2
--
V
CC
V
+ 1
*2
Output voltage
V
OL
--
--
0.45
V
I
OL
= 2.1 mA
V
OH
2.4
--
--
V
I
OH
= 400 A
Notes: 1. V
IL
min = 1.0 V for pulse width
50 ns
V
IL
min = 2.0 V for pulse width
20 ns
2. V
IH
max = V
CC
+1.5 V for pulse width
20 ns
If V
IH
is over the specified maximum value, read operation cannot be guaranteed.
5
HN27C4000G Series
AC Characteristics (V
CC
= 5 V 10%, V
PP
= V
SS
to V
CC
, Ta = 0 to +70C)
Test Conditions
Input pulse levels: 0.45 to 2.4 V
Input rise and fall times:
10 ns
Output load: 1 TTL gate +100 pF
Reference levels for measuring timing: 0.8 V, 2.0 V
HN27C4000 HN27C4000 HN27C4000
-10
-12
-15
Item
Symbol
Min
Max
Min
Max
Min
Max
Unit
Test conditions
Address to output delay
t
ACC
--
100
--
120
--
150
ns
CE
=
OE
= V
IL
CE
to output delay
t
CE
--
100
--
120
--
150
ns
OE
= V
IL
OE
to output delay
t
OE
--
60
--
60
--
70
ns
CE
= V
IL
Burst address to
t
BAC
--
50
--
60
--
60
ns
CE
= V
IL
output delay
OE
high to output float
*1
t
DF
0
35
0
40
0
50
ns
CE
= V
IL
Address to output hold
t
OH
5
--
5
--
5
--
ns
CE
=
OE
= V
IL
Note:
1. t
DF
is defined as the time at which the output achieves the open circuit condition and data is no
longer driven.
Read Timing Waveform
6
HN27C4000G Series
Address
CE
OE
Data Out
Data Out Valid
t
ACC
t
CE
t
OE
t
OH
t
DF
Standby mode
Active mode
Standby mode
Read Timing Waveform (Burst access
mode)
In Burst Access mode, fast read-out of 4 word data
is selected by address A0, A1. (Valid only for
Read
16 mode)
7
HN27C4000G Series
tBAC
t CE
t OE
tBAC
tBAC
tBAC
t OH
t OH
t OH
t OH
Valid
Output
Valid
Output
Valid
Output
Valid
Output
A2 to A17
OE
CE
A0, A1
Data Out
t ACC
In Burst Access mode, fast read-out of 8 byte data
is selected by address A-1, A0, A1. (Valid only for
Read
8 mode)
8
HN27C4000G Series
tBAC
t CE
t OE
tBAC
tBAC
tBAC
t
Valid
Output
A2 to A17
OE
CE
A-1, A0, A1
Data Out
t ACC
Valid
Output
Valid
Output
Valid
Output
Valid
Output
Valid
Output
Valid
Output
Valid
Output
t
t
t
t
t
t
t
tBAC
tBAC
tBAC
tBAC
OH
OH
OH
OH
OH
OH
OH
OH
Fast High-Reliability Page
Programming
This device can be applied the high performance
page programming algorithm shown in the
following flowchart. This algorithm allows to
obtain faster programming time without any
voltage stress to the device nor deterioration in
reliability of programmed data.
Page Program Set
Apply 12 V to
OE pin after applying 12.5 V to V
PP
to set a page program mode.
The device operates in a page program mode until
reset.
Page Program Reset
Set V
PP
to V
CC
level or less to reset a page
program mode.
9
HN27C4000G Series
START
SET PAGE PROG LATCH MODE
V = 12.5 0.3 V V = 6.25 0.25 V
= 12.0 0.5 V
PP
CC
OE
Address = 0
n = 0
Latch
Address + 1 Address
Latch
Address + 1 Address
Address + 1 Address
Latch
Latch
n + 1 n
SET PAGE PROG./VERIFY MODE
V = 12.5 0.3 V V = 6.25 0.25 V
PP
CC
Address + 1 Address
NOGO
GO
YES
NOGO
NO
NO
VERIFY
END
FAIL
READ
all address
n = 10?
LAST
address?
SET READ MODE
V = 5.0 0.5 V V = V
PP
CC
CC
GO
Program t = 50 s 5%
PW
YES
Fast High-Reliability Page Programming Flowchart
10
HN27C4000G Series
DC Characteristics (V
CC
= 6.25 V 0.25 V, V
PP
= 12.5 V 0.3 V, Ta = 25C 5C)
Item
Symbol
Min
Typ
Max
Unit
Test conditions
Input leakage current
I
LI
--
--
2
A
Vin = 6.5 V/0.45 V
Output voltage during verify
V
OL
--
--
0.45
V
I
OL
= 2.1 mA
V
OH
2.4
--
--
V
I
OH
= 400 A
Operating V
CC
current
I
CC
--
--
50
mA
Input voltage
V
IL
0.1
*5
--
0.8
V
V
IH
2.2
--
V
CC
V
+ 0.5
*6
V
H
11.5
12.0
12.5
V
V
PP
supply current
I
PP
--
--
70
mA
CE
= V
IL
Notes: 1. V
CC
must be applied simultaneously or before V
PP
and removed simultaneously or after V
PP
.
2. V
PP
must not exceed 13 V including overshoot.
3. An influence may be had upon device reliability if the device is installed or removed while V
PP
=
12.5 V.
4. Do not alter V
PP
either V
IL
to 12.5 V or 12.5 V to V
IL
when
CE
= low.
5. V
IL
min = 0.6 V for pulse width
20 ns.
6. If V
IH
is over the specified maximum value, programming operation cannot be guaranteed.
11
HN27C4000G Series
AC Characteristics (V
CC
= 6.25 V 0.25 V, V
PP
= 12.5 V 0.3 V, Ta = 25C 5C)
Test Conditions
Input pulse levels: 0.45 to 2.4 V
Input rise and fall times:
20 ns
Reference levels for measuring timing: Inputs; 0.8 V, 2.0 V,
Outputs; 0.8 V, 2.0 V
Item
Symbol
Min
Typ
Max
Unit
Test conditions
Address setup time
t
AS
2
--
--
s
OE
setup time
t
OES
2
--
--
s
Data setup time
t
DS
2
--
--
s
Address hold time
t
AH
0
--
--
s
Data hold time
t
DH
2
--
--
s
OE
high to output float delay
t
DF
*1
0
--
130
ns
V
PP
setup time
t
VPS
2
--
--
s
V
CC
setup time
t
VCS
2
--
--
s
CE
initial programming
t
PW
47.5
50.0
52.5
s
pulse width
CE
setup time
t
CES
2
--
--
s
Data valid from
OE
t
OE
0
--
150
ns
CE
pulse width during data latch
t
LW
1
--
--
s
OE
= V
H
setup time
t
OHS
2
--
--
s
OE
= V
H
hold time
t
OHH
2
--
--
s
V
PP
hold time
*2
t
VRS
1
--
--
s
Notes: 1. t
DF
is defined as the time at which the output achieves the open circuit condition and data is no
longer driven.
2. Page program mode will be reset when V
PP
is set to V
CC
or less.
12
HN27C4000G Series
Fast High-Reliability Page Programming Timing Waveform
Program data latch
Page program
Program verify
Data out valid
Data in
stable
Page program mode
t
t
t
t
t
LW
VRS
OES
PW
CES
t
OHH
t
VCS
t
VPS
t
OHS
t
DS
t
DH
t
OE
t
DF
t
AS
t
AH
t
AH
t
AS
A2 A17
A0, A1
Data
V
V
CE
OE
V
V + 1.25
V
PP
V
PP
CC
CC
CC
CC
V
IL
V
H
V
IH
Fast High-Reliability Programming
This device can be applied the fast high-reliability
programming algorithm shown in the following
flowchart. This algorithm allows to obtain faster
programming time without any voltage stress to the
device nor deterioration in reliability of
programmed data.
13
HN27C4000G Series
NOGO
START
Address = 0
n = 0
n + 1 n
SET PROG./VERIFY MODE
V = 12.5 0.3 V V = 6.25 0.25 V
PP
CC
Address + 1 Address
GO
YES
NOGO
NO
NO
VERIFY
END
FAIL
READ
all address
n = 10?
LAST
address?
SET READ MODE
V = 5.0 0.5 V V = V
PP
CC
CC
GO
Program t = 50 s 5%
PW
YES
Fast High-Reliability Programming Flowchart
14
HN27C4000G Series
DC Characteristics (V
CC
= 6.25 V 0.25 V, V
PP
=12.5 V 0.3 V, Ta=25C 5C)
Item
Symbol
Min
Typ
Max
Unit
Test conditions
Input leakage current
I
LI
--
--
2
A
Vin = 6.5 V/0.45 V
V
PP
supply current
I
PP
--
--
40
mA
CE
= V
IL
Operating V
CC
current
I
CC
--
--
50
mA
Input voltage
V
IL
0.1
*5
--
0.8
V
V
IH
2.2
--
V
CC
V
+ 0.5
*6
Output voltage
V
OL
--
--
0.45
V
I
OL
= 2.1 mA
V
OH
2.4
--
--
V
I
OH
= 400 A
Notes: 1. V
CC
must be applied simultaneously or before V
PP
and removed simultaneously or after V
PP
.
2. V
PP
must not exceed 13 V including overshoot.
3. An influence may be had upon device reliability if the device is installed or removed while V
PP
=
12.5 V.
4. Do not alter V
PP
either V
IL
to 12.5 V or 12.5 V to V
IL
when
CE
= low.
5. V
IL
min = 0.6 V for pulse width
20 ns.
6. If V
IH
is over the specified maximum value, programming operation cannot be guaranteed.
AC Characteristics (V
CC
= 6.25 V 0.25 V, V
PP
= 12.5 V 0.3 V, Ta = 25C 5C)
Test Conditions
Input pulse levels: 0.45 to 2.4 V
Input rise and fall times:
20 ns
Reference levels for measuring timings: 0.8 V, 2.0 V
Item
Symbol
Min
Typ
Max
Unit
Test conditions
Address setup time
t
AS
2
--
--
s
OE
setup time
t
OES
2
--
--
s
Data setup time
t
DS
2
--
--
s
Address hold time
t
AH
0
--
--
s
Data hold time
t
DH
2
--
--
s
OE
to output float delay
t
DF
*1
0
--
130
ns
V
PP
setup time
t
VPS
2
--
--
s
V
CC
setup time
t
VCS
2
--
--
s
CE
initial programming
t
PW
47.5
50.0
52.5
s
pulse width
Data valid from
OE
t
OE
0
--
150
ns
Note:
1. t
DF
is defined as the time at which the output achieves the open circuit condition and data is no
longer driven.
Fast High-Reliability Programming Timing Waveform
15
HN27C4000G Series
Program
Program Verify
Address
Data
Data In Stable
Data Out Valid
t
AS
t
DS
t
VPS
t
VCS
t
DH
t
DF
t
AH
t
PW
t
OES
t
OE
V
PP
V
CC
V
PP
V
CC
V
CC
V +1.25
CC
CE
t
DS
OE
Optional Page Programming
This device can be applied the optional page
programming algorithm shown in the following
flowchart. This algorithm allows to obtain faster
programming time without any voltage stress to the
device nor deterioration in reliability of
programmed data.
This programming algorithm is the combination of
page programming and word verify. It can avoid
the increase of programming verify time when a
programmer with slow machine cycle is used, and
shorten the total programming time.
Regarding the timing specifications for page
programming and word verify, please refer to the
specifications for fast high-reliability page
programming and fast high-reliability
programming.
16
HN27C4000G Series
START
SET PAGE PROG LATCH MODE
V = 12.5 0.3 V V = 6.25 0.25 V
= 12.0 0.5 V
PP
CC
OE
Address = 0
Latch
Address + 1 Address
Latch
Address + 1 Address
Address + 1 Address
Latch
Latch
n + 1 n
SET PAGE PROG. MODE
V = 12.5 0.3 V V = 6.25 0.25 V
PP
CC
Address + 1 Address
NOGO
GO
YES
NOGO
NO
NO
VERIFY
END
FAIL
READ
all address
n = 10?
LAST
address?
SET READ MODE
V = 5.0 0.5 V V = V
PP
CC
CC
GO
Program t = 50 s 5%
PW
SET WORD PROG./VERIFY MODE
V = 12.5 0.3 V V = 6.25 0.25 V
PP
CC
PAGE PROG. RESET
V = V = 6.25 0.25 V
PP
CC
Address = 0
n = 0
Address + 1 Address
Program t = 50 s 5%
PW
VERIFY
YES
LAST
all address?
GO
NOGO
YES
Optional Page Programming Flowchart
17
HN27C4000G Series
DC Characteristics (V
CC
= 6.25 V 0.25 V, V
PP
=12.5 V 0.3 V, Ta = 25C 5C)
Item
Symbol
Min
Typ
Max
Unit
Test conditions
Input leakage current
I
LI
--
--
2
A
Vin = 6.5 V/0.45 V
Output voltage during verify
V
OL
--
--
0.45
V
I
OL
= 2.1 mA
V
OH
2.4
--
--
V
I
OH
= 400 A
Operating V
CC
current
I
CC
--
--
50
mA
Input voltage
V
IL
0.1
*5
--
0.8
V
V
IH
2.2
--
V
CC
V
+ 0.5
*6
V
H
11.5
12.0
12.5
V
V
PP
supply current
I
PP
--
--
70
mA
CE
= V
IL
Notes: 1. V
CC
must be applied simultaneously or before V
PP
and removed simultaneously or after V
PP
.
2. V
PP
must not exceed 13 V including overshoot.
3. An influence may be had upon device reliability if the device is installed or removed while V
PP
=
12.5 V.
4. Do not alter V
PP
either V
IL
to 12.5 V or 12.5 V to V
IL
when
CE
= low.
5. V
IL
min = 0.6 V for pulse width
20 ns.
6. If V
IH
is over the specified maximum value, programming operation cannot be guaranteed.
18
HN27C4000G Series
AC Characteristics (V
CC
= 6.25 V 0.25 V, V
PP
= 12.5 V 0.3 V, Ta = 25C 5C)
Test Conditions
Input pulse levels: 0.45 to 2.4 V
Input rise and fall times:
20 ns
Reference levels for measuring timings: Inputs;
0.8 V, 2.0 V
Outputs; 0.8 V, 2.0 V
Item
Symbol
Min
Typ
Max
Unit
Test conditions
Address setup time
t
AS
2
--
--
s
OE
setup time
t
OES
2
--
--
s
Data setup time
t
DS
2
--
--
s
Address hold time
t
AH
0
--
--
s
Data hold time
t
DH
2
--
--
s
OE
high to output float delay
t
DF
*1
0
--
130
ns
V
PP
setup time
t
VPS
2
--
--
s
V
CC
setup time
t
VCS
2
--
--
s
CE
initial programming
t
PW
47.5
50.0
52.5
s
pulse width
CE
setup time
t
CES
2
--
--
s
Data valid from
OE
t
OE
0
--
150
ns
CE
pulse width during data latch
t
LW
1
--
--
s
OE
= V
H
setup time
t
OHS
2
--
--
s
OE
= V
H
hold time
t
OHH
2
--
--
s
Page programming reset time
*2
t
VLW
1
--
--
s
V
PP
hold time
*2
t
VRS
1
--
--
s
Notes: 1. t
DF
is defined as the time at which the output achieves the open circuit condition and data is no
longer driven.
2. Page program mode will be reset when V
PP
is set to V
CC
or less.
Option Page Programming Timing Waveform
19
HN27C4000G Series
Program data latch Page program
Program verify
Page program mode
t
t
t LW
OES
PW
tOHH
t
VCS
t
VPS
t
DS
t
DH
t
OE
t
DS
t
AS
t
AH
t
AH
t
AS
A2 A17
A0, A1
Data
V
V
CE
OE
V
V + 1.25
V
PP
V
PP
CC
CC
CC
CC
VIL
V
H
VIH
t
AH
Word program mode
Program
t
DF
t
VPS
t
DF
t
VRS
t
VLW
t CES
t CES
t PW
t
OHS
Data in
stable
Data
out
valid
Data in stable
20
HN27C4000G Series
Erase
Erasure of this device is performed by exposure to
ultraviolet light of 2537 and all the output data
are changed to "1" after this erasure procedure.
The minimum integrated dose (i.e. UV intensity X
exposure time) for erasure is 15 Wsec/cm
2
.
Mode Description
Device Identifier Mode
The device identifier mode allows the reading out
of binary codes that identify manufacturer and type
of device, from outputs of EPROM. By this mode,
the device will be automatically matched its own
corresponding programming algorithm, using
programming equipment.
HN27C4000G Identifier Code
A0
I/O8 I/O15 I/O7
I/O6
I/O5
I/O4
I/O3
I/O2
I/O1
I/O0
Hex
Identifier
DG-40 (9)
--
(28) (26)
(24)
(22)
(19)
(17)
(15)
(13)
Data
Manufacturer code
V
IL
X
0
0
0
0
0
1
1
1
07
Device code
V
IH
X
1
0
1
0
0
0
0
1
A1
Notes: 1. V
CC
= 5.0 V 10%
2. A9 = 12.0 V 0.5 V
3.
CE
,
OE
= V
IL
4. A1 A8, A10 A17: Don't care.
5. X: Don't care.