HT16511
1/8 to 1/16 Duty VFD Controller
Block Diagram
Rev. 1.10
1
September 18, 2003
Features
Logic voltage: 5V
High-voltage output: V
DD
-35V max.
Multiple display
(12-segment & 16-digit to 20-segment & 8-digit)
12
4 matrix key scanning
8 steps dimmer circuit
5 LED output ports (20mA max.)
4-bit general purpose input port
No external resistors necessary for driver output
(provides PMOS open-drain and pull-low resistor
output)
Serial interface with MCU (CLK, CS, DI, DO)
52-pin QFP package
Applications
Consumer products panel function control
Industrial measuring instrument panel function control
Other similar application panel function control
General Description
HT16511 is a VFD (Vacuum Fluorescent Display) con-
troller/driver that is driven on a 1/8 to 1/16 duty factor. It
consists of 12 segment output lines, 8 grid output lines,
8 segment/grid output drive lines, 5 LED output ports, a
control circuit, a display memory, and a key scan circuit.
Serial data inputs to the HT16511 through a three-line
serial interface. This VFD controller/driver is ideal as a
peripheral device for an MCU.
D I
S e r i a l I / F
D i s p l a y R A M
2 0 - B i t 1 6 W o r d s
T i m i n g G e n e r a t o r
K e y S c a n
4 - B i t
L a t c h
K e y D a t a R A M
( 4 1 2 )
O S C
5 - B i t L a t c h
S 1 / K 1 ~
S 1 2 / K 1 2
S W 0 ~ S W 3
L E D 0 ~ L E D 4
C S
C L K
D O
O S C
2 0 - B i t
O u t p u t L a t c h
S e g m e n t
D r i v e r
2 0
1 2
K 0 ~ K 3
1 6 - B i t
S h i f t R e g i s t e r
M u l t i p l e x e d
D r i v e r
G r i d
D r i v e r
1 6
8
8
8
D i m m i n g C i r c u i t
D a t a
S e l e c t o r
8
1 2
S 1 3 / G 1 6 ~
S 2 0 / G 6
8
G 1 ~ G 8
8
V D D
V S S
V E E
C o m m a n d D e c o d e r
Pin Assignment
Pad Assignment
Chip Size: 103.5
70.5 (mil)
2
* The IC substrate should be connected to VSS in the PCB layout artwork.
HT16511
Rev. 1.10
2
September 18, 2003
1
2
3
4
5
6
7
8
9
1 0
1 1
1 2
1 3
1 4 1 5 1 6 1 7 1 8 1 9 2 0 2 1 2 2
3 4
3 5
3 6
3 7
3 8
3 9
4 8
4 9
5 0
5 1
5 2
S W 1
S W 2
S W 3
D O
D I
C L K
C S
K 0
K 1
N C
K 2
K 3
V
D
D
S
8
/
K
8
S
1
/
K
1
S
2
/
K
2
S
3
/
K
3
S
4
/
K
4
S
5
/
K
5
S
6
/
K
6
S
7
/
K
7
G
3
2 3 2 4 2 5 2 6
2 7
2 8
2 9
3 0
3 1
3 2
3 3
S 1 8 / G 1 1
V E E
S 1 9 / G 1 0
S 2 0 / G 9
G 8
G 7
G 6
V D D
G
2
G
1
L
E
D
4
L
E
D
3
L
E
D
2
L
E
D
1
L
E
D
0
V
S
S
O
S
C
H T 1 6 5 1 1
5 2 Q F P - A
4 0
4 1
4 2
4 3
4 4
4 5
4 6
4 7
S W 4
S
9
/
K
9
S
1
0
/
K
1
0
S
1
1
/
K
1
1
S
1
2
/
K
1
2
S 1 3 / G 1 6
S 1 4 / G 1 5
S 1 5 / G 1 4
S 1 6 / G 1 3
S 1 7 / G 1 2
G
5
G
4
V
D
D
1
2
3
4
5
6
7
8
9
1 0
1 1
1 2
1 3
1 4
1 5 1 6 1 7 1 8 1 9 2 0 2 1 2 2 2 3 2 4 2 5
2 7
2 8
2 9
3 0
3 1
3 2
2 6
3 3
3 4
3 5
3 6
3 7
3 8
3 9
4 0
4 1
4 2
4 3
4 4
4 5
4 6
4 7
4 8
4 9
5 0
5 1
( 0 , 0 )
O S C
S W 1
S W 2
S W 3
S W 4
D O
D I
C L K
K 0
K 1
K 2
K 3
C S
V
D
D
S
1
/
K
1
S
2
/
K
2
S
3
/
K
3
S
4
/
K
4
S
5
/
K
5
S
6
/
K
6
S
7
/
K
7
S
8
/
K
8
S
9
/
K
9
S
1
0
/
K
1
0
S
1
1
/
K
1
1
S
1
2
/
K
1
2
S 1 8 / G 1 1
S 1 7 / G 1 2
S 1 6 / G 1 3
S 1 5 / G 1 4
S 1 4 / G 1 5
S 1 3 / G 1 6
G 7
G 8
S 2 0 / G 9
S 1 9 / G 1 0
V E E
V D D
G 6
G 5
G
4
G
3
G
2
G
1
V
D
D
L
E
D
4
L
E
D
3
L
E
D
2
L
E
D
1
L
E
D
0
V
S
S
Pad Coordinates
Unit:
mm
Pad No.
X
Y
Pad No.
X
Y
1
-1110.000
555.300
27
977.250
-720.000
2
-1110.000
450.300
28
977.250
-612.000
3
-1110.000
345.300
29
977.250
-504.000
4
-1110.000
240.300
30
977.250
-396.000
5
-1110.000
135.300
31
977.250
-288.000
6
-1165.900
9.800
32
977.250
-180.000
7
-1110.000
-125.500
33
977.250
-55.150
8
-1110.000
-230.500
34
977.250
49.850
9
-1110.000
-335.500
35
977.250
173.350
10
-1110.000
-440.500
36
977.250
281.350
11
-1110.000
-545.500
37
977.250
389.350
12
-1110.000
-650.500
38
977.250
497.350
13
-1110.000
-755.500
39
977.250
605.350
14
-897.200
-560.300
40
977.250
713.350
15
-782.500
-560.300
41
405.500
545.400
16
-674.500
-560.300
42
297.500
545.400
17
-566.500
-560.300
43
189.500
545.400
18
-458.500
-560.300
44
81.500
545.400
19
-350.500
-560.300
45
-34.700
545.400
20
-242.500
-560.300
46
-173.950
684.850
21
-134.500
-560.300
47
-285.150
684.850
22
-26.500
-560.300
48
-390.150
684.850
23
81.500
-560.300
49
-501.350
684.850
24
189.500
-560.300
50
-606.350
684.850
25
297.500
-560.300
51
-765.200
726.350
26
405.500
-560.300
Pin Description
Pin No.
Pin Name
I/O
Description
1~4
SW1~SW4
I
4-bit general purpose input port
5
DO
O
Output serial data at the falling edge of the shift clock, starting from low order
bit. This is an NMOS open-drain output pin.
6
DI
I
Input serial data at the rising edge of the shift clock, starting from the low order
bit.
7
NC
No connection
8
CLK
I
Reads serial data at the rising edge, and outputs data at the falling edge.
9
CS
I
Initializes serial interface at the rising or falling edge of the HT16511. Then it
waits to receive a command. Data input after CS has fallen is processed as a
command. While command data is processed, current processing is stopped,
and the serial interface is initialized. While CS is high, CLK is ignored.
10~13
K0~K3
I
Keying data input to these pins is latched at the end of the display cycle.
14, 33, 45 VDD
Posistive power supply
15~26
S1/K1~S12/K12
O
Segment or key source output pins (dual function). This is PMOS open-drain
and pull-low resistor output.
27~32,
35~36
S13/G16~S20/G9
O
Segment or Grid driver output pins. These pins are selectable for segment or
grid driving. This is PMOS open-drain and pull-low resistor output.
34
VEE
VFD power supply
37~44
G8~G1
O
Grid driver output pins (Grid only). This is PMOS open-drain and pull-low re-
sistor output.
46~50
LED4~LED0
O
LED driver output ports. This is a CMOS output pin.
51
VSS
Negative power supply, ground
52
OSC
I
Connected to an external resistor or an RC oscillator circuit.
HT16511
Rev. 1.10
3
September 18, 2003
Approximate Internal Connections
Absolute Maximum Ratings
Supply Voltage ...........................V
SS
-0.3V to V
SS
+6.0V
Operating Temperature...........................
-25C to 75C
Input Voltage..............................V
SS
-0.3V to V
DD
+0.3V
Storage Temperature ............................
-50C to 125C
Note: These are stress ratings only. Stresses exceeding the range specified under
Absolute Maximum Ratings may
cause substantial damage to the device. Functional operation of this device at other conditions beyond those
listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliabil-
ity.
D.C. Characteristics
Ta=25
C
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
V
DD
Conditions
V
DD
Logic Supply Voltage
4.5
5
5.5
V
V
EE
VFD Supply Voltage
0
V
DD
-35
V
f
OSC
Oscillation Frequency
5V
R
OSC
=51k
W
350
500
650
kHz
R
PL
Output Pull-low Resistor
5V
Driver output
50
100
150
k
W
I
DD
Operating Current
5V
No load, VFD display off
5
mA
I
OL
Driver Leakage Current
5V
V
O
=V
DD
-30V, VFD driver off
-10
mA
I
OL1
LED Sink Current
5V
V
OL
=1V, LED0~LED4
20
mA
I
OH1
LED Source Current
5V
V
OH
=0.9V
DD
, LED0~LED4
-1
mA
I
OH21
Segment/Key Source Current
5V
V
OH
=V
DD
-2V, S1/K1~S12/K12
-3
mA
I
OH22
Segment/Grid Source Current
5V
V
OH
=V
DD
-2V
-15
mA
I
OL3
DO Sink Current
5V
V
OL
=0.4V
4
mA
V
IH
H Input Voltage
0.7V
DD
V
DD
V
V
IL
L Input Voltage
0
0.3V
DD
V
V
OH1
High-level Output Voltage
5V
LED0~LED4, I
OH1
=
-1mA
0.9V
DD
V
DD
V
V
OL1
Low-level Output Voltage
5V
LED0~LED4, I
OL1
=20mA
0
1
V
V
OL2
Low-level Output Voltage
5V
DO, I
OL2
=4mA
0
0.4
V
HT16511
Rev. 1.10
4
September 18, 2003
N M O S O U T
V
D D
P M O S O U T
C M O S O U T
V
D D
V
E E
A.C. Characteristics
Ta=25
C
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
V
DD
Conditions
t
PHL
Propagation Delay Time
5V
CLK
DO
C
L
=15pF, R
L
=10k
W
300
ns
t
PLH
5V
100
ns
t
r1
Rise Time
5V
C
L
=300pF, S0~S12
2
ms
t
r2
5V
C
L
=300pF, G1~G16
0.5
ms
t
f
Fall Time
5V
C
L
=300pF, Sn, Gn
120
ms
t
max
Maximum Clock Frequency
5V
Duty=50%
1
MHz
C
i
Input Capacitance
5V
15
pF
t
CW
Clock Pulse Width
5V
400
ns
t
SW
Strobe Pulse Width
5V
1
us
t
SU
Data Setup Time
5V
100
ns
t
h
Data Hold Time
5V
100
ns
t
CS
Clock-Strobe Time
5V
CLK rising edge to CS rising edge
1
ms
t
W
Wait Time
5V
CLK rising edge to CLK falling edge
1
ms
HT16511
Rev. 1.10
5
September 18, 2003
Functional Description
Display RAM and Display Mode
The static display RAM is organized into 40
8 bits and
stores the data transmitted from an external device to
the HT16511 through a serial interface. The contents of
the RAM are directly mapped to the contents of the VFD
driver. Data in the RAM can be accessed through the
data setting, address setting and display control com-
mands. It is assigned addresses in 8-bit unit as follows:
Note:
Only the lower 4 bits of the addresses assigned
to SEG17 through SEG20 are valid, the higher
4 bits are ignored.
Dimming Control
HT16511 provides 8-step dimmer function on display by
controlling the 3-bit binary command code. The full
pulse width of grid signal is divides into 16 uniform sec-
tions by PWM (pulse width modulation) technology.
The 16 uniform sections available form 8 steps dimmer
via 3-bit binary code. The 8-step dimmer includes 1/16,
2/16, 4/16, 10/16, 11/16, 12/16, 13/16 and 14/16. The
1/16 pulse width indicates minimum lightness. The
14/16 pulse width represents maximum lightness (Refer
to the display control command).
Key Matrix and Key-Input Data Storage RAM
The key matrix scans the series key states at each level
of the key strobe signal (S1/K1~S12/K12) output of the
H T 1 6 5 11 . T h e k e y s t r o b e s i g n a l o u t p u t s a r e
time-multiplexed signals from S1/K1~S12/K12. The
states of inputs K0~K3 are sampled by strobe signal
S1/K1~S12/K12 and latched into the register.
0 1 H
U
0 4 H
U
0 7 H
U
0 A H
U
0 D H
U
1 0 H
U
1 3 H
U
1 6 H
U
1 9 H
U
1 C H
U
1 F H
U
2 2 H
U
2 5 H
U
2 8 H
U
2 B H
U
2 E H
U
0 0 H
L
0 3 H
L
0 6 H
L
0 9 H
L
0 C H
L
0 F H
L
1 2 H
L
1 5 H
L
1 8 H
L
1 B H
L
1 E H
L
2 1 H
L
2 4 H
L
2 7 H
L
2 A H
L
2 D H
L
0 0 H
U
0 3 H
U
0 6 H
U
0 9 H
U
0 C H
U
0 F H
U
1 2 H
U
1 5 H
U
1 8 H
U
1 B H
U
1 E H
U
2 1 H
U
2 4 H
U
2 7 H
U
2 A H
U
2 D H
U
S E G 1
S E G 4
S E G 8
S E G 1 2
S E G 1 6
S E G 2 0
0 1 H
L
0 4 H
L
0 7 H
L
0 A H
L
0 D H
L
1 0 H
L
1 3 H
L
1 6 H
L
1 9 H
L
1 C H
L
1 F H
L
2 2 H
L
2 5 H
L
2 8 H
L
2 B H
L
2 E H
L
0 2 H
L
0 5 H
L
0 8 H
L
0 B H
L
0 E H
L
1 1 H
L
1 4 H
L
1 7 H
L
1 A H
L
1 D H
L
2 0 H
L
2 3 H
L
2 6 H
L
2 9 H
L
2 C H
L
2 F H
L
D I G 1
D I G 2
D I G 3
D I G 4
D I G 5
D I G 6
D I G 7
D I G 8
D I G 9
D I G 1 0
D I G 1 1
D I G 1 2
D I G 1 3
D I G 1 4
D I G 1 5
D I G 1 6
X X H L
X X H U
b 0
b 3 b 4
b 7
L o w e r
4 b i t s
H i g h e r
4 b i t s
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