ChipFind - документация

Электронный компонент: HT48R05A-1

Скачать:  PDF   ZIP

Document Outline

HT48R05A-1
8-Bit OTP Microcontroller
1
February 25, 2000
General Description
The device is an 8-bit high performance
RISC-like microcontroller designed for multi-
ple I/O product applications. The device is par-
ticularly suitable for use in products such as
remote controllers, fan/light controllers, wash-
ing machine controllers, scales, toys and vari-
ous subsystem controllers. A halt feature is
included to reduce power consumption.
The program and option memories can be elec-
trically programmed, making the microcontrol-
ler suitable for use in product development.
Features
Operating voltage:
f
SYS
=4MHz: 3.3V~5.5V
f
SYS
=8MHz: 4.5V~5.5V
13 bidirectional I/O lines
An interrupt input shared with an I/O line
8-bit programmable timer/event counter with
overflow interrupt and 8-stage prescaler
On-chip crystal and RC oscillator
Watchdog timer
51214 program memory PROM
328 data memory RAM
Buzzer driving pair and PFD supported
Halt function and wake-up feature reduce
power consumption
Up to 0.5ms instruction cycle with 8MHz
system clock at V
DD
=5V
All instructions in one or two machine cy-
cles
14-bit table read instruction
Two-level subroutine nesting
Bit manipulation instruction
63 powerful instructions
Low voltage reset function
Preliminary
Block Diagram
Pin Assignment
HT48R05A-1
2
February 25, 2000
Preliminary
P A 4
P A 5
P A 6
P A 7
O S C 2
O S C 1
V D D
R E S
P C 1 / T M R
H T 4 8 R 0 5 A - 1
1 8 D I P / S O P
P A 3
P A 2
P A 1
P A 0
P B 2
P B 1 / B Z
P B 0 / B Z
V S S
P C 0 / I N T
1 8
1 7
1 6
1 5
1 4
1 3
1 2
1 1
1 0
1
2
3
4
5
6
7
8
9
I N T / P C 0
O S C 2
O S C 1
R E S
V D D
M U X
P A C
P A
P O R T A
P A 0 ~ P A 7
T M R / P C 1
S Y S C L K / 4
W D T S
W D T
P C C
P C
P O R T C
P C 0 ~ P C 1
P B C
P B
P O R T B
P B 0 ~ P B 2
T M R
T M R C
V S S
P r e s c a l e r
f
S Y S
B Z / B Z
P C 0
P C 1
P r o g r a m
R O M
P r o g r a m
C o u n t e r
I n t e r r u p t
C i r c u i t
S T A C K 0
S T A C K 1
I N T C
D A T A
M e m o r y
I n s t r u c t i o n
R e g i s t e r
M
U
X
I n s t r u c t i o n
D e c o d e r
S T A T U S
A L U
S h i f t e r
T i m i n g
G e n e r a t o r
A C C
O p t i o n
P R O M
R C O S C
W D T P r e s c a l e r
M
U
X
M
U
X
M P
Pin Description
Pin No. Pin Name I/O ROM Code
Option
Description
4~1,
18~15
PA0~PA7
I/O Pull-high*
Wake-up
Bidirectional 8-bit input/output port. Each bit can be
configured as wake-up input by ROM code option.
Software instructions determine the CMOS output or
schmitt trigger input with a pull-high resistor (deter-
mined by pull-high options).
7
6
5
PB0/BZ
PB1/BZ
PB2
I/O
Pull-high*
I/O or
BZ/BZ
Bidirectional 3-bit input/output port. Software in-
structions determine the CMOS output or schmitt
trigger input with a pull-high resistor (determined by
pull-high options).
The PB0 and PB1 are pin-shared with the BZ and BZ,
respectively. Once the PB0 and PB1 are selected as
buzzer driving outputs, the output signals come from
an internal PFD generator (shared with timer/event
counter).
8
VSS
Negative power supply, ground
9
10
PC0/INT
PC1/TMR
I/O Pull-high*
Bidirectional I/O lines. Software instructions deter-
mine the CMOS output or SCHMITT trigger input
with a pull-high resistor (determined by pull-high op-
tions). The external interrupt and timer input are
pin-shared with the PC0 and PC1, respectively. The
external interrupt input is activated on a high to low
transition.
11
RES
I
Schmitt trigger reset input. Active low
12
VDD
Positive power supply
13
14
OSC1
OSC2
I
O
Crystal
or RC
OSC1, OSC2 are connected to an RC network or Crys-
tal (determined by ROM code option) for the internal
system clock. In the case of RC operation, OSC2 is the
output terminal for 1/4 system clock.
* All pull-high resistors are controlled by an option bit.
Absolute Maximum Ratings
Supply Voltage ...............V
SS
-0.3V to V
SS
+5.5V
Storage Temperature.................-50C to 125C
Input Voltage.................V
SS
-0.3V to V
DD
+0.3V
Operating Temperature ..............-40C to 85C
Note: These are stress ratings only. Stresses exceeding the range specified under "Absolute Maxi-
mum Ratings" may cause substantial damage to the device. Functional operation of this device
at other conditions beyond those listed in the specification is not implied and prolonged expo-
sure to extreme conditions may affect device reliability.
HT48R05A-1
3
February 25, 2000
Preliminary
D.C. Characteristics
Ta=25C
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
V
DD
Conditions
V
DD1
Operating Voltage
f
SYS
=4MHz
3.3
5.5
V
V
DD2
Operating Voltage
f
SYS
=8MHz
4.5
5.5
V
I
DD1
Operating Current
(Crystal OSC)
3.3V
No load, f
SYS
=4MHz
1
2
mA
5V
2
4
mA
I
DD2
Operating Current
(RC OSC)
3.3V
No load, f
SYS
=4MHz
1
2
mA
5V
2
4
mA
I
DD3
Operating Current
(Crystal OSC)
5V No load, f
SYS
=8MHz
5
10
mA
I
STB1
Standby Current
(WDT Enabled)
3.3V
No load, system Halt
5
mA
5V
10
mA
I
STB2
Standby Current
(WDT Disabled)
3.3V
No load, system Halt
1
mA
5V
2
mA
V
IL1
Input Low Voltage for
I/O ports, TMR and INT
3.3V
0
0.2V
DD
V
5V
0
0.2V
DD
V
V
IH1
Input High Voltage for
I/O ports, TMR and INT
3.3V
0.8V
DD
V
DD
V
5V
0.8V
DD
V
DD
V
V
IL2
Input Low Voltage
(RES)
3.3V
0
0.4V
DD
V
5V
0
0.4V
DD
V
V
IH2
Input High Voltage
(RES)
3.3V
0.9V
DD
V
DD
V
5V
0.9V
DD
V
DD
V
I
OL
I/O Port Sink Current
3.3V V
OL
=0.1V
DD
4
8
mA
5V V
OL
=0.1V
DD
10
20
mA
I
OH
I/O Port Source
Current
3.3V V
OH
=0.9V
DD
-2
-4
mA
5V V
OH
=0.9V
DD
-5
-10
mA
R
PH
Pull-high Resistance
3.3V
40
60
80
kW
5V
10
30
50
kW
V
LVR
Low Voltage Reset
3.1
3.2
3.3
V
HT48R05A-1
4
February 25, 2000
Preliminary
A.C. Characteristics
Ta=25C
Symbol
Parameter
Test Conditions
Min. Typ. Max. Unit
V
DD
Conditions
f
SYS1
System Clock
(Crystal OSC)
3.3V
400
4000 kHz
5V
400
8000 kHz
f
SYS2
System Clock (RC OSC)
3.3V
400
4000 kHz
5V
400
4000 kHz
f
TIMER
Timer I/P Frequency (TMR)
3.3V
0
4000 kHz
5V
0
4000 kHz
t
WDTOSC
Watchdog Oscillator
3.3V
43
86
168
ms
5V
35
65
130
ms
t
WDT1
Watchdog time-out Period
(RC)
3.3V Without WDT
prescaler
11
22
43
ms
5V
9
17
35
ms
t
WDT2
Watchdog Time-out Period
(System Clock)
Without WDT
prescaler
1024
t
SYS
t
RES
External Reset Low Pulse
Width
1
ms
t
SST
System Start-up Timer
Period
Power-up, reset or
wake-up from Halt
1024
t
SYS
t
INT
Interrupt Pulse Width
1
ms
HT48R05A-1
5
February 25, 2000
Preliminary