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Электронный компонент: BTS736L2

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PROFET BTS 736 L2
Semiconductor Group
1 of 14
2003-Oct-01
Smart High-Side Power Switch
Two Channels: 2 x 40m
Status Feedback
Product Summary Package
Operating Voltage
V
bb(on)
4.75...41V
Active channels one
two parallel
On-state Resistance
R
ON
40m
20m
Nominal load current
I
L(NOM)
4.8A
7.3A
Current limitation
I
L(SCr)
30A
30A
General Description
N channel vertical power MOSFET with charge pump, ground referenced CMOS compatible input and
diagnostic feedback, monolithically integrated in Smart SIPMOS
technology.
Providing embedded protective functions
Applications
C compatible high-side power switch with diagnostic feedback for 5V, 12V and 24V grounded loads
All types of resistive, inductive and capacitve loads
Most suitable for loads with high inrush currents, so as lamps
Replaces electromechanical relays, fuses and discrete circuits
Basic Functions
Very low standby current
CMOS compatible input
Fast demagnetization of inductive loads
Stable behaviour at undervoltage
Wide operating voltage range
Logic ground independent from load ground
Protection Functions
Short circuit protection
Overload protection
Current
limitation
Thermal
shutdown
Overvoltage protection (including load dump) with external
resistor
Reverse battery protection with external resistor
Loss of ground and loss of V
bb
protection
Electrostatic discharge protection (ESD)
Diagnostic Function
Diagnostic feedback with open drain output
Open load detection in ON-state
Feedback of thermal shutdown in ON-state
Block Diagram
P-DSO-20-9
Vbb
Logic
Channel
1
Logic
Channel
2
IN1
ST1
IN2
ST2
GND
Load 1
Load 2
PROFET
OUT 1
OUT 2

BTS 736 L2
Semiconductor Group
2
2003-Oct-01
Functional diagram





























Pin Definitions and Functions
Pin
Symbol Function
1,10,
11,12,
15,16,
19,20
V
bb
Positive power supply voltage. Design the
wiring for the simultaneous max. short circuit
currents from channel 1 to 2 and also for low
thermal resistance
3 IN1
Input 1,2, activates channel 1,2 in case of
7
IN2
logic high signal
17,18 OUT1 Output 1,2, protected high-side power output
13,14
OUT2
of channel 1,2. Design the wiring for the max.
short circuit current
4 ST1
Diagnostic feedback 1,2 of channel 1,2,
8
ST2
open drain, low on failure
2 GND1
Ground 1 of chip 1 (channel 1)
6 GND2
Ground 2 of chip 2 (channel 2)
5,9 N.C. Not Connected
Pin configuration

(top view)
V
bb
1
20 V
bb
GND1 2
19 V
bb
IN1 3
18 OUT1
ST1 4
17 OUT1
N.C. 5
16 V
bb
GND2 6
15 V
bb
IN2 7
14 OUT2
ST2 8
13 OUT2
N.C. 9
12 V
bb
V
bb
10
11 V
bb
OUT1
overvoltage
protection



logic
internal
voltage supply

ESD
temperature
sensor
clamp for
inductive load
gate
control
+
charge
pump
current limit
Open load
detection
ST1
VBB
LOAD
IN1
PROFET
GND1
Control and protection circuit
of
channel 2
IN2
ST2
OUT2
Channel 1
GND2

BTS 736 L2
Semiconductor Group
3
2003-Oct-01
Maximum Ratings
at T
j
= 25C unless otherwise specified
Parameter Symbol
Values
Unit
Supply voltage (overvoltage protection see page 4)
V
bb
43
V
Supply voltage for full short circuit protection
T
j,start
=
-40 ...+150C
V
bb
24
V
Load current (Short-circuit current, see page 5)
I
L
self-limited
A
Load dump protection
1
)
V
LoadDump
= V
A
+ V
s
, V
A
= 13.5 V
R
I
2
)
= 2
, t
d
= 200
ms; IN
= low or high,
each channel loaded with R
L
=
9.0
,
V
Load
dump
3
)
60
V
Operating temperature range
Storage temperature range
T
j
T
stg
-40 ...+150
-55 ...+150
C
Power dissipation (DC)
4)
T
a
= 25C:
(all channels active)
T
a
= 85C:
P
tot
3.8
2.0
W
Maximal switchable inductance, single pulse
V
bb
=
12V, T
j,start
=
150C
4)
,
I
L
=
4.0
A, E
AS
=
296 mJ, 0
one
channel:
I
L
=
6.0
A, E
AS
=
631 mJ, 0
two parallel channels:
see diagrams on page 9


Z
L
19.0
17.5
mH
Electrostatic discharge capability (ESD)
IN:
(Human Body Model)
ST:
out to all other pins shorted:
acc. MIL-STD883D, method 3015.7 and ESD assn. std. S5.1-1993
R=1.5k
; C=100pF
V
ESD
1.0
4.0
8.0
kV
Input voltage (DC)
V
IN
-10 ... +16
V
Current through input pin (DC)
Current through status pin (DC)
see internal circuit diagram page 8
I
IN
I
ST
2.0
5.0
mA
Thermal Characteristics
Parameter and Conditions Symbol
Values
Unit
min typ
Max
Thermal resistance
junction - soldering point
4),5)
each
channel:
R
thjs
-- --
12
K/W
junction - ambient
4)
one channel active:
all channels active:
R
thja
--
--
40
33
--
--
1
) Supply voltages higher than V
bb(AZ)
require an external current limit for the GND and status pins (a 150
resistor for the GND connection is recommended.
2)
R
I
= internal resistance of the load dump test pulse generator
3)
V
Load dump
is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839
4
) Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm
2
(one layer, 70
m thick) copper area for Vbb
connection. PCB is vertical without blown air. See page 14
5
) Soldering point: upper side of solder edge of device pin 15. See page 14
BTS 736 L2
Semiconductor Group
4
2003-Oct-01
Electrical Characteristics
Parameter and Conditions,
each of the two channels
Symbol
Values
Unit
at T
j
= -40...+150C, V
bb
= 12 V unless otherwise specified
min typ
Max
Load Switching Capabilities and Characteristics
On-state resistance (Vbb to OUT);
IL = 2 A, V
bb
7V
each channel, T
j
= 25C:
T
j
= 150C:
two parallel channels, T
j
= 25C:
see diagram, page 10

R
ON
--
36
67
18
40
75
20
m
Nominal load current
one channel active:
two parallel channels active:
Device on PCB
6
), Ta
=
85C, Tj
150C
I
L(NOM)
4.4
6.7
4.8
7.3
--
A
Output current
while GND disconnected or pulled
up
7
)
;
Vbb = 30 V, VIN = 0, see diagram page 8
I
L(GNDhigh)
-- -- 2
mA
Turn-on time
8
)
IN
to 90% V
OUT
:
Turn-off time
IN
to 10% V
OUT
:
R
L
=
12
t
on
t
off
50
50
100
120
200
250
s
Slew rate on
8)
T
j
= -40C:
10 to 30% V
OUT
,
R
L
=
12
T
j
= 25C...150C:
dV/dt
on
0.15
0.15
--
--
1
0.8
V/
s
Slew rate off
8)
T
j
= -40C:
70 to 40% V
OUT
, R
L
=
12
T
j
= 25C...150C:
-dV/dt
off
0.15
0.15
--
--
1
0.8
V/
s
Operating Parameters
Operating voltage
Tj=-40
T
j
=25...150C:
V
bb(on)
4.75 --
--
41
43
V
Overvoltage protection
9
)
T
j
=-40C:
I
bb
=
40 mA
T
j
=25...150C:
V
bb(AZ)
41
43
--
47
--
52
V
Standby current
10
)
T
j
=-40C...25C
:
V
IN
=
0;
see diagram page 10
T
j
=150C:
I
bb(off)
--
--
10
--
16
50
A
Leakage output current (included in I
bb(off)
)
V
IN
=
0
I
L(off)
-- 1
10
A
Operating current
11)
, V
IN
=
5V,
I
GND
= I
GND1
+ I
GND2
,
one channel on:
two channels on:

I
GND
--
--
0.8
1.6
1.4
2.8
mA
6
) Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm
2
(one layer, 70
m thick) copper area for Vbb
connection. PCB is vertical without blown air. See page 14
7
) not subject to production test, specified by design
8
) See timing diagram on page 11.
9)
Supply voltages higher than V
bb(AZ)
require an external current limit for the GND and status pins (a 150
resistor for the GND connection is recommended). See also V
ON(CL)
in table of protection functions and
circuit diagram on page 8.
10
) Measured with load; for the whole device; all channels off
11
)
Add I
ST
, if I
ST
> 0
BTS 736 L2
Semiconductor Group
5
2003-Oct-01
Parameter and Conditions,
each of the two channels
Symbol
Values
Unit
at T
j
= -40...+150C, V
bb
= 12 V unless otherwise specified
min typ
Max
Protection Functions
12)
Current limit,
(see timing diagrams, page 12)
T
j
=-40C:
T
j
=25C:
T
j
=+150C:
I
L(lim)
40
33
23
49
41
29
60
48
35
A
Repetitive short circuit current limit,
T
j
= T
jt
each channel
two parallel channels
(see timing diagrams, page 12)
I
L(SCr)
--
--
30
30
--
--
A
Initial short circuit shutdown time
T
j,start
=25C:
(see timing diagrams on page 12)
t
off(SC)
--
1.7
--
ms
Output clamp (inductive load switch off)
13)
at VON(CL) = Vbb - VOUT
,
IL= 40 mA
T
j
=-40C:
T
j
=25C...150C:

V
ON(CL)
41
43
--
47
--
52
V
Thermal overload trip temperature
T
jt
150 -- --
C
Thermal hysteresis
T
jt
-- 10 --
K
Reverse Battery
Reverse battery voltage
14
)
-V
bb
--
--
32
V
Drain-source diode voltage
(V
out
> V
bb
)
I
L
=
-
4.0
A, T
j
=
+150C
-V
ON
--
600
--
mV
12
) Integrated protection functions are designed to prevent IC destruction under fault conditions described in the
data sheet. Fault conditions are considered as "outside" normal operating range. Protection functions are not
designed for continuous repetitive operation.
13
)
If channels are connected in parallel, output clamp is usually accomplished by the channel with the lowest
V
ON(CL)
14
) Requires a 150
resistor in GND connection. The reverse load current through the intrinsic drain-source
diode has to be limited by the connected load. Power dissipation is higher compared to normal operating
conditions due to the voltage drop across the drain-source diode. The temperature protection is not active
during reverse current operation! Input and Status currents have to be limited (see max. ratings page 3 and
circuit page 8).