IPB06N03LA
IPI06N03LA, IPP06N03LA
Opti
MOS
2 Power-Transistor
Features
Ideal for high-frequency dc/dc converters
N-channel
Logic level
Excellent gate charge x R
DS(on)
product (FOM)
Very low on-resistance R
DS(on)
Superior thermal resistance
175 C operating temperature
dv /dt rated
Maximum ratings, at T
j
=25 C, unless otherwise specified
Parameter
Symbol Conditions
Unit
Continuous drain current
I
D
T
C
=25 C
1)
50
A
T
C
=100 C
50
Pulsed drain current
I
D,pulse
T
C
=25 C
2)
350
Avalanche energy, single pulse
E
AS
I
D
=45 A, R
GS
=25
225
mJ
Reverse diode dv /dt
dv /dt
I
D
=50 A, V
DS
=20 V,
di /dt =200 A/s,
T
j,max
=175 C
6
kV/s
Gate source voltage
3)
V
GS
20
V
Power dissipation
P
tot
T
C
=25 C
83
W
Operating and storage temperature
T
j
, T
stg
-55 ... 175
C
IEC climatic category; DIN IEC 68-1
55/175/56
Value
V
DS
25
V
R
DS(on),max
(SMD version)
5.9
m
I
D
50
A
Product Summary
Type
Package
Ordering Code
Marking
IPB06N03LA
P-TO263-3-2
Q67042-S4146
06N03LA
IPI06N03LA
P-TO262-3-1
Q67042-S4147
06N03LA
IPP06N03LA
P-TO220-3-1
Q67042-S4148
06N03LA
P-TO220-3-1
P-TO262-3-1
P-TO263-3-2
Rev. 1.3
page 1
2003-12-18
IPB06N03LA
IPI06N03LA, IPP06N03LA
Parameter
Symbol Conditions
Unit
min.
typ.
max.
Thermal characteristics
Thermal resistance, junction - case
R
thJC
-
-
1.8
K/W
SMD version, device on PCB
R
thJA
minimal footprint
-
-
62
6 cm
2
cooling area
4)
-
-
40
Electrical characteristics, at T
j
=25 C, unless otherwise specified
Static characteristics
Drain-source breakdown voltage
V
(BR)DSS
V
GS
=0 V, I
D
=1 mA
25
-
-
V
Gate threshold voltage
V
GS(th)
V
DS
=V
GS
, I
D
=40 A
1.2
1.6
2
Zero gate voltage drain current
I
DSS
V
DS
=25 V, V
GS
=0 V,
T
j
=25 C
-
0.1
1
A
V
DS
=25 V, V
GS
=0 V,
T
j
=125 C
-
10
100
Gate-source leakage current
I
GSS
V
GS
=20 V, V
DS
=0 V
-
10
100
nA
Drain-source on-state resistance
R
DS(on)
V
GS
=4.5 V, I
D
=30 A
-
7.9
9.9
m
V
GS
=4.5 V, I
D
=30 A,
SMD version
-
7.6
9.5
V
GS
=10 V, I
D
=30 A
-
5.2
6.2
V
GS
=10 V, I
D
=30 A,
SMD version
-
4.9
5.9
Gate resistance
R
G
-
1.2
-
Transconductance
g
fs
|V
DS
|>2|I
D
|R
DS(on)max
,
I
D
=30 A
26
52
-
S
4)
Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm
2
(one layer, 70 m thick) copper area for drain
connection. PCB is vertical in still air.
Values
1)
Current is limited by bondwire; with an R
thJC
=1.8 K/W the chip is able to carry 91 A.
2)
See figure 3
3)
T
j,max
=150 C and duty cycle D <0.25 for V
GS
<-5 V
Rev. 1.3
page 2
2003-12-18
IPB06N03LA
IPI06N03LA, IPP06N03LA
Parameter
Symbol Conditions
Unit
min.
typ.
max.
Dynamic characteristics
Input capacitance
C
iss
-
1995
2653
pF
Output capacitance
C
oss
-
848
1128
Reverse transfer capacitance
C
rss
-
124
186
Turn-on delay time
t
d(on)
-
11
16
ns
Rise time
t
r
-
25
38
Turn-off delay time
t
d(off)
-
30
45
Fall time
t
f
-
7.0
10
Gate Charge Characteristics
5)
Gate to source charge
Q
gs
-
7
9
nC
Gate charge at threshold
Q
g(th)
-
3.2
4.2
Gate to drain charge
Q
gd
-
5
7
Switching charge
Q
sw
-
8
12
Gate charge total
Q
g
-
16
22
Gate plateau voltage
V
plateau
-
3.3
-
V
Gate charge total, sync. FET
Q
g(sync)
V
DS
=0.1 V,
V
GS
=0 to 5 V
-
14
19
nC
Output charge
Q
oss
V
DD
=15 V, V
GS
=0 V
-
18
22
Reverse Diode
Diode continous forward current
I
S
-
-
50
A
Diode pulse current
I
S,pulse
-
-
350
Diode forward voltage
V
SD
V
GS
=0 V, I
F
=50 A,
T
j
=25 C
-
0.94
1.2
V
Reverse recovery charge
Q
rr
V
R
=15 V, I
F
=I
S
,
di
F
/dt =400 A/s
-
-
10
nC
5)
See figure 16 for gate charge parameter definition
T
C
=25 C
Values
V
GS
=0 V, V
DS
=15 V,
f =1 MHz
V
DD
=15 V, V
GS
=10 V,
I
D
=25 A, R
G
=2.7
V
DD
=15 V, I
D
=25 A,
V
GS
=0 to 5 V
Rev. 1.3
page 3
2003-12-18
IPB06N03LA
IPI06N03LA, IPP06N03LA
1 Power dissipation
2 Drain current
P
tot
=f(T
C
)
I
D
=f(T
C
); V
GS
10 V
3 Safe operation area
4 Max. transient thermal impedance
I
D
=f(V
DS
); T
C
=25 C; D =0
Z
thJC
=f(t
p
)
parameter: t
p
parameter: D =t
p
/T
1 s
10 s
100 s
1 ms
10 ms
DC
1
10
100
1000
0.1
1
10
100
V
DS
[V]
I
D
[A]
limited by on-state
resistance
single pulse
0.01
0.02
0.05
0.1
0.2
0.5
0.001
0.01
0.1
1
10
0
0
0
0
0
0
1
t
p
[s]
Z
thJC
[K/W]
0
10
20
30
40
50
60
70
80
90
0
50
100
150
200
T
C
[C]
P
tot
[W]
0
20
40
60
0
50
100
150
200
T
C
[C]
I
D
[A]
10
-6
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
Rev. 1.3
page 4
2003-12-18
IPB06N03LA
IPI06N03LA, IPP06N03LA
5 Typ. output characteristics
6 Typ. drain-source on resistance
I
D
=f(V
DS
); T
j
=25 C
R
DS(on)
=f(I
D
); T
j
=25 C
parameter: V
GS
parameter: V
GS
7 Typ. transfer characteristics
8 Typ. forward transconductance
I
D
=f(V
GS
); |V
DS
|>2|I
D
|R
DS(on)max
g
fs
=f(I
D
); T
j
=25 C
parameter: T
j
3 V
3.2 V
3.5 V
3.8 V
4.1 V
4.5 V
10 V
0
5
10
15
20
25
0
20
40
60
80
100
I
D
[A]
R
D
S
(on)
[m
]
25 C
175 C
0
10
20
30
40
50
60
70
80
90
100
0
1
2
3
4
5
V
GS
[V]
I
D
[A]
0
10
20
30
40
50
60
70
80
90
0
20
40
60
80
I
D
[A]
g
fs
[S]
2.8 V
3 V
3.2 V
3.5 V
3.8 V
4.1 V
4.5 V
10 V
0
20
40
60
80
100
120
0
1
2
3
V
DS
[V]
I
D
[A]
Rev. 1.3
page 5
2003-12-18
IPB06N03LA
IPI06N03LA, IPP06N03LA
9 Drain-source on-state resistance
10 Typ. gate threshold voltage
R
DS(on)
=f(T
j
); I
D
=30 A; V
GS
=10 V
V
GS(th)
=f(T
j
); V
GS
=V
DS
parameter: I
D
11 Typ. Capacitances
12 Forward characteristics of reverse diode
C =f(V
DS
); V
GS
=0 V; f =1 MHz
I
F
=f(V
SD
)
parameter: T
j
typ
98 %
0
1
2
3
4
5
6
7
8
9
10
11
12
-60
-20
20
60
100
140
180
T
j
[C]
R
D
S
(on)
[m
]
40 A
400 A
0
0.5
1
1.5
2
2.5
-60
-20
20
60
100
140
180
T
j
[C]
V
GS
(th)
[V]
Ciss
Coss
Crss
100
1000
10000
0
5
10
15
20
25
30
V
DS
[V]
C
[pF]
25 C
175 C
25C 98%
175C 98%
1
10
100
1000
0.0
0.5
1.0
1.5
2.0
V
SD
[V]
I
F
[A]
Rev. 1.3
page 6
2003-12-18
IPB06N03LA
IPI06N03LA, IPP06N03LA
13 Avalanche characteristics
14 Typ. gate charge
I
AS
=f(t
AV
); R
GS
=25
V
GS
=f(Q
gate
); I
D
=25 A pulsed
parameter: T
j(start)
parameter: V
DD
15 Drain-source breakdown voltage
16 Gate charge waveforms
V
BR(DSS)
=f(T
j
); I
D
=1 mA
5 V
15 V
20 V
0
2
4
6
8
10
12
0
10
20
30
40
Q
gate
[nC]
V
GS
[V]
20
21
22
23
24
25
26
27
28
29
-60
-20
20
60
100
140
180
T
j
[C]
V
BR(
DSS)
[V]
V
GS
Q
gate
V
g s(th)
Q
g (th)
Q
g s
Q
g d
Q
sw
Q
g
25 C
100 C
150 C
1
10
100
1
10
100
1000
t
AV
[s]
I
AV
[A]
Rev. 1.3
page 7
2003-12-18
IPB06N03LA
IPI06N03LA, IPP06N03LA
Package Outline
P-TO263-3-2: Outline
Footprint
Packaging
Dimensions in mm
Rev. 1.3
page 8
2003-12-18
IPB06N03LA
IPI06N03LA, IPP06N03LA
P-TO262-3-1: Outline
P-TO220-3-1: Outline
Packaging
Dimensions in mm
Rev. 1.3
page 9
2003-12-18
IPB06N03LA
IPI06N03LA, IPP06N03LA
Published by
Infineon Technologies AG
Bereich Kommunikation
St.-Martin-Strae 53
D-81541 Mnchen
Infineon Technologies AG 1999
All Rights Reserved.
Attention please!
The information herein is given to describe certain components and shall not be considered as
warranted characteristics.
Terms of delivery and rights to technical change reserved.
We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement,
regarding circuits, descriptions and charts started herein.
Infineon Technologies is an approved CECC manufacturer.
Information
For further information on technology, delivery terms and conditions and prices, please contact your
nearest Infineon Technologies office in Germany or our Infineon Technologies representatives worldwide
(see address list).
Warnings
Due to technical requirements, components may contain dangerous substances.
For information on the types in question, please contact your nearest Infineon Technologies office.
Infineon Technologies' components may only be used in life-support devices or systems with the
expressed written approval of Infineon Technologies if a failure of such components can reasonably
be expected to cause the failure of that life-support device or system, or to affect the safety or
effectiveness of that device or system. Life support devices or systems are intended to be implanted
in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail,
it is reasonable to assume that the health of the user or other persons may be endangered.
Rev. 1.3
page 10
2003-12-18
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