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Электронный компонент: Q67007-A9375

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P-DSO-28-14
Data Sheet
1
2001-02-01
TrilithIC
Data Sheet
BTS 7700 G
1
Overview
1.1
Features
Quad D-MOS switch driver
Free configurable as bridge or quad-switch
Optimized for DC motor management applications
Low
R
DS ON
: 110 m
high-side switch, 90 m low-
side switch (typical values @ 25
C)
Maximum peak current: typ. 9 A @ 25
C=
Very low quiescent current: typ. 5
A @ 25 C=
Small outline, enhanced power P-DSO-package
Load and GND-short-circuit-protection
Operates up to 40 V
Status flag diagnosis
Overtemperature shut down with hysteresis
Internal clamp diodes
Isolated sources for external current sensing
Under-voltage detection with hysteresis
PWM frequencies up to 50 kHz
1.2
Description
The BTS 7700 G is part of the TrilithIC family containing three dies in one package:
One double high-side switch and two low-side switches. The drains of these three
vertical DMOS chips are mounted on separated leadframes. The sources are connected
to individual pins, so the BTS 7700 G can be used in H-bridge- as well as in any other
configuration. The double high-side is manufactured in SMART SIPMOS
technology
which combines low
R
DS ON
vertical DMOS power stages with CMOS control circuitry.
The high-side switch is fully protected and contains the control and diagnosis circuitry.
To achieve low
R
DS ON
and fast switching performance, the low-side switches are
manufactured in S-FET logic level technology. The equivalent standard product is the
BUZ 104 SL.
In contrast to the BTS 7710 G, which consists of lower ohmic chips in the same
package, the BTS 7700 G offers a lower price for applications, which do not need the
high current capability of the BTS 7710 G or BTS 7710 GP.
Type
Ordering Code
Package
BTS 7700 G
Q67007-A9375
P-DSO-28-14
BTS 7700 G
Data Sheet
2
2001-02-01
1.3
Pin Configuration
(top view)
Figure 1
28 DL1
25 DL1
27 SL1
26 SL1
24 DHVS
23 SH1
22 SH1
21 SH2
20 SH2
19 DHVS
18 DL2
15 DL2
16 SL2
17 SL2
1
DL1
5
DHVS
4
N.C.
3
DL1
2
IL1
6
GND
7
IH1
8
ST
9
IH2
10
DHVS
11
DL2
14
N.C.
13
DL2
12
IL2
HS-Leadframe
LS-Leadframe
LS-Leadframe
BTS 7700 G
Data Sheet
3
2001-02-01
Pins written in bold type need power wiring.
1.4
Pin Definitions and Functions
Pin No.
Symbol
Function
1, 3, 25, 28
DL1
Drain of low-side switch1, leadframe 1
1)
2
IL1
Analog input of low-side switch1
4
N.C.
not connected
5, 10, 19, 24
DHVS
Drain of high-side switches and power supply voltage,
leadframe 2
1)
6
GND
Ground
7
IH1
Digital input of high-side switch1
8
ST
Status of high-side switches; open Drain output
9
IH2
Digital input of high-side switch2
11
N.C.
not connected
12, 14, 15, 18
DL2
Drain of low-side switch2, leadframe 3
1)
13
IL2
Analog input of low-side switch2
16,17
SL2
Source of low-side switch2
20,21
SH2
Source of high-side switch2
22,23
SH1
Source of high-side switch1
26,27
SL1
Source of low-side switch1
1)
To reduce the thermal resistance these pins are direct connected via metal bridges to the leadframe.
BTS 7700 G
Data Sheet
4
2001-02-01
1.5
Functional Block Diagram
Figure 2
Block Diagram
SH2
DHVS
ST
IL1
GND
IH1
SL2
IH2
IL2
SL1
DL2
SH1
DL1
5,10,19,24
9
7
20,21
16, 17
6
13
2
R
O1
R
O2
Biasing and Protection
Diagnosis
Driver
OUT
0
IN
0 L L
0 1 L H
1 0 H L
1 1 H H
22, 23
1,3,25,28
8
26, 27
12,14,15,18
BTS 7700 G
Data Sheet
5
2001-02-01
1.6
Circuit Description
Input Circuit
The control inputs IH1,2 consist of TTL/CMOS compatible Schmitt-Triggers with
hysteresis. Buffer amplifiers are driven by these stages and convert the logic signal into
the necessary form for driving the power output stages. The inputs are protected by ESD
clamp-diodes.
The inputs IL1 and IL2 are connected to the gates of the standard N-channel vertical
power-MOS-FETs.
Output Stages
The output stages consist of an low
R
DS ON
Power-MOS H-bridge. In H-bridge
configuration, the D-MOS body diodes can be used for freewheeling when commutating
inductive loads. If the high-side switches are used as single switches, positive and
negative voltage spikes which occur when driving inductive loads are limited by
integrated power clamp diodes.
Short Circuit Protection
The outputs are protected against
output short circuit to ground
overload (load short circuit).
An internal OP-Amp controls the Drain-Source-Voltage by comparing the DS-Voltage-
Drop with an internal reference voltage. Above this trippoint the OP-Amp reduces the
output current depending on the junction temperature and the drop voltage.
In the case of overloaded high-side switches the status output is set to low.
Overtemperature Protection
The high-side switches incorporate an overtemperature protection circuit with hysteresis
which switches off the output transistors and sets the status output to low.
Undervoltage-Lockout (UVLO)
When
V
S
reaches the switch-on voltage
V
UVON
the IC becomes active with a hysteresis.
The High-Side output transistors are switched off if the supply voltage
V
S
drops below
the switch off value
V
UVOFF.
BTS 7700 G
Data Sheet
6
2001-02-01
Status Flag
The status flag output is an open drain output with Zener-diode which requires a pull-up
resistor, c.f. the application circuit on page 14. Various errors as listed in the table
"Diagnosis" are detected by switching the open drain output ST to low. A open load
detection is not available. Freewheeling condition does not cause an error.
2
Truthtable and Diagnosis (valid only for the High-Side-Switches)
Flag
IH1
IH2
SH1
SH2
ST Remarks
Inputs
Outputs
Normal operation;
identical with functional truth table
0
0
1
1
0
1
0
1
L
L
H
H
L
H
L
H
1
1
1
1
stand-by mode
switch2 active
switch1 active
both switches
active
Overtemperature high-side switch1
0
1
X
X
L
L
X
X
1
0
detected
Overtemperature high-side switch2
X
X
0
1
X
X
L
L
1
0
detected
Overtemperature both high-side switches
0
X
1
0
1
X
L
L
L
L
L
L
1
0
0
detected
detected
Undervoltage
X
X
L
L
1
not detected
Inputs:
Outputs:
Status:
0 = Logic LOW
Z = Output in tristate condition
1 = No error
1 = Logic HIGH
L = Output in sink condition
0 = Error
X = don't care
H = Output in source condition
X = Voltage level undefined
BTS 7700 G
Data Sheet
7
2001-02-01
3
Electrical Characteristics
3.1
Absolute Maximum Ratings
40
C <
T
j
< 150
C
Parameter
Symbol
Limit Values Unit Remarks
min.
max.
High-Side-Switches (Pins DHVS, IH1,2 and SH1,2)
Supply voltage
V
S
0.3
42
V
Supply voltage for full short
circuit protection
V
S(SCP)
28
V
HS-drain current*
I
S
7
**
A
T
A
= 25C;
t
< 100 ms
HS-input current
I
IH
5
5
mA
Pin IH1 and IH2
HS-input voltage
V
IH
10
16
V
Pin IH1 and IH2
Note: * single pulse ** internally limited
Status Output ST
Status pull up voltage
V
ST
0.3
5.4
V
Status Output current
I
ST
5
5
mA
Pin ST
Low-Side-Switches (Pins DL1,2, IL1,2 and SL1,2)
Drain- source break down
voltage
V
DSL
55
V
V
IL
= 0 V;
I
D
1 mA
LS-drain current*
T
A
= 25C
I
DL
7
6
A
t
< 100 ms
8
A
t
< 10 ms
18
A
t
< 1 ms
LS-input voltage
V
IL
20
20
V
Pin IL1 and IL2
Note: * single pulse
Temperatures
Junction temperature
T
j
40
150
C
Storage temperature
T
stg
55
150
C
BTS 7700 G
Data Sheet
8
2001-02-01
Note: Maximum ratings are absolute ratings; exceeding any one of these values may
cause irreversible damage to the integrated circuit.
Note: In the operating range the functions given in the circuit description are fulfilled.
Thermal Resistances (one HS-LS-Path active)
LS-junction case
R
thjC L
20
K/W measured to pin 3 or 12
HS-junction case
R
thjC H
20
K/W measured to pin 19
Junction ambient
R
thja
= T
j(HS)
/(P
(HS)
+P
(LS)
)
R
thja
60
K/W device soldered to
reference PCB with
6 cm
2
cooling area
ESD Protection (Human Body Model acc. MIL STD 883D, method 3015.7 and EOS/
ESD assn. standard S5.1 - 1993)
Input LS-Switch
V
ESD
0.5
kV
Input HS-Switch
V
ESD
1
kV
Status HS-Switch
V
ESD
2
kV
Output LS and HS-Switch
V
ESD
8
kV
all other pins connected
to Ground
3.2
Operating Range
40
C <
T
j
< 150
C
Parameter
Symbol
Limit Values Unit
Remarks
min.
max.
Supply voltage
V
S
V
UVOFF
42
V
After
V
S
rising
above
V
UVON
Input voltages HS
V
IH
0.3
15
V
Input voltages LS
V
IL
0.3
20
V
Output current
I
ST
0
2
mA
Junction temperature
T
j
40
150
C
3.1
Absolute Maximum Ratings (cont'd)
40
C <
T
j
< 150
C
Parameter
Symbol
Limit Values Unit Remarks
min.
max.
BTS 7700 G
Data Sheet
9
2001-02-01
3.3
Electrical Characteristics
I
SH1
=
I
SH2
=
I
SL1
=
I
SL2
= 0 A; 40
C <
T
j
< 150
C; 8 V <
V
S
< 18 V
unless otherwise specified
Parameter
Symbol
Limit Values
Unit Test Condition
min.
typ.
max.
Current Consumption HS-switch
Quiescent current
I
S
5
8
A
IH1 = IH2 = 0 V
T
j
= 25
C
12
A
IH1 = IH2 = 0 V
Supply current
I
S
1
2
mA
IH1 or IH2 = 5 V
V
S
= 12 V
2
4
mA
IH1 and IH2 = 5 V
V
S
= 12 V
Leakage current of
highside switch
I
SH LK
6
A
V
IH
=
V
SH
= 0 V
Leakage current through
logic GND in free wheeling
condition
I
LKCL
=
I
FH
+
I
SH
10
mA
I
FH
= 3 A
Current Consumption LS-switch
Input current
I
IL
10
100
nA
V
IL
= 20 V;
V
DSL
= 0 V
T
j
= 25
C
Leakage current of lowside
switch
I
DL LK
10
A
V
IL
= 0 V
V
DSL
= 40 V
Under Voltage Lockout (UVLO) HS-switch
Switch-ON voltage
V
UVON
4.5
V
V
S
increasing
Switch-OFF voltage
V
UVOFF
1.8
3.2
V
V
S
decreasing
Switch ON/OFF hysteresis
V
UVHY
1
V
V
UVON
V
UVOFF
BTS 7700 G
Data Sheet
10
2001-02-01
Output stages
Inverse diode of high-side
switch; Forward-voltage
V
FH
0.8
1.2
V
I
FH
= 3A
Inverse diode of lowside
switch; Forward-voltage
V
FL
0.8
1.2
V
I
FL
= 3 A
Static drain-source
on-resistance of highside
switch
R
DS ON H
110
140
m
I
SH
= 1 A
T
j
= 25
C
Static drain-source
on-resistance of lowside
switch
R
DS ON L
80
110
m
I
SL
= 1 A;
V
IL
= 5 V
T
j
= 25
C
Static path on-resistance
R
DS ON
480
m
R
DS ON H
+ R
DS ON L
I
SH
= 1 A;
Short Circuit of highside switch to GND
Initial peak SC current
I
SCP H
9
11
13
A
T
j
= 40 C
Initial peak SC current
I
SCP H
7.5
9
11
A
T
j
= + 25 C
Initial peak SC current
I
SCP H
5.5
7
9
A
T
j
= + 150 C
Short Circuit of highside switch to
V
S
Output pull-down-resistor
R
O
12
22
50
k
V
DSL
= 3 V
Thermal Shutdown
Thermal shutdown junction
temperature
T
j SD
155
180
190
C
Thermal switch-on junction
temperature
T
j SO
150
170
180
C
Temperature hysteresis
T
10
C
T
=
T
jSD
T
jSO
3.3
Electrical Characteristics (cont'd)
I
SH1
=
I
SH2
=
I
SL1
=
I
SL2
= 0 A; 40
C <
T
j
< 150
C; 8 V <
V
S
< 18 V
unless otherwise specified
Parameter
Symbol
Limit Values
Unit Test Condition
min. typ.
max.
BTS 7700 G
Data Sheet
11
2001-02-01
Status Flag Output ST of highside switch
Low output voltage
V
ST L
0.2
0.6
V
I
ST
= 1.6 mA
Leakage current
I
ST LK
10
A
V
ST
= 5 V
Zener-limit-voltage
V
ST Z
5.4
V
I
ST
= 1.6 mA
Switching times of highside switch
Turn-ON-time;
to 90%
V
SH
t
ON
75
160
s
R
Load
= 12
V
S
= 12 V
Turn-OFF-time;
to 10%
V
SH
t
OFF
60
160
s
R
Load
= 12
V
S
= 12 V
Slew rate on 10 to 30%
V
SH
dV/dt
ON
1.7
V/
s R
Load
= 12
V
S
= 12 V
Slew rate off 70 to 40%
V
SH
-dV/
dt
OFF
2.5
V/
s R
Load
= 12
V
S
= 12 V
Note: switching times are guaranteed by design
Switching times of low-side switch
Turn-ON delay time;
V
IL
= 5V;
R
G
= 16
t
d_ON_L
7
11
ns
resistive load
I
SL
= 3 A;
V
S
= 30 V
Switch-ON time;
V
IL
= 5V;
R
G
= 16
t
ON_L
28
45
ns
resistive load
I
SL
= 3 A;
V
S
= 30 V
Switch-OFF delay time;
V
IL
= 5V;
R
G
= 16
t
d_OFF_L
23
35
ns
resistive load
I
SL
= 3 A;
V
S
= 30 V
Switch-OFF time;
V
IL
= 5V;
R
G
= 16
t
OFF_L
18
28
ns
resistive load
I
SL
= 3 A;
V
S
= 30 V
3.3
Electrical Characteristics (cont'd)
I
SH1
=
I
SH2
=
I
SL1
=
I
SL2
= 0 A; 40
C <
T
j
< 150
C; 8 V <
V
S
< 18 V
unless otherwise specified
Parameter
Symbol
Limit Values
Unit Test Condition
min.
typ.
max.
BTS 7700 G
Data Sheet
12
2001-02-01
Note: The listed characteristics are ensured over the operating range of the integrated
circuit. Typical characteristics specify mean values expected over the production
spread. If not otherwise specified, typical characteristics apply at
T
A
= 25
C and
the given supply voltage.
Gate charge of lowside switch
Input to source charge;
Q
IS
1.5
2.3
nC
I
SL
= 3 A;
V
S
= 14 V
Input to drain charge;
Q
ID
5
7
nC
I
SL
= 3 A;
V
S
= 14 V
Input charge total;
Q
I
11
17
nC
I
SL
= 3 A;
V
S
= 14 V
V
IL
= 0 to 10 V
Input plateau voltage;
V
(plateau)
3.1
-
V
I
SL
= 3 A;
V
S
= 14 V
Note: switching times and input charges are guaranteed by design
Control Inputs of highside switches IH 1, 2
H-input voltage
V
IH High
2.5
V
L-input voltage
V
IH Low
1
V
Input voltage hysterese
V
IH HY
0.3
V
H-input current
I
IH High
15
30
60
A
V
GH
= 5 V
L-input current
I
IH Low
5
20
A
V
GH
= 0.4 V
Input series resistance
R
I
2.7
4
5.5
k
Zener limit voltage
V
IH Z
5.4
V
I
GH
= 1.6 mA
Control Inputs IL1, 2
Gate-threshold-voltage
V
IL th
0.9
1.7
2.2
V
I
DL
= 0.5 mA
3.3
Electrical Characteristics (cont'd)
I
SH1
=
I
SH2
=
I
SL1
=
I
SL2
= 0 A; 40
C <
T
j
< 150
C; 8 V <
V
S
< 18 V
unless otherwise specified
Parameter
Symbol
Limit Values
Unit Test Condition
min. typ.
max.
BTS 7700 G
Data Sheet
13
2001-02-01
Figure 3
Test Circuit
HS-Source-Current
Named during Short
Circuit
Named during Leakage-
Cond.
I
SH1,2
I
SCP H
I
DL LK
SH2
DHVS
ST
IL1
GND
IH1
SL2
5,10,19,24
9
7
20,21
16,17
6
13
2
R
O1
R
O2
Biasing and Protection
22,23
1,3,25,28
8
IH2
IL2
26,27
12,14,15,18
SL1
DL2
SH1
DL1
I
GND
I
LKCL
V
S
=12V
C
L
100F
C
S
470nF
I
FH1,2
I
S
I
SH2
I
DL2
I
SH1
I
DL1
I
DL LK 2
I
DL LK 1
V
DSL1
-V
FL1
V
DSL2
-V
FL2
-V
FH2
V
DSH2
-V
FH1
V
DSH1
V
UVON
V
UVOFF
I
SL2
I
SL1
I
SCP L 1
I
SCP L 2
V
IL2
V
IL th 2
V
IL1
V
IL th 1
V
ST
V
STL
V
STZ
V
IH1
V
IH2
Gate
Driver
Gate
Driver
Diagnosis
I
ST
I
ST LK
I
IH1
I
IH1
I
IL1
I
IL2
BTS 7700 G
Data Sheet
14
2001-02-01
Figure 4
Application Circuit
SH2
DHVS
ST
IL1
GND
IH1
SL2
5,10,19,24
9
7
20,21
16,17
6
13
2
TLE
4278G
V
S
=12V
D01
Z39
C
S
10F
C
D
47nF
D
I
Q
Reset
Watchdog
C
Q
22F
V
CC
WD R
GND
P
R
O1
R
O2
Biasing and Protection
M
22,23
1,3,25,28
8
IH2
IL2
26,27
12,14,15,18
SL1
DL2
SH1
DL1
R
Q
100 k
R
S
10 k
Gate
Driver
Gate
Driver
Diagnosis
BTS 7700 G
Data Sheet
15
2001-02-01
4
Package Outlines
1
14
15
28
18.1
-0.4
Index Marking
1)
2.45
-0.1
7.6
10.3
0.3
-0.2
0.2
2.65 max
-0.2
1.27
0.23
+0.09
0.1
0.4
0.35 x 45
+0.8
+0.15
0.35
2)
8 max
0.2 28x
1)
2) Does not include dambar protrusion of 0.05 max per side
1) Does not include plastic or metal protrusions of 0.15 max rer side
GPS05123
P-DSO-28-14
(Plastic Transistor Single Outline Package)
G
P
S
051
23
Sorts of Packing
Package outlines for tubes, trays etc. are contained in our
Data Book "Package Information".
Dimensions in mm
SMD = Surface Mounted Device
BTS 7700 G
Data Sheet
16
2001-02-01
Published by
Infineon Technologies AG i Gr.,
Bereichs Kommunikation
St.-Martin-Strasse 53,
D-81541 Mnchen
Infineon Technologies AG 1999
All Rights Reserved.
Attention please!
The information herein is given to describe certain components and shall not be considered as warranted
characteristics.
Terms of delivery and rights to technical change reserved.
We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding
circuits, descriptions and charts stated herein.
Infineon Technologies is an approved CECC manufacturer.
Information
For further information on technology, delivery terms and conditions and prices please contact your nearest
Infineon Technologies Office in Germany or our Infineon Technologies Representatives worldwide (see address
list).
Warnings
Due to technical requirements components may contain dangerous substances. For information on the types in
question please contact your nearest Infineon Technologies Office.
Infineon Technologies Components may only be used in life-support devices or systems with the express written
approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the
failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life
support devices or systems are intended to be implanted in the human body, or to support and/or maintain and
sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other
persons may be endangered.