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Электронный компонент: 5962F9751201V9A

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1
File Number
4349.1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright Intersil Corporation 1999
HS-22620RH
Rad Hard Dual, Wideband, High Input
Impedance Uncompensated Operational
Amplifier
The HS-22620RH is a radiation hardened, dual bipolar
operational amplifier that features very high input impedance
coupled with wideband AC performance. The high
resistance of the input stage is complemented by low offset
voltage (6mV
Max
at 25
o
C) and low bias current (50nA Max
at 25
o
C) to facilitate accurate signal processing. Offset
voltage can be reduced further by means of an external
nulling potentiometer. The stable closed loop gains greater
than 10, the 20V/
s minimum slew rate at 25
o
C and the
80kV/V minimum open loop gain at 25
o
C, enable the
HS-22620RH to perform high gain amplification of very fast,
wideband signals. These dynamic characteristics, coupled
with fast settling times, make these amplifiers ideally suited
to pulse amplification designs as well as high frequency or
video applications. The frequency response of the amplifier
can be tailored to exact design requirements by means of an
external bandwidth control capacitor.
Specifications for Rad Hard QML devices are controlled
by the Defense Supply Center in Columbus (DSCC). The
SMD numbers listed here must be used when ordering.
Detailed Electrical Specifications for these devices are
contained in SMD 5962-97512. A "hot-link" is provided
on our homepage for downloading.
www.intersil.com/spacedefense/space.asp
Features
Electrically Screened to SMD # 5962-97512
QML Qualified per MIL-PRF-38535 Requirements
High Input Impedance . . . . . . . . . . . . . . . . . . 65M
(Min)
High Gain . . . . . . . . . . . . . . . . . . . . . . . . . . . 80kV/V (Min)
High Slew Rate . . . . . . . . . . . . . . . . . . . . . . 20V/
s (Min)
Low Input Bias Current . . . . . . . . . . . . . . . . . . 50nA (Max)
Low Input Offset Voltage . . . . . . . . . . . . . . . . . 6mV (Max)
Wide Gain Bandwidth Product (A
V
10) . . . . .100MHz (Typ)
Output Short Circuit Protection
Total Dose . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 x 10
5
RAD(Si)
Applications
Video and RF Amplifiers
Pulse Amplifiers
High-Q Active Filters
High Speed Comparators
Pinout
HS-22620RH
(FLATPACK)
TOP VIEW
NOTE: Refer to SMD, Figure 1
Ordering Information
ORDERING NUMBER
INTERNAL
MKT. NUMBER
TEMP. RANGE
(
o
C)
5962F9751201V9A
HS0-22620RH-Q
25
5962F9751201VXC
HS9-22620RH-Q
-55 to 125
HS9-22620RH/PROTO
HS9-22620RH/PROTO
-55 to 125
V
CC
B (10)
VEE B (11)
OUT B (12)
COMP B (13)
WEB (14)
COMP A (15)
OUT A (16)
V
EE
A (17)
V
CC
A (18)
(1) BAL 2A
(2) BAL 1A
(3) +IN A
(4) -IN A
(5) OPEN
(6) -IN B
(7) +IN B
(8) BAL 1B
(9) BAL 2B
-
+
-
+
Data Sheet
August 1999
2
Test Circuits and Waveforms
FIGURE 1. SIMPLIFIED TEST CIRCUIT (APPLIES TO SMD TABLE 1)
NOTE: Includes stray capacitances.
FIGURE 2. SLEW RATE WAVEFORM
NOTE: Measured on both positive and negative transitions. Capacitance at Compensation pin should be minimized.
FIGURE 3. OVERSHOOT, RISE AND FALL TIME WAVEFORMS
50pF
+
1.8K
200
VAC IN
VAC OUT
50
-
+5.0V
-5.0V
T
+5.0V
-5.0V
T
T
V
SR =
V
OUTPUT
V
+0.5V
-0.5V
+0.5V
-0.5V
INPUT
+SL
-SL
+40mV
0V
0V
-40mV
INPUT
t
r
, +OS
t
f
, -OS
OUTPUT
80%
t
r
t
f
V
PEAK
V
FINAL
= +400mV
-400mV
20%
0V
20%
0V
80%
V
PEAK
HS-22620RH
3
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Dynamic Burn-In Circuit
Radiation Exposure Circuit
NOTES:
9. V
1
= +15V
0.5V.
10. V
2
= -15V
0.5V.
11. R
1
= 2.2k
, 1/8W min (5%).
12. R
2
= 50
, 1/8W min (2%).
13. C
1
= 0.1
F,
10%, one cap per V per socket.
HS9-22620RH-Q FLATPACK
NOTES:
1. V
1
= +15V
0.5V.
2. V
2
= -15V
0.5V.
3. R
1
= 2.2k
, 1/8W min (5%).
4. R
2
= 50
, 1/8W min (2%).
5. C
1
= 0.1
F, 10%, one cap per V per socket.
6. F
0
= 10kHz,
10%, 50% duty cycle.
7. V
IH
= +100mV
10mV.
8. V
IL
= -100mV
10mV.
1
2
3
5
7
8
9
18
17
16
15
14
13
12
11
10
R
1
-
+
-
+
R
2
R
1
R
2
R
1
V
1
V
2
C
1
C
1
F
O
R
1
6
4
1
2
3
5
7
8
9
18
17
16
15
14
13
12
11
10
R
2
-
+
-
+
R
2
R
1
R
2
R
1
V
1
V
2
C
1
C
1
R
2
6
4
HS-22620RH
4
Die Characteristics
DIE DIMENSIONS:
145 mils x 116 mils x 19 mils
1 mil
3670
m x 2950
m x 483
m
25.4
m
INTERFACE MATERIALS:
Glassivation:
Type: Nitride (S13N4) over Silox (SIO2, 5% Phos.)
Silox Thickness: 12k
2k
Nitride Thickness: 3.5k
1.5k
Top Metallization:
Type: Al, 1% Cu
Thickness: 14k
2k
Substrate:
Bipolar Bonded Wafer (EBHF)
Backside Finish:
Silicon
ASSEMBLY RELATED INFORMATION:
Substrate Potential (Powered Up):
Unbiased Silicon
(WEB pad provided for substrate tie-off.)
ADDITIONAL INFORMATION:
Worst Case Current Density:
<2 x 10
5
A/cm
2
Transistor Count:
184
Metallization Mask Layout
HS-22620RH
(16) OUTA
(15) COMPA
(14) WEB
(13) COMPB
(12) OUTB
(11)
VEEB
(10)
VCCB
(9)
BAL2B
(8)
BAL1B
+INA (3)
-INA (4)
-INB (6)
+INB (7)
BAL1A
(2)
BAL2A
(1)
VCCA
(18)
VEEA
(17)
HS-22620RH