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Электронный компонент: 5962R9581801VJC

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CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207
|
Copyright
Intersil Corporation 1999
Ordering Information
PART NUMBER
TEMPERATURE RANGE
SCREENING LEVEL
PACKAGE
5962R9581801QJC
-55
o
C to +125
o
C
MIL-PRF-38535 Level Q
24 Lead SBDIP
5962R9581801QXC
-55
o
C to +125
o
C
MIL-PRF-38535 Level Q
24 Lead Ceramic Flatpack
5962R9581801VJC
-55
o
C to +125
o
C
MIL-PRF-38535 Level V
24 Lead SBDIP
5962R9581801VXC
-55
o
C to +125
o
C
MIL-PRF-38535 Level V
24 Lead Ceramic Flatpack
HS1-82C12RH/Sample
+25
o
C
Sample
24 Lead SBDIP
HS9-82C12RH/Sample
+25
o
C
Sample
24 Lead Ceramic Flatpack
HS-82C12RH
Radiation Hardened
8-Bit Input/Output Port
Functional Diagram
Pin Description
PIN
DESCRIPTION
DI0-DI7
Data In
DO0-DO7
Data Out
DS1, DS2
Device Select
MD
Mode
STB
Strobe
INT
Interrupt
CLR
Clear
CONTROL
AND
DEVICE
SELECT
LOGIC
DATA
LATCH
AND
BUFFER
(8)
2
3
INT
DS2
STB
MD
DS1
SERVICE
REQUEST
F.F.
DI0-7
DO0-7
CLR
Features
Devices QML Qualified in Accordance with
MIL-PRF-38535
Detailed Electrical and Screening Requirements are
Contained in SMD# 5962-95818 and Intersil' QM Plan
- Radiation Hardened CMOS Process
- Total Dose 1 x 10
5
RAD (Si)
- Transient Upset > 1 x 10
8
RAD (Si)/s
- Latch-Up Immune EPI-CMOS > 1 x 10
12
RAD (Si)/s
Low Power Dissipation
High Noise Immunity
Single Power Supply +5V
Low Input Load Current
8-Bit Data Register and Buffer
Asynchronous Register Clear
Service Request Flip-Flop for Interrupt Generation
Three-State Outputs
Bus-Compatible with HS-80C85RH CPU
Electrically Equivalent to Sandia SA3026
Military Temperature Range -55
o
C to +125
o
C
Description
The Intersil HS-82C12RH is a radiation hardened 8-bit input/
output port designed for use with the HS-80C85RH radiation
hardened microprocessor. It is manufactured using a self-
aligned, junction-isolated EPI-CMOS process and features
three-state output buffers and device selection and control
logic. A service request flip-flop is included for the
generation and control of interrupts to the microprocessor.
The device can be used in implement many of the peripheral
and input/output functions of a microcomputer system. The
HS-82C12RH is pinout- and function- compatible with
industry-standard 8212 devices.
March 1996
Spec Number
518063
File Number
3041.2
DB NA
2
HS-82C12RH
Pinouts
24 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T24
TOP VIEW
24 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDFP4-F24
TOP VIEW
1
2
3
4
5
6
7
8
9
10
11
12
DS1
MD
DI0
DO0
DI1
DO1
DI2
DO2
DI3
DO3
STB
GND
16
17
18
19
20
21
22
23
24
15
14
13
VDD
DI7
DO7
DI6
DO6
DO5
DO4
CLR
DS2
INT
DI5
DI4
24
23
22
21
20
19
18
17
16
15
14
13
2
3
4
5
6
7
8
9
10
11
12
1
GND
DS1
MD
DI0
DO0
DI1
DO1
DI2
DO2
DI3
DO3
STB
VDD
DS2
CLR
DO4
DI4
DO5
INT
DI7
DO7
DI6
DI5
DO6
Spec Number
518063
3
Specifications HS-82C12RH
Absolute Maximum Ratings
Reliability Information
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7.0V
Input, Output or I/O Voltage . . . . . . . . . . . . GND-0.3V to VDD+0.3V
Storage Temperature Range . . . . . . . . . . . . . . . . . -65
o
C to +150
o
C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175
o
C
Lead Temperature (Soldering 10s) . . . . . . . . . . . . . . . . . . . . +300
o
C
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Thermal Resistance
JA
JC
SBDIP Package . . . . . . . . . . . . . . . . . . . .
55
o
C/W
14
o
C/W
Ceramic Flatpack Package . . . . . . . . . . .
74
o
C/W
13
o
C/W
Maximum Package Power Dissipation at +125
o
C Ambient
SBDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.91W
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . 0.68W
If device power exceeds package dissipation capability, provide heat
sinking or derate linearly at the following rate:
SBDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18.2mW/C
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . .13.5mW/C
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Operating Conditions
Operating Voltage Range . . . . . . . . . . . . . . . . . . . +4.75V to +5.25V
Operating Temperature Range . . . . . . . . . . . . . . . . -55
o
C to +125
o
C
Input Low Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0V to +1.0V
Input High Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . VDD -1V to VDD
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
SYMBOL
CONDITIONS
GROUP A
SUBGROUPS
TEMPERATURE
LIMITS
UNITS
MIN
MAX
High Input Leakage
Current
IIH
VDD = 5.25V, VIN = 0V,
Pin under test = 5.25V
1, 2, 3
-55
o
C, +25
o
C,
+125
o
C
-
1
A
Low Input Leakage
Current
IIL
VDD = 5.25V, VIN = 5.25V,
Pin under test = 0V
1, 2, 3
-55
o
C, +25
o
C,
+125
o
C
-1
-
A
Low Output Voltage
VOL
VDD = 5.25V, IOL = 2mA
1, 2, 3
-55
o
C, +25
o
C,
+125
o
C
-
0.5
V
High Output Voltage
VOH
VDD = 4.75V, IOH = -2mA
1, 2, 3
-55
o
C, +25
o
C,
+125
o
C
4.25
-
V
Static Current
SIDD
VDD = 5.25V, VIN = GND
1, 2, 3
-55
o
C, +25
o
C,
+125
o
C
-
100
A
Functional Tests
FT
VDD = 4.75V and 5.25V,
VIH = VDD-1.0V, VIL = 1.0V
7, 8A, 8B
-55
o
C, +25
o
C,
+125
o
C
-
-
-
NOTE: All devices are guaranteed at worst case limits and over radiation.
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
SYMBOL
GROUP A SUB-
GROUPS
TEMPERATURE
LIMITS
UNITS
MIN
MAX
Data to Output Delay
TPD
9, 10, 11
-55
o
C, +25
o
C, +125
o
C
-
105
ns
Write Enable to Output Delay
TWE
9, 10, 11
-55
o
C, +25
o
C, +125
o
C
-
200
ns
Reset to Output Delay
TR
9, 10, 11
-55
o
C, +25
o
C, +125
o
C
-
145
ns
Set to Output Delay
TS
9, 10, 11
-55
o
C, +25
o
C, +125
o
C
-
100
ns
Clear to Output Delay
TC
9, 10, 11
-55
o
C, +25
o
C, +125
o
C
-
135
ns
Output Enable Time
TE
9, 10, 11
-55
o
C, +25
o
C, +125
o
C
-
125
ns
Output Disable Time
TD
9, 10, 11
-55
o
C, +25
o
C, +125
o
C
-
85
ns
NOTE:
1. Output Timings are measured with the following conditions: CL = 100pF, VIH = 3.75V, and VIL = 1.0V
Spec Number
518063
4
Specifications HS-82C12RH
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
SYMBOL
CONDITIONS
GROUP A
SUBGROUPS
TEMPERATURE
LIMITS
UNITS
MIN
MAX
Input Capacitance
CIN
VDD = Open, f = 1MHz, All
measurements referenced to
device ground
T
A
= +25
o
C
-
8
pF
Output Capacitance
COUT
VDD = Open, f = 1MHz, All
measurements referenced to
device ground
T
A
= +25
o
C
-
8
pF
Pulse Width
TPW
VDD = 4.75, VIH = 3.75, VIL = 1.0
9, 10, 11
-55
o
C, +25
o
C,
+125
o
C
-
50
ns
Data Set Up Time
TSET
VDD = 4.75, VIH = 3.75, VIL = 1.0
9, 10, 11
-55
o
C, +25
o
C,
+125
o
C
-
30
ns
Data Hold Time
TH
VDD = 4.75, VIH = 3.75, VIL = 1.0
9, 10, 11
-55
o
C, +25
o
C,
+125
o
C
-
40
ns
NOTE: The parameters listed in Table 3 are controlled via design or process parameters and are not directly tested. These parameters are
characterized upon initial design release and upon design changes which would affect these characteristics.
TABLE 4. POST 100K RAD ELECTRICAL PERFORMANCE CHARACTERISTICS
NOTE:
The Post Irradiation test conditions and limits are the same as those listed in Table 1 and Table 2.
Spec Number
518063
5
HS-82C12RH
Timing Waveforms
FIGURE 1. READ TIMING
FIGURE 2. WRITE TIMING
FIGURE 3. DATA SETUP, HOLD, PROPAGATION DELAY TIMING
FIGURE 4. INTERRUPT TIMING
FIGURE 5. CLEAR TIMING
(DS,
DS2)
OUTPUT
tE
tD
0.5VDD
0.5VDD
VOH
VOL
DATA
MD OR (DS,
DS2)
OUTPUT
tPW
tH
tWE
DATA
STB OR (DS,
DS2)
OUTPUT
tSET
tH
tPD
STB
(DS,
DS2)
INT
tPW
tR
tPW
tS
CLR
DO
tPW
tC
Spec Number
518063