ChipFind - документация

Электронный компонент: 5962R9675501VJC

Скачать:  PDF   ZIP
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
Harris Corporation 1996
1
Semiconductor
HS-565ARH
Radiation Hardened High Speed,
Monolithic Digital-to-Analog Converter
Features
Devices QML Qualified in Accordance with
MIL-PRF-38535
Detailed Electrical and Screening Requirements
are Contained in SMD# 5962-96755 and Harris' QM
Plan
DAC and Reference on a Single Chip
Pin Compatible with AD-565A and HI-565A
Very High Speed: Settles to 0.50 LSB in 500ns Max
Monotonicity Guaranteed Over Temperature
0.50 LSB Max Nonlinearity Guaranteed Over
Temperature
Low Gain Drift (Max., DAC Plus Reference) 50ppm/
o
C
Total Dose Hardness to 100K RAD
0.75 LSB Accuracy Guaranteed Over Temperature
(
0.125 LSB Typical at +25
o
C)
Applications
High Speed A/D Converters
Precision Instrumentation
Signal Reconstruction
March 1996
Description
The HS-565ARH is a fast, radiation hardened 12-bit current out-
put, digital-to-analog converter. The monolithic chip includes a
precision voltage reference, thin-film R-2R ladder, reference
control amplifier and twelve high-speed bipolar current
switches.
The Harris Semiconductor Dielectric Isolation process provides
latch-up free operation while minimizing stray capacitance and
leakage currents, to produce an excellent combination of speed
and accuracy. Also, ground currents are minimized to produce a
low and constant current through the ground terminal, which
reduces error due to code-dependent ground currents.
HS-565ARH die are laser trimmed for a maximum integral nonlin-
earity error of
0.25 LSB at +25
o
C. In addition, the low noise bur-
ied zener reference is trimmed both for absolute value and mini-
mum temperature coefficient.
Functional Diagram
REF OUT VCC
4
3
+
-
19.95K
REF
10V
6
5
REF
+
-
3.5K
3K
IREF
0.5mA
-VEE
PWR
GND
7
12
24 . . . 13
MSB LSB
(4X IREF
X CODE)
GND
IN
20V
SPAN
10V
SPAN
OUT
IO
DAC
9.95K
BIP.
OFF.
8
5K
5K
2.5K
11
10
9
Ordering Information
PART NUMBER
TEMPERATURE RANGE
SCREENING LEVEL
PACKAGE
5962R9675501VJC
-55
o
C to +125
o
C
MIL-PRF-38535 Level V
24 Lead SBDIP
5962R9675501VXC
-55
o
C to +125
o
C
MIL-PRF-38535 Level V
24 Lead Ceramic Flatpack
HS1-565ARH (SAMPLE)
+25
o
C
Sample
24 Lead SBDIP
HS9-565ARH (SAMPLE)
+25
o
C
Sample
24 Lead Ceramic Flatpack
Spec Number
518795
File Number
3278.2
2
HS-565ARH
Pinouts
HS1-565ARH
MIL-STD-1835 CDIP2-T24
(SBDIP)
TOP VIEW
H59-565ARH
MIL-STD-1835 CDFP4-F24
(CERAMIC FLATPACK)
TOP VIEW
1
2
3
4
5
6
7
8
9
10
11
12
16
17
18
19
20
21
22
23
24
15
14
13
NC
NC
VCC
REF OUT
REF GND
REF IN
-VEE
BIPOLAR RIN
IDAC OUT
10V SPAN
20V SPAN
PWR GND
BIT 1 IN (MSB)
BIT 3 IN
BIT 4 IN
BIT 5 IN
BIT 6 IN
BIT 8 IN
BIT 10 IN
BIT 11 IN
BIT 12 IN (LSB)
BIT 2 IN
BIT 7 IN
BIT 9 IN
24
23
22
21
20
19
18
17
16
15
14
13
2
3
4
5
6
7
8
9
10
11
12
1
NC
NC
VCC
REF OUT
REF GND
REF IN
-VEE
BIPOLAR RIN
IDAC OUT
10V SPAN
20V SPAN
PWR GND
BIT 1 IN
BIT 3 IN
BIT 4 IN
BIT 5 IN
BIT 6 IN
BIT 8 IN
BIT 10 IN
BIT 11 IN
BIT 12 IN
BIT 2 IN
BIT 7 IN
BIT 9 IN
(LSB)
(MSB)
Spec Number
518795
3
Specifications HS-565ARH
Absolute Maximum Ratings
Thermal Information
VCC to Power Ground . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to +18V
VEE to Power Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to -18V
Voltage on DAC Output (Pin 9) . . . . . . . . . . . . . . . . . . . . -3V to +12V
Digital Input (Pins 13 - 24) to Power Ground . . . . . . . . . . -1V to +7V
Ref In to Reference Ground
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
12V
Bipolar Offset to Reference Ground
. . . . . . . . . . . . . . . . . . . . . . .
12V
10V Span R to Reference Ground
. . . . . . . . . . . . . . . . . . . . . . . . .
12V
20V Span R to Reference Ground
. . . . . . . . . . . . . . . . . . . . . . . . .
24V
Junction Temperature (TJ) (Max) . . . . . . . . . . . . . . . . . . . . . +175
o
C
Storage Temperature Range . . . . . . . . . . . . . . . . . -65
o
C to +150
o
C
Lead Temperature (Soldering 10s) . . . . . . . . . . . . . . . . . . . . +300
o
C
Thermal Resistance (Typical)
JA
(
o
C/W)
JC
(
o
C/W)
SBDIP Package . . . . . . . . . . . . . . . . . .
60
17
Ceramic Flatpack Package
80
15
Maximum Package Power Dissipation at +125
o
C
SBDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.83W
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . 0.62W
If Device Power Exceeds Package Dissipation Capability, Provide
Heat Sinking or Derate Linearly at the Following Rate:
SBDIP Package
16.67mW/
o
C
Ceramic Flatpack Package
12.5mW/
o
C
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Operating Conditions
Operating Voltage Range (VCC) . . . . . . . . . . . . . +11.4V to +16.5V
Operating Voltage Range (VEE). . . . . . . . . . . . . . . -11.4V to -16.5V
Operating Temperature Range . . . . . . . . . . . . . . . . -55
o
C to +125
o
C
Digital Input Low Voltage. . . . . . . . . . . . . . . . . . . . . . . . .0V to +0.8V
Digital Input High Voltage . . . . . . . . . . . . . . . . . . . . . +2.2V to +5.5V
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETERS
SYMBOL
CONDITIONS
GROUP A
SUB-
GROUP
TEMPERATURE
LIMITS
UNITS
MIN
TYP
MAX
Resolution
VSSD = VSSA = 0V,
VCC = +15V, VEE = -15V
1, 2, 3
-55
o
C to +125
o
C
-
-
12
Bits
Accuracy
ILE
VSSD = VSSA = 0V,
VCC = +15V, VEE = -15V,
Error Relative to Full Scale
1, 2, 3
-55
o
C to +125
o
C
-
0.125
0.75
LSB
Digital Input High Current
IIH
VSSD = VSSA = 0V, VIN = 5.5V
VCC = +15V, VEE = -15V
1, 2, 3
-55
o
C to +125
o
C
-
0.01
+1.0
A
Digital Input Low Current
IIL
VSSD = VSSA = 0V, V
IN
= 0V
VCC = +15V, VEE = -15V
1, 2, 3
-55
o
C to +125
o
C
-20
-2.0
-
A
Differential Nonlinearity
DLE
VSSD = VSSA = 0V,
VCC = +15V, VEE = -15V,
+25
o
C (Monotonicity
Guaranteed Over Temp)
1, 2, 3
-55
o
C to +125
o
C
-
0.25
0.50
LSB
Power Supply Currents
VCC
ICC
VSSD = VSSA = 0V,
VCC = +15V, VEE = -15V
1, 2, 3
-55
o
C to +125
o
C
-
9.0
11.8
mA
VEE
IEE
VSSD = VSSA = 0V,
VCC = +15V, VEE = -15V
1, 2, 3
-55
o
C to +125
o
C
-14.5
-9.5
-
mA
Reference Output
Voltage
Ref Out
VSSD = VSSA = 0V,
VCC = +15V, VEE = -15V
1, 2, 3
-55
o
C to +125
o
C
9.9
10
10.1
V
Reference Output
Current
IREF
VSSD = VSSA = 0V,
VCC = +15V, VEE = -15V,
Available for external loads
1, 2, 3
-55
o
C to +125
o
C
1.5
2.5
-
mA
Output Current
Unipolar
I
OUT1
VSSD = VSSA = 0V,
VCC = +15V, VEE = -15V,
All Bits On
1, 2, 3
-55
o
C to +125
o
C
-1.6
-2.0
-2.4
mA
Bipolar
I
OUT2
VSSD = VSSA = 0V,
VCC = +15V, VEE = -15V,
All Bits On or Off
1, 2, 3
-55
o
C to +125
o
C
0.8
1.0
1.2
mA
Spec Number
518795
4
Specifications HS-565ARH
Output Offset
Unipolar
VOS
VSSD = VSSA = 0V,
VCC = +15V, VEE = -15V
Figure 3, R2 = 50
Fixed
1, 2, 3
-55
o
C to +125
o
C
-
0.01
0.05
% of
F.S.
Bipolar
BPOE
VSSD = VSSA = 0V,
VCC = +15V, VEE = -15V,
R3 and R4 = 50
Fixed
Figure 4
1, 2, 3
-55
o
C to +125
o
C
-
0.05
0.15
% of
F.S.
Power Supply Gain
Sensitivity
VCC
+PSS
Note 3
1, 2, 3
-55
o
C to +125
o
C
-
3
10
ppm of
F.S./%
VEE
-PSS
Note 3
1, 2, 3
-55
o
C to +125
o
C
-
15
25
ppm of
F.S./%
Temperature
Coefficients
Unipolar Zero
With Internal Reference
1, 2, 3
-55
o
C to +125
o
C
-
1
2
ppm/
o
C
Bipolar Zero
With Internal Reference
1, 2, 3
-55
o
C to +125
o
C
-
5
20
ppm/
o
C
Gain (Full Scale)
With Internal Reference
1, 2, 3
-55
o
C to +125
o
C
-
10
50
ppm/
o
C
External Adjustments
AE
Fixed 50
Resistor for R2
Figures 3
1, 2, 3
-55
o
C to +125
o
C
-
0.10
0.25
% of
F.S.
Gain Error
BPAE
Fixed 50
Resistor for R3 and
R4, Figure 4
1, 2, 3
-55
o
C to +125
o
C
-
0.10
0.25
% of
F.S.
Bipolar Zero Error
BPZE
Fixed 50
Resistor for R3 and
R4, Figure 4
1, 2, 3
-55
o
C to +125
o
C
-
0.05
0.10
% of
F.S.
NOTES:
1. All voltages referenced to VSSD = VSSA = 0V
2. Unless otherwise specified VCC = +15V and VEE = -15V.
3. The Power Supply Gain Sensitivity is tested in reference to a VCC = +15V and VEE = -15V.
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
Table 2 Intentionally Left Blank. See AC Specifications in Table 3
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETERS
SYMBOL
CONDITIONS
NOTES
TEMPERATURE
LIMITS
UNITS
MIN
TYP
MAX
Output Capacitance
COUT
f = 1MHz
1, 2
+25
o
C
-
20
-
pF
Output Compliance
Voltage
1
-55
o
C to +125
o
C
-1.5
-
10
V
Programmable Output
Ranges
1
-55
o
C to +125
o
C
0
-
5
V
1
-55
o
C to +125
o
C
-2.5
-
2.5
V
1
-55
o
C to +125
o
C
0
-
10
V
1
-55
o
C to +125
o
C
-5
-
5
V
1
-55
o
C to +125
o
C
-10
-
10
V
Gain Adjustment Range
Figures 3, 4
1
-55
o
C to +125
o
C
0.25
-
-
% of
F.S.
Bipolar Zero
Adjustment Range
Figure 4
1
-55
o
C to +125
o
C
0.15
-
-
% of
F.S.
Reference Input
Impedance
RREF
VSSD = VSSA = 0V, -15
VCC = +15V, VEE = -15V
1
-55
o
C to +125
o
C
15K
20K
25K
Output Resistance
ROUT
VSSD = VSSA = 0V,
VCC = +15V, VEE = -15V,
Exclusive of Span Resistors
1
-55
o
C to +125
o
C
1.8K
2.5K
3.2K
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)
PARAMETERS
SYMBOL
CONDITIONS
GROUP A
SUB-
GROUP
TEMPERATURE
LIMITS
UNITS
MIN
TYP
MAX
Spec Number
518795
5
Specifications HS-565ARH
Settling Time (Note 3)
TS1
VSSD = VSSA = 0V,
VCC = +15V, VEE = -15V,
High Z External Load
1
-55
o
C to +125
o
C
-
350
500
ns
TS2
VSSD = VSSA = 0V,
VCC = +15V, VEE = -15V,
75
External Load
1
-55
o
C to +125
o
C
-
150
250
ns
Full Scale Transition
Rise Time
TRISE
VSSD = VSSA = 0V,
VCC = +15V, VEE = -15V
1
-55
o
C to +125
o
C
-
15
30
ns
Fall Time
TFALL
VSSD = VSSA = 0V,
VCC = +15V, VEE = -15V
1
-55
o
C to +125
o
C
-
30
60
ns
NOTES:
1. The parameters listed in Table 3 are controlled via design or process and are not tested. These parameters are characterized upon initial
design release.
2. 24 lead DIP package only.
3. Reference the Settling Time discussion and Figure 3.
TABLE 4. POST 100 K RAD ELECTRICAL PERFORMANCE
Post 100K RAD Electrical Performance Is Per Table 1 (+25
o
C Only) Except As Follows:
PARAMETER
SYMBOL
CONDITIONS: +25
o
C ONLY
LIMITS
UNITS
MIN
MAX
DIGITAL INPUTS
Low Current
I
IL
V
IN
= 0.0V
-40
-
A
Low Voltage
V
IL
(Note 1)
-
0.5
V
High Voltage
V
IH
(Note 1)
2.5
-
V
UNIPOLAR
Full Scale Error
AE
Figure 3, R2 = 50
Fixed
-
0.85
% of F.S.
BIPOLAR
Offset Error
BPOE
Figure 4, R3 and R4 = 50
Fixed
-
0.25
% of F.S
Zero Error
BPZE
Figure 5, R3 and R4 = 50
Fixed
-
0.25
% of F.S.
Full Scale Error
BPAE
Figure 5, R3 and R4 = 50
Fixed
-
0.85
% of F.S.
Differential Nonlinearity
DLE
Monotonicity Guaranteed
-
1.0
LSB
Accuracy
ILE
Error Relative to Full Scale
-
1.0
LSB
NOTES:
1. This parameter is an applied condition of test.
TABLE 5. BI DELTA PARAMETERS (
25
o
C)
PARAMETER
DELTA LIMIT
I
CC
1.18mA
I
EE
1.45mA
I
OUT1
240
A
I
OUT2
240
A
VOS
0.02%
AE
0.15%
BPOE
0.10%
BPZE
0.10%
I
IL
1.0
A
I
IH
40nA
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)
PARAMETERS
SYMBOL
CONDITIONS
NOTES
TEMPERATURE
LIMITS
UNITS
MIN
TYP
MAX
Spec Number
518795