ChipFind - документация

Электронный компонент: CA3096M

Скачать:  PDF   ZIP
1
Applications
Five-Independent Transistors
- Three NPN and
- Two PNP
Differential Amplifiers
DC Amplifiers
Sense Amplifiers
Level Shifters
Timers
Lamp and Relay Drivers
Thyristor Firing Circuits
Temperature Compensated Amplifiers
Operational Amplifiers
Pinout
CA3096, CA3096A, CA3096C
(PDIP, SOIC)
TOP VIEW
Description
The CA3096C, CA3096, and CA3096A are general purpose
high voltage silicon transistor arrays. Each array consists of
five independent transistors (two PNP and three NPN types)
on a common substrate, which has a separate connection.
Independent connections for each transistor permit maxi-
mum flexibility in circuit design.
Types CA3096A, CA3096, and CA3096C are identical, except
that the CA3096A specifications include parameter matching
and greater stringency in I
CBO
, I
CEO
, and V
CE
(SAT). The
CA3096C is a relaxed version of the CA3096.
Ordering Information
PART NUMBER
(BRAND)
TEMP.
RANGE (
o
C)
PACKAGE
PKG.
NO.
CA3096AE
-55 to 125
16 Ld PDIP
E16.3
CA3096AM
(3096A)
-55 to 125
16 Ld SOIC
M16.15
CA3096AM96
(3096A)
-55 to 125
16 Ld SOIC Tape
and Reel
M16.15
CA3096CE
-55 to 125
16 Ld PDIP
E16.3
CA3096E
-55 to 125
16 Ld PDIP
E16.3
CA3096M
(3096)
-55 to 125
16 Ld SOIC
M16.15
CA3096M96
(3096)
-55 to 125
16 Ld SOIC Tape
and Reel
M16.15
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
SUBSTRATE
Q
1
Q
2
Q
4
Q
5
Q
3
CA3096, CA3096A, CA3096C
Essential Differences
CHARACTERISTIC
CA3096A
CA3096
CA3096C
V
(BR)CEO
(V) (Min)
NPN
35
35
24
PNP
-40
-40
-24
V
(BR)CBO
(V) (Min)
NPN
45
45
30
PNP
-40
-40
-24
h
FE
at 1mA
NPN
150-500
150-500
100-670
PNP
20-200
20-200
15-200
h
FE
at 100
A
PNP
40-250
40-250
30-300
I
CBO
(nA) (Max)
NPN
40
100
100
PNP
-40
-100
-100
I
CEO
(nA) (Max)
NPN
100
1000
1000
PNP
-100
-1000
-1000
V
CE SAT
(V) (Max)
NPN
0.5
0.7
0.7
|V
IO
| (mV) (Max)
NPN
5
-
-
PNP
5
-
-
|I
IO
| (
A) (Max)
NPN
0.6
-
-
PNP
0.25
-
-
December 1997
CA3096, CA3096A,
CA3096C
NPN/PNP Transistor Arrays
File Number
595.4
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright Intersil Corporation 1999
2
Absolute Maximum Ratings
Operating Conditions
NPN
PNP
Collector-to-Emitter Voltage, V
CEO
CA3096, CA3096A . . . . . . . . . . . . . . . . . . . . . 35V
-40V
CA3096C . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24V
-24V
Collector-to-Base Voltage, V
CBO
CA3096, CA3096A . . . . . . . . . . . . . . . . . . . . . 45V
-40V
CA3096C . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30V
-24V
Collector-to-Substrate Voltage, V
CIO
(Note 1)
CA3096, CA3096A . . . . . . . . . . . . . . . . . . . . . 45V
-
CA3096C . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30V
-
Emitter-to-Substrate Voltage, V
EIO
CA3096, CA3096A . . . . . . . . . . . . . . . . . . . . . . -
-40V
CA3096C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -
-24V
Emitter-to-Base Voltage, V
EBO
CA3096, CA3096A . . . . . . . . . . . . . . . . . . . . . . 6V
-40V
CA3096C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6V
-24V
Collector Current, I
C
(All Types) . . . . . . . . . . . . 50mA
-10mA
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . .-55
o
C to 125
o
C
Thermal Information
Thermal Resistance (Typical, Note 2)
JA
(
o
C/W)
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
90
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
125
Maximum Power Dissipation (Each Transistor, Note 3) . . . . . 200mW
Maximum Junction Temperature (Plastic Package) . . . . . . . . 150
o
C
Maximum Storage Temperature Range . . . . . . . . . .-65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300
o
C
(SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. The collector of each transistor of the CA3096 is isolated from the substrate by an integral diode. The substrate (Terminal 16) must be
connected to the most negative point in the external circuit to maintain isolation between transistors and to provide for normal transistor
action.
2.
JA
is measured with the component mounted on an evaluation PC board in free air.
3. Care must be taken to avoid exceeding the maximum junction temperature. Use the total power dissipation (all transistors) and thermal
resistances to calculate the junction temperature.
Electrical Specifications
For Equipment Design, At T
A
= 25
o
C
PARAMETER
TEST
CONDITIONS
CA3096
CA3096A
CA3096C
UNITS
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
DC CHARACTERISTICS FOR EACH NPN TRANSISTOR
I
CBO
V
CB
= 10V,
I
E
= 0
-
0.001
100
-
0.001
40
-
0.001
100
nA
I
CEO
V
CE
= 10V,
I
B
= 0
-
0.006
1000
-
0.006
100
-
0.006
1000
nA
V
(BR)CEO
I
C
= 1mA, I
B
= 0
35
50
-
35
50
-
24
35
-
V
V
(BR)CBO
I
C
= 10
A,
I
E
= 0
45
100
-
45
100
-
30
80
-
V
V
(BR)CIO
I
CI
= 10
A,
I
B
= I
E
= 0
45
100
-
45
100
-
30
80
-
V
V
(BR)EBO
I
E
= 10
A,
I
C
= 0
6
8
-
6
8
-
6
8
-
V
V
Z
I
Z
= 10
A
6
7.9
9.8
6
7.9
9.8
6
7.9
9.8
V
V
CE SAT
l
C
= 10mA,
I
B
= 1mA
-
0.24
0.7
-
0.24
0.5
-
0.24
0.7
V
V
BE
(Note 4)
I
C
= 1mA,
V
CE
= 5V
0.6
0.69
0.78
0.6
0.69
0.78
0.6
0.69
0.78
V
h
FE
(Note 4)
150
390
500
150
390
500
100
390
670
|
V
BE
/
T| (Note 4)
I
C
= 1mA,
V
CE
= 5V
-
1.9
-
-
1.9
-
-
1.9
-
mV/
o
C
DC CHARACTERISTICS FOR EACH PNP TRANSISTOR
I
CBO
V
CB
= -10V,
I
E
= 0
-
-0.06
-100
-
-0.006
-40
-
-0.06
-100
nA
CA3096, CA3096A, CA3096C
3
I
CEO
V
CE
= -10V,
I
B
= 0
-
-0.12
-1000
-
-0.12
-100
-
-0.12
-1000
nA
V
(BR)CEO
I
C
= -100
A,
I
B
= 0
-40
-75
-
-40
-75
-
-24
-30
-
V
V
(BR)CBO
I
C
= -10
A,
I
E
= 0
-40
-80
-
-40
-80
-
-24
-60
-
V
V
(BR)EBO
I
E
= -10
A,
I
C
= 0
-40
-100
-
-40
-100
-
-24
-80
-
V
V
(BR)ElO
I
EI
= 10
A,
I
B
= I
C
= 0
40
100
-
40
100
-
24
80
-
V
V
CE SAT
I
C
= -1mA,
I
B
= -100
A
-
-0.16
-0.4
-
-0.16
-0.4
-
-0.16
-0.4
V
V
BE
(Note 4)
I
C
= -100
A,
V
CE
= -5V
-0.5
-0.6
-0.7
-0.5
-0.6
-0.7
-0.5
-0.6
-0.7
V
h
FE
(Note 4)
I
C
= -100
A,
V
CE
= -5V
40
85
250
40
85
250
30
85
300
I
C
= -1mA,
V
CE
= -5V
20
47
200
20
47
200
15
47
200
|
V
BE
/
T| (Note 4)
I
C
= -100
A,
V
CE
= -5V
-
2.2
-
-
2.2
-
-
2.2
-
mV/
o
C
I
CBO
Collector-Cutoff Current
V
Z
Emitter-to-Base Zener Voltage
I
CEO
Collector-Cutoff Current
V
CE SAT
Collector-to-Emitter Saturation Voltage
V
(BR)CEO
Collector-to-Emitter Breakdown Voltage
V
BE
Base-to-Emitter Voltage
V
(BR)CBO
Collector-to-Base Breakdown Voltage
h
FE
DC Forward-Current Transfer Ratio
V
(BR)CIO
Collector-to-Substrate Breakdown Voltage
|
V
BE
/
T| Magnitude of Temperature Coefficient:
(for each transistor)
V
(BR)EBO
Emitter-to-Base Breakdown Voltage
NOTE:
4. Actual forcing current is via the emitter for this test.
Electrical Specifications
For Equipment Design At T
A
= 25
o
C (CA3096A Only)
PARAMETER
SYMBOL
TEST CONDITIONS
CA3096A
UNITS
MIN
TYP
MAX
FOR TRANSISTORS Q
1
AND Q
2
(AS A DIFFERENTIAL AMPLIFIER)
Absolute Input Offset Voltage
|VIO|
V
CE
= 5V, I
C
= 1mA
-
0.3
5
mV
Absolute Input Offset Current
|I
IO
|
-
0.07
0.6
A
Absolute Input Offset Voltage
Temperature Coefficient
-
1.1
-
V/
o
C
FOR TRANSISTORS Q
4
AND Q
5
(AS A DIFFERENTIAL AMPLIFIER)
Absolute Input Offset Voltage
|V
IO
|
V
CE
= -5V, I
C
= -100
A
R
S
= 0
-
0.15
5
mV
Absolute Input Offset Current
|I
IO
|
-
2
250
nA
Absolute Input Offset Voltage
Temperature Coefficient
-
0.54
-
V/
o
C
Electrical Specifications
For Equipment Design, At T
A
= 25
o
C (Continued)
PARAMETER
TEST
CONDITIONS
CA3096
CA3096A
CA3096C
UNITS
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
V
IO
T
------------------
V
IO
T
------------------
CA3096, CA3096A, CA3096C
4
Electrical Specifications
Typical Values Intended Only for Design Guidance At T
A
= 25
o
C
PARAMETER
SYMBOL
TEST CONDITIONS
TYPICAL
VALUES
UNITS
DYNAMIC CHARACTERISTICS FOR EACH NPN TRANSISTOR
Noise Figure (Low Frequency)
NF
f = 1kHz, V
CE
= 5V, I
C
= 1mA, R
S
= 1k
2.2
dB
Low-Frequency, Input Resistance
R
I
f = 1.0kHz, V
CE
= 5V I
C
= 1 mA
10
k
Low-Frequency Output Resistance
R
O
f = 1.0kHz, V
CE
= 5V I
C
= 1 mA
80
k
Admittance Characteristics
Forward Transfer Admittance
y
FE
g
FE
f = 1MHz, V
CE
= 5V, I
C
= 1mA
7.5
mS
b
FE
f = 1MHz, V
CE
= 5V, I
C
= 1mA
-j13
mS
Input Admittance
y
IE
g
IE
f = 1MHz, V
CE
= 5V, I
C
= 1mA
2.2
mS
b
IE
f = 1MHz, V
CE
= 5V, I
C
= 1mA
j3.1
mS
Output Admittance
y
OE
g
OE
f = 1MHz, V
CE
= 5V, I
C
= 1mA
0.76
mS
b
OE
f = 1MHz, V
CE
= 5V, I
C
= 1mA
j2.4
mS
Gain-Bandwidth Product
f
T
V
CE
= 5V, I
C
= 1.0mA
280
MHz
V
CE
= 5V, I
C
= 5mA
335
MHz
Emitter-To-Base Capacitance
C
EB
V
EB
= 3V
0.75
pF
Collector-To-Base Capacitance
C
CB
V
CB
= 3V
0.46
pF
Collector-To-Substrate Capacitance
C
CI
V
CI
= 3V
3.2
pF
DYNAMIC CHARACTERISTICS FOR EACH PNP TRANSISTOR
Noise Figure (Low Frequency)
NF
f = 1kHz, I
C
= 100
A, R
S
= 1k
3
dB
Low-Frequency Input Resistance
R
I
f = 1kHz, V
CE
= 5V, I
C
= 100
A
27
k
Low-Frequency Output Resistance
R
O
f = 1kHz, V
CE
= 5V, I
C
= 100
A
680
k
Gain-Bandwidth Product
f
T
V
CE
= 5V, I
C
= 100
A
6.8
MHz
Emitter-To-Base Capacitance
C
EB
V
EB
= -3V
0.85
pF
Collector-To-Base Capacitance
C
CB
V
CB
= -3V
2.25
pF
Base-To-Substrate Capacitance
C
BI
V
BI
= 3V
3.05
pF
Typical Applications
FIGURE 1. FREQUENCY COMPARATOR USING CA3096
FIGURE 2. FREQUENCY COMPARATOR CHARACTERISTICS
2
4
3
6
1
5
15
10
12
9
7
14
8
13
11
16
(SUBSTRATE)
1
F
3k
3k
500
500
1k
1k
0.1
F
0.1
F
44003
Q
4
Q
5
OUTPUT
Q
2
f
1
f
2
V+ = 10V
NOTE: F
1
OR F
2
< 10kHz
OUTPUT V
O
L
T
A
GE (V)
9
8
7
6
5
4
3
2
1
0
-20
-10
0
10
20
f
2
- f
1
> 0
f
1
= f
2
f
1
- f
2
> 0
FREQUENCY DEVIATION (kHz)
CENTER FREQUENCY: 1kHz
CA3096, CA3096A, CA3096C
5
FIGURE 3. LINE-OPERATED LEVEL SWITCH USING CA3096A OR CA3096
FIGURE 4. ONE-MINUTE TIMER USING CA3096A AND A MOSFET
FIGURE 5. CA3096A SMALL-SIGNAL ZERO VOLTAGE DETECTOR HAVING NOISE IMMUNITY
Typical Applications
(Continued)
LOAD
16
15
13
10
12
14
9
8
7
1
2
3
11
120V
AC
Q
1
6.8k
2W
Q
3
100
F
12V
+
-
R
P
5.1k
10k
Q
4
Q
5
Q
2
5
6
4
10k
10k
5.1k
1k
G
MT
1
T2300B
MT
2
NTC
SENSOR
13
14
15
10
12
1
6
4
2
9
7
16
3
5
8
11
Q
5
40841
MOSFET
50M
5
F
1k
+6V
OUTPUT
Q
4
1k
3.9k
10k
20k
20k
5k
5k
Q
3
Q
1
Q
2
TIME DELAY CHANGES
7%
FOR SUPPLY VOLTAGE CHANGE OF
10%
12
10
3
14
11
15
13
6
5
4
2
1
8
9
7
1k
2k
100
R
L
E
O
1k
1k
1k
100
V
IN
Q
1
Q
4
Q
5
Q
2
Q
3
V-
I
O
V+
IF I
O
= 1mA AND R
L
= 1k
V
T
=
36mV
V
T
36
I
O
R
L
---------------
=
+V
T
V
IN
-V
T
E
O
0
t
t
CA3096, CA3096A, CA3096C