ChipFind - документация

Электронный компонент: DG201ABK

Скачать:  PDF   ZIP
4-1
File Number
3117.2
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright Intersil Corporation 1999
DG201A, DG202
Quad SPST, CMOS Analog Switches
The DG201A and DG202 quad SPST analog switches are
designed using Intersil's 44V CMOS process. These
bidirectional switches are latch-proof and feature break-
before-make switching. Designed to block signals up to
30V
P-P
in the OFF state, the DG201A and DG202 offer the
advantages of low ON resistance (
175
), wide input signal
range (
15V) and provide both TTL and CMOS compatibility.
The DG201A and DG202 are specification and pinout
compatible with the industry standard devices.
Pinout
DG201A, DG202
(CERDIP, PDIP, SOIC)
TOP VIEW
Features
Input Signal Range. . . . . . . . . . . . . . . . . . . . . . . . . .
15V
Low r
DS(ON)
(Max) . . . . . . . . . . . . . . . . . . . . . . . . . . 175
TTL, CMOS Compatible
Latch-Up Proof
True Second Source
Maximum Supply Ratings. . . . . . . . . . . . . . . . . . . . . . 44V
Logic Inputs Accept Negative Voltages
Functional Block Diagrams
DG201A
DG202
Ordering Information
PART NUMBER
TEMP.
RANGE (
o
C)
PACKAGE
PKG.
NO.
DG201AAK
-55 to 125
16 Ld CERDIP
F16.3
DG201ABK
-25 to 85
16 Ld CERDIP
F16.3
DG201ACJ
0 to 70
16 Ld PDIP
E16.3
DG201ACY
0 to 70
16 Ld SOIC
M16.3
DG202AK
-55 to 125
16 Ld CERDIP
F16.3
DG202CJ
0 to 70
16 Ld PDIP
E16.3
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
IN
1
D
1
S
1
V-
GND
S
4
IN
4
D
4
IN
2
S
2
V+ (SUB-
NC
S
3
D
3
IN
3
D
2
STRATE)
-
TRUTH TABLE
LOGIC
DG201A
DG202
0
ON
OFF
1
OFF
ON
Logic "0"
0.8V, Logic "1"
2.4V
IN
1
S
1
D
1
IN
2
S
2
D
2
IN
3
S
3
D
3
IN
4
S
4
D
4
IN
1
S
1
D
1
IN
2
S
2
D
2
IN
3
S
3
D
3
IN
4
S
4
D
4
SWITCHES SHOWN FOR LOGIC "1" INPUT
Data Sheet
June 1999
4-2
Absolute Maximum Ratings
Thermal Information
V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44V
V- to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -25V
V
IN
to Ground (Note 1) . . . . . . . . . . . . . . . . . . . (V-) -2V to (V+) +2V
V
S
or V
D
to V+ (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . +2 to (V-) -2V
V
S
or V
D
to V- (Note 1) . . . . . . . . . . . . . . . . . . . . . . . -2 to (V+) +2V
Current, any Terminal Except S or D . . . . . . . . . . . . . . . . . . . . 30mA
Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . . 20mA
Peak Current, S or D (Pulsed 1ms, 10% Duty Cycle Max) . . . . . 70mA
Operating Conditions
Temperature Range
"A" Suffix. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55
o
C to 125
o
C
"B" Suffix. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -25
o
C to 85
o
C
"C" Suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0
o
C to 70
o
C
Thermal Resistance (Typical, Note 2)
JA
(
o
C/W)
JC
(
o
C/W)
CERDIP Package . . . . . . . . . . . . . . . . .
75
20
PDIP Package . . . . . . . . . . . . . . . . . . .
100
N/A
SOIC Package . . . . . . . . . . . . . . . . . . .
100
N/A
Maximum Junction Temperature
Ceramic Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175
o
C
Plastic Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150
o
C
Maximum Storage Temperature Range . . . . . . . . . . -65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300
o
C
(SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. Signals on V
S
, V
D
, or V
IN
exceeding V+ or V- will be clamped by internal diodes. Limit forward diode current to maximum current ratings.
2.
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
V+ = 15V, V- = -15V, GND = 0V, T
A
= 25
o
C
PARAMETER
TEST CONDITIONS
"A" SUFFIX
"B" AND "C" SUFFIX
UNITS
MIN
(NOTE 3)
TYP
MAX
MIN
(NOTE 3)
TYP
MAX
DYNAMIC CHARACTERISTICS
Turn-ON Time, t
ON
See Figure 1
-
480
600
-
480
-
ns
Turn-OFF Time, t
OFF
See Figure 1
-
370
450
-
370
-
ns
Charge Injection, Q
C
L
= 1nF, R
S
= 0, V
S
= 0V
-
20
-
-
20
-
pC
OFF Isolation, OIRR
V
IN
= 5V, R
L
= 75
, V
S
= 2.0V,
f = 100kHz
-
70
-
-
70
-
dB
Crosstalk (Channel to Channel), CCRR
-
-90
-
-
-90
-
dB
Source OFF Capacitance, C
S(OFF)
f = 140kHz, V
IN
= 5V, V
S
= V
D
= 0V
-
5.0
-
-
5.0
-
pF
Drain OFF Capacitance, C
D(OFF)
-
5.0
-
-
5.0
-
pF
Channel ON Capacitance,
C
D(ON)
+ C
S(ON)
-
16
-
-
16
-
pF
DIGITAL INPUT CHARACTERISTICS
Input Current with Voltage High, I
IH
V
IN
= 2.4V
-1.0
-0.0004
-
-1.0
-0.0004
-
A
V
IN
= 15V
-
0.003
1.0
-
0.003
1.0
A
Input Current with Voltage Low, I
IL
V
IN
= 0V
-1.0
-0.0004
-
-1.0
-0.0004
-
A
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, V
ANALOG
-15
-
15
-15
-
15
V
Drain-Source ON Resistance, r
DS(ON)
V
D
=
10V, V
IN
= 0.8V (DG201A)
I
S
= 1mA, V
IN
= 2.4V (DG202)
-
115
175
-
115
200
Source OFF Leakage Current, I
S(OFF)
V
IN
= 2.4V
(DG201A)
V
IN
= 0.8V
(DG202)
V
S
= 14V, V
D
= -14V
-
0.01
1.0
-
0.01
5.0
nA
V
S
= -14V, V
D
= 14V
-1.0
-0.02
-
-5.0
-0.02
-
nA
Drain OFF Leakage Current, I
D(OFF)
V
S
= -14V, V
D
= 14V
-
0.01
1.0
-
0.01
5.0
nA
V
S
= 14V, V
D
= -14V
-1.0
-0.02
-
-5.0
-0.02
-
nA
DG201A, DG202
4-3
Drain ON Leakage Current, I
D(ON)
(Note 5)
V
IN
= 0.8V
(DG201A)
V
IN
= 2.4V
(DG202)
V
D
= V
S
= 14V
-
0.1
1.0
-
0.1
5.0
A
V
D
= V
S
= -14V
-1.0
-0.15
-
-5.0
-0.15
-
A
POWER SUPPLY CHARACTERISTICS
Positive Supply Current, I+
All Channels ON or OFF
-
0.9
2
-
0.9
2
mA
Negative Supply Current, I-
-1
-0.3
-
-1
-0.3
-
mA
Electrical Specifications
V+ = 15V, V- = -15V, GND = 0V, T
A
= 25
o
C (Continued)
PARAMETER
TEST CONDITIONS
"A" SUFFIX
"B" AND "C" SUFFIX
UNITS
MIN
(NOTE 3)
TYP
MAX
MIN
(NOTE 3)
TYP
MAX
Electrical Specifications
V+ = 15V, V- = -15V, GND = 0V, T
A
Over Operating Temperature Range
PARAMETER
TEST CONDITIONS
"A" SUFFIX
UNITS
MIN
(NOTE 3)
TYP
MAX
DIGITAL INPUT CHARACTERISTICS
Input Current with Voltage High, I
IH
V
IN
= 2.4V
-10
-
-
A
V
IN
= 15V
-
-
10
A
Input Current with Voltage Low, I
IL
V
IN
= 0V
-10
-
-
A
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, V
ANALOG
-15
-
15
V
Drain-Source ON Resistance, r
DS(ON)
V
D
=
10V, V
IN
= 0.8V (DG201A)
I
S
= 1mA, V
IN
= 2.4V (DG202)
-
-
250
Source OFF Leakage Current, I
S(OFF)
V
IN
= 2.4V (DG201A)
V
IN
= 0.8V (DG202)
V
S
= 14V, V
D
= -14V
-
-
100
nA
V
S
= -14V, V
D
= 14V
-100
-
-
nA
Drain OFF Leakage Current, I
D(OFF)
V
S
= -14V, V
D
= 14V
-
-
100
nA
V
S
= 14V, V
D
= -14V
-100
-
-
nA
Drain ON Leakage Current, I
D(ON)
(Note 5)
V
IN
= 0.8V (DG201A)
V
IN
= 2.4V (DG202)
V
D
= V
S
= 14V
-
-
200
A
V
D
= V
S
= -14V
-200
-
-
A
NOTES:
3. Typical values are for design aid only, not guaranteed and not subject to production testing.
4. The algebraic convention whereby the most negative value is a minimum, and the most positive is a maximum, is used in this data sheet.
5. I
D(ON)
is leakage from driver into ON switch.
DG201A, DG202
4-4
Test Circuits and Waveforms
FIGURE 1. t
ON
AND t
OFF
SWITCHING TEST CIRCUIT AND MEASUREMENT POINTS
NOTES:
6.
V
O
= Measured voltage error due to charge injection.
7. The error in coulombs is Q = C
L
x
V
O
.
FIGURE 2. CHARGE INJECTION TEST CIRCUIT AND MEASUREMENT POINTS
C = 0.001
F||0.1
F
Chip Capacitors
FIGURE 3. OFF ISOLATION TEST CIRCUIT
C = 0.001
F||0.1
F
Chip Capacitors
FIGURE 4. CHANNEL TO CHANNEL CROSSTALK TEST
CIRCUIT
LOGIC "0" = SWITCH ON
50%
90%
t
OFF
LOGIC
INPUT
SWITCH
OUTPUT
V
S
3V
t
ON
t
r
< 20ns
t
f
< 20ns
V
O
S
1
IN
1
LOGIC
INPUT
GND
V
S
= 2V
R
L
1k
C
L
35pF
SWITCH
OUTPUT
15V
V+
-15V
V-
SWITCH
INPUT
(REPEAT TEST FOR
IN
2
, IN
3
AND IN
4
)
V
O
= V
S
R
L
R
L
+ r
DS(ON)
90%
SWITCH
INPUT
Logic shown for DG201A, invert for DG202.
D
1
R
S
S
X
C
L
= 1nF
V
O
D
X
IN
X
V
S
IN
X
V
O
ON
OFF
ON
SWITCH
OUTPUT
ANALYZER
R
L
SIGNAL
GENERATOR
V+
C
V-
-15V
C
V
S
V
D
IN
X
GND
CHAN A
CHAN B
V
IN
+15V
V
S
OIRR
20 Log
V
S
V
D
--------
=
0V,
V+
V
S1
R
L
GND
IN
1
V
D1
IN
2
50
0V, 2.4V
NC
V-
-15V
V
D2
ANALYZER
CHAN A
CHAN B
SIGNAL
GENERATOR
V
S2
2.4V
C
C
+15V
3
V
S
CCRR
20 Log
V
S
1
VD
2
-----------
=
DG201A, DG202
4-5
DG201A, DG202
Dual-In-Line Plastic Packages (PDIP)
NOTES:
1. Controlling Dimensions: INCH. In case of conflict between English and
Metric dimensions, the inch dimensions control.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Symbols are defined in the "MO Series Symbol List" in Section 2.2 of
Publication No. 95.
4. Dimensions A, A1 and L are measured with the package seated in JE-
DEC seating plane gauge GS-3.
5. D, D1, and E1 dimensions do not include mold flash or protrusions.
Mold flash or protrusions shall not exceed 0.010 inch (0.25mm).
6. E and
are measured with the leads constrained to be perpendic-
ular to datum
.
7. e
B
and e
C
are measured at the lead tips with the leads unconstrained.
e
C
must be zero or greater.
8. B1 maximum dimensions do not include dambar protrusions. Dambar
protrusions shall not exceed 0.010 inch (0.25mm).
9. N is the maximum number of terminal positions.
10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3,
E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm).
e
A
-C-
C
L
E
e
A
C
e
B
e
C
-B-
E1
INDEX
1 2 3
N/2
N
AREA
SEATING
BASE
PLANE
PLANE
-C-
D1
B1
B
e
D
D1
A
A2
L
A1
-A-
0.010 (0.25)
C
A
M
B S
E16.3
(JEDEC MS-001-BB ISSUE D)
16 LEAD DUAL-IN-LINE PLASTIC PACKAGE
SYMBOL
INCHES
MILLIMETERS
NOTES
MIN
MAX
MIN
MAX
A
-
0.210
-
5.33
4
A1
0.015
-
0.39
-
4
A2
0.115
0.195
2.93
4.95
-
B
0.014
0.022
0.356
0.558
-
B1
0.045
0.070
1.15
1.77
8, 10
C
0.008
0.014
0.204
0.355
-
D
0.735
0.775
18.66
19.68
5
D1
0.005
-
0.13
-
5
E
0.300
0.325
7.62
8.25
6
E1
0.240
0.280
6.10
7.11
5
e
0.100 BSC
2.54 BSC
-
e
A
0.300 BSC
7.62 BSC
6
e
B
-
0.430
-
10.92
7
L
0.115
0.150
2.93
3.81
4
N
16
16
9
Rev. 0 12/93