1
FN7010.1
EL1883
Sync Separator with Horizontal Output
The EL1883 video sync separator is
manufactured using Elantec's high
performance analog CMOS process.
This device extracts sync timing information from both
standard and non-standard video input and also in the
presence of Macrovision pulses. It provides composite sync,
vertical sync, burst/back porch timing, and horizontal
outputs. Fixed 70mV sync tip slicing provides sync edge
detection when the video input level is between 0.5V
P-P
and
2V
P-P
(sync tip amplitude 143mV to 572mV). A single
external resistor sets all internal timing to adjust for various
video standards. The composite sync output follows video in
sync pulses and a vertical sync pulse is output on the rising
edge of the first vertical serration following the vertical pre-
equalizing string. For non-standard vertical inputs, a default
vertical pulse is output when the vertical signal stays low for
longer than the vertical sync default delay time. The
horizontal output gives horizontal timing with pre/post
equalizing pulses.
The EL1883 is available in an 8-pin SO package and is
specified for operation over the full -40C to +85C
temperature range.
Features
NTSC, PAL, SECAM, non-standard video sync separation
Fixed 70mV slicing of video input levels from 0.5V
P-P
to
2V
P-P
Low supply current - 1.5mA typ.
Single 3V to 5V supply
Composite sync output
Vertical output
Horizontal output
Burst/back porch output
Macrovision compatible
Available in 8-pin SO package
Pb-free available
Applications
Video amplifiers
PCMCIA applications
A/D drivers
Line drivers
Portable computers
High speed communications
RGB applications
Broadcast equipment
Active filtering
Demo Board
A dedicated demo board is available
Pinout
EL1883
(8-PIN SO)
TOP VIEW
Ordering Information
PART
NUMBER
PACKAGE
TAPE & REEL PKG. DWG. #
EL1883IS
8-Pin SO
-
MDP0027
EL1883IS-T7
8-Pin SO
7"
MDP0027
EL1883IS-T13
8-Pin SO
13"
MDP0027
EL1883ISZ
(See Note)
8-Pin SO
(Pb-free)
-
MDP0027
EL1883ISZ-T7
(See Note)
8-Pin SO
(Pb-free)
7"
MDP0027
EL1883ISZ-
T13 (See Note)
8-Pin SO
(Pb-free)
13"
MDP0027
NOTE: Intersil Pb-free products employ special Pb-free material
sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which is compatible with both SnPb and
Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J Std-020B.
COMPOSITE SYNC OUT
COMPOSITE VIDEO IN
VERTICAL SYNC OUT
GND
VDD
HORIZONTAL OUTPUT
RSET
BURST/BACK
PORCH OUTPUT
1
2
3
4
8
7
6
5
Data Sheet
July 26, 2004
CCAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2003, 2004. All Rights Reserved. Elantec is a registered trademark of Elantec Semiconductor, Inc.
All other trademarks mentioned are the property of their respective owners.
2
NOTE: All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are at the specified
temperature and are pulsed tests, therefore: T
J
= T
C
= T
A
Absolute Maximum Ratings
(T
A
= 25C)
V
CC
Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7V
Pin Voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to V
CC
+0.5V
Operating Ambient Temperature Range . . . . . . . . . .-40C to +85C
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65C to +150C
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .400mW
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
DC Electrical Specifications
V
DD
= 3.3V, T
A
= 25C, R
SET
= 681k
, Unless Otherwise Specified.
PARAMETER
DESCRIPTION
MIN
TYP
MAX
UNIT
I
DD
, Quiescent
V
DD
= 5V
0.75
1.5
3
mA
Clamp Voltage
Pin 2, I
LOAD
= -100A
1.35
1.5
1.65
V
Clamp Discharge Current
Pin 2 = 2V
6
12
16
A
Clamp Charge Current
Pin 2 = 1V
-0.85
-0.65
-0.45
mA
R
SET
Pin Reference Voltage
Pin 6
1.1
1.22
1.35
V
V
OL
Output Low Voltage
I
OL
= 1.6mA
0.24
0.5
V
V
OH
Output High Voltage
I
OH
= -40A
3
3.2
V
I
OH
= -1.6mA
2.5
3.0
V
Dynamic Characteristics
PARAMETER
DESCRIPTION
MIN
TYP
MAX
UNIT
Comp Sync Prop Delay, t
CS
See Figure 13
35
75
ns
Horizontal Sync Delay, t
HS
40
80
ns
Horizontal Sync Width
3.8
5.2
6.2
s
Vertical Sync Width, t
VS
Normal or Default Trigger, 50%-50%
190
230
300
s
Vertical Sync Default Delay, t
VSD
See Figure 14
35
62
85
s
Burst/Back Porch Delay, t
BD
See Figure 13
120
200
300
ns
Burst/Back Porch Width, t
B
See Figure 13
2.5
3.5
4.5
s
Input Dynamic Range
Video Input Amplitude to Maintain Slice
Level Spec, V
DD
= 5V
0.5
2
V
P-P
Slice Level
V
SLICE
above V
CLAMP
50
70
90
mV
EL1883
3
Pin Descriptions
PIN NUMBER
PIN NAME
PIN FUNCTION
1
Composite Sync Out
Composite sync pulse output; sync pulses start on a falling edge and end on a rising edge
2
Composite Video In
AC coupled composite video input; sync tip must be at the lowest potential (positive picture phase)
3
Vertical Sync Out
Vertical sync pulse output; the falling edge of vert sync is the start of the vertical period
4
GND
Supply ground
5
Burst/Back Porch
Output
Burst/back porch output; low during burst portion of composite video
6
RSET (Note)
An external resistor to ground sets all internal timing; a 681k 1% resistor will provide correct timing for
NTSC signals
7
Horizontal Output
Horizontal output; falling edge active
8
VDD 5V
Positive supply (5V)
NOTE: R
SET
must be a 1% resistor
Typical Performance Curves
FIGURE 1. R
SET
vs HORIZONTAL FREQUENCY
FIGURE 2. BURST/BACK PORCH DELAY vs R
SET
FIGURE 3. HORIZONTAL SYNC WIDTH vs R
SET
FIGURE 4. BURST/BACK PORCH WIDTH vs R
SET
V
DD
= 3V, V
DD
= 5V, T
A
= 25C
10
20
30
40
50
60
70
FREQUENCY (kHz)
900
800
700
600
500
400
300
200
100
0
R
SET
(k
)
T
A
= 25C
V
DD
=3V
V
DD
=5V
100
200
300
400
500
600
800
R
SET
(k
)
700
300
250
200
150
100
50
200
0
B
URS
T
BACK
P
O
RCH
DELA
Y (ns)
V
DD
=3V
V
DD
=5V
T
A
= 25C
100
200
300
400
500
600
800
R
SET
(k
)
700
7
6
5
4
3
2
1
0
HORIZONT
AL SYNC WID
T
H (s)
T
A
= 25C
100
300
500
900
R
SET
(k
)
700
4.5
4
3.5
3
2.5
2
1
0
BURST BA
CK POR
CH WID
T
H (ns)
1.5
0.5
V
DD
=5V
V
DD
=3V
EL1883
4
FIGURE 5. VERTICAL SYNC WIDTH vs R
SET
FIGURE 6. BURST/BACK PORCH DELAY vs TEMPERATURE
FIGURE 7. HORIZONTAL SYNC WIDTH vs TEMPERATURE
FIGURE 8. BURST/BACK PORCH WIDTH vs TEMPERATURE
FIGURE 9. VERTICAL SYNC PULSE WIDTH vs TEMPERATURE
FIGURE 10. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
Typical Performance Curves
(Continued)
V
DD
=3V
V
DD
=5V
T
A
= 25C
100
200
300
400
500
600
800
R
SET
(k
)
700
300
250
200
150
100
50
0
VE
R
T
ICAL
SY
NC
WIDTH
(s)
V
DD
=5V
V
DD
=3V
R
SET
= 681k
-50
-30
-10
10
30
50
90
TEMPERATURE (C)
70
300
250
200
150
100
50
0
BURST/BACK PORCH DELA
Y
TIME (ns)
V
DD
=5V
V
DD
=3V
R
SET
= 681k
-50
-30
-10
10
30
50
90
TEMPERATURE (C)
70
5.25
5.2
5.15
5.1
5
4.95
4.85
VE
R
T
ICAL SY
NC WIDTH
(s)
4.9
V
DD
=5V
V
DD
=3V
R
SET
= 681k
-50
-30
-10
10
30
50
90
TEMPERATURE (C)
70
3.62
3.6
3.58
3.56
3.54
3.52
3.46
BURST/BA
CK POR
CH WID
T
H (s)
3.5
3.48
V
DD
=5V
V
DD
=3V
R
SET
= 681k
-50
-30
-10
10
30
50
90
TEMPERATURE (C)
70
230
229
228
227
226
225
220
V
E
RTICAL S
Y
NC
PLUS W
I
DTH (
s)
224
223
222
221
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
0
25
50
75
100
125
150
TEMPERATURE (C)
85
1.8
1.6
1.4
1.2
1
0.8
0
POWER DISS
IP
A
T
ION
(W)
0.6
0.4
0.2
1.136W
JA
=110
C/W
SO8
EL1883
5
FIGURE 11. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE
Typical Performance Curves
(Continued)
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
0
25
50
75
100
125
150
TEMPERATURE (C)
85
1.2
1
0.8
0.6
0.4
0.2
0
P
O
WER DIS
S
IP
A
T
ION
(
W
)
781mW
JA
=16
0C
/W
SO8
SIGNAL 1a. COMPOSITE VIDEO INPUT, FIELD ONE
SEE FIG. 12, 13
SEE FIG. 15
NOTES:
b. The composite sync output reproduces all the video input sync pulses, with a propagation delay.
c. Vertical sync leading edge is coincident with the first vertical serration pulse leading edge, with a propagation delay.
d. Back porch goes low for a fixed pulse width on the trailing edge of video input sync pulses. Note that for serration pulses during vertical, the back
porch starts on the rising edge of the serration pulse (with propagation delay).
e. Horizontal sync output produces the true "H" pulses of nominal width of 5s. It has the same delay as the composite sync.
t
VS
SIGNAL 1b. COMPOSITE SYNC OUTPUT, PIN 1
SIGNAL 1c. VERTICAL SYNC OUTPUT, PIN 3
SIGNAL 1d. BACK PORCH OUTPUT, PIN 5
SIGNAL 1e. HORIZONTAL SYNC OUTPUT, PIN 7
FIGURE 12. TIMING DIAGRAM
EL1883
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