1
FN7172
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2003. All Rights Reserved. Elantec is a registered trademark of Elantec Semiconductor, Inc.
All other trademarks mentioned are the property of their respective owners. Manufactured under U.S. Patent 5,528,303. Manufactured under License, U.S. Patents 5,486,869; 5,754,250.
EL4581
Sync Separator, 50% Slice, S-H, Filter
The EL4581 extracts timing informa-
tion from standard negative going
video sync found in NTSC, PAL, and
SECAM broadcast systems. It can also be used in non stan-
dard formats and with computer graphics systems at higher
scan rates, by adjusting a single external resistor. When the
input does not have correct serration pulses in the vertical
interval, a default vertical output is produced.
Outputs are composite sync, vertical sync, burst/back porch
output, and odd/even output. The later operates only in inter-
laced scan formats.
The EL4581 provides a reliable method of determining cor-
rect sync slide level by setting it to the mid-point between
sync tip and blanking level at the back porch. This 50% level
is determined by two internal self timing sample and hold cir-
cuits that track sync tip and back porch levels. This also
provides a degree of hum and noise rejection to the input sig-
nal, and compensates for varying input levels of 0.5
P-P
to
2.0V
P-P
.
A built in linear phase, third order, low pass filter attenuates
the chroma signal in color systems to prevent incorrectly set
color burst from disturbing the 50% sync slide.
This device may be used to replace the industry standard
LM1881, offering improved performance and reduced power
consumption.
The EL4581 video sync separator is manufactured using
Elantec's high performance analog CMOS process.
Pinout
Features
NTSC, PAL and SECAM sync separation
Single supply, +5V
Precision 50% slicing, internal caps
Built-in color burst filter
Decodes non-standard verticals
Pin compatible with LM1881
Low power
Typically 1.5mA supply current
Resistor programmable scan rate
Few external components
Available in 8-pin PDIP and SO packages
Applications
Video special effects
Video test equipment
Video distribution
Displays
Imaging
Video data capture
Video triggers
Demo Board
A dedicated demo board is not available. However, this
device can be placed on the EL4584/5 Demo Board.
EL4581
(8-Pin SO, DIP)
TOP VIEW
1
2
3
4
8
7
6
5
COMPOSITE
SYNC OUT
COMPOSITE
VIDEO IN
VERTICAL
SYNC OUT
GND
VDD 5V
ODD/EVEN OUTPUT
RSET
BURST/BACK
PORCH OUTPUT
Ordering Information
PART
NUMBER
TEMP.
RANGE
PACKAGE
PKG. NO.
EL4581CN
-40C to +85C
8-Pin PDIP
MDP0031
EL4581CS
-40C to +85C
8-Pin SO
MDP0027
Data Sheet
August 16, 2002
2
Absolute Maximum Ratings
(T
A
= 25 C)
V
CC
Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7V
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65C to +150C
Pin Voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to V
CC
+0.5V
Operating Temperature Range . . . . . . . . . . . . . . . . . -40C to +85C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150C
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: T
J
= T
C
= T
A
DC Electrical Specifications
Unless otherwise state V
DD
= 5V, T
A
= 25C, R
SET
= 680k
.
PARAMETER
DESCRIPTION
TEMP
MIN
TYP
MAX
UNIT
I
DD
V
DD
= 5V (Note 1)
25C
0.75
1.7
3
mA
Clamp Voltage
Pin 2, Unloaded
25C
1.3
1.5
1.9
V
Discharge Current
Pin 2 = 2V
25C
6
10
20
A
Clamp Charge Current
Pin 2, V
IN
= 1V
25C
2
3
mA
Ref Voltage
Pin 6, V
DD
= 5V (Note 2)
25C
1.5
1.8
2.1
V
V
OL
Output Low Voltage
I
OL
= 1.6mA
25C
800
mV
V
OH
Output High Voltage
I
OH
= -40A
25C
4
V
I
OH
= -1.6mA
25C
2.4
V
NOTES:
1. No video signal, outputs unloaded.
2. Tested for V
DD
5V 5% which guarantees timing of output pulses over this range.
Dynamic Specifications
V
DD
= 5V, I
V
pk-pk video, T
A
= 25C, C
L
= 15pF, I
OH
= -1.6mA, I
OL
= 1.6mA. Signal voltages are peak to peak.
PARAMETER
DESCRIPTION
TEMP
MIN
TYP
MAX
UNIT
Vertical Sync Width, t
VS
(Note 1)
25C
190
230
300
s
Burst/Back Porch Width, t
B
(Note 1)
25C
2.5
3.5
4.5
s
Vertical Sync Default Delay t
VSD
25C
40
55
70
s
Filter Attenuation
F
IN
= 3.4MHz (Note 2)
25C
24
dB
Composite Sync Prop Delay
V
IN
- Composite Sync (Note 1)
25C
260
400
ns
Input Dynamic Range
p-p NTSC Signal (Note 3)
25C
0.5
2
V
Slice Level
Input Voltage = 1V
P-P
25C
40%
50%
60%
(Note 4)
Full
40%
50%
60%
NOTES:
1. C/S, Vertical and Burst outputs are all active low - V
OH
= 2.4V, V
OL
= 0.8V.
2. Attenuation is a function of R
SET
(PIN6).
3. Typical min. is 0.3V
P-P
.
4. Refers to threshold level of sync. tip to back porch amplitude.
EL4581
3
Pin Descriptions
PIN NUMBER
PIN NAME
FUNCTION
1
Composite Sync Out
Composite sync pulse output. Sync pulses start on a falling edge and end on a rising edge.
2
Composite Video in
AC coupled composite video input. Sync tip must be at the lowest potential (Positive picture phase).
3
Vertical Sync Out
Vertical sync pulse output. The falling edge of Vert Sync is the start of the vertical period.
4
GND
Supply ground.
5
Burst/Back Porch Output
Burst/Back porch output. Low during burst portion of composite video.
6
R
SET
(Note 1)
An external resistor to ground sets all internal timing. 681k, 1% resistor will provide correct timing
for NTSC signals.
7
Odd/Even Output
Odd/Even field output. Low during odd fields, high during even fields. Transitions occur at start of
Vert Sync pulse.
8
V
DD
5V
Positive supply. (5V)
NOTE 1. R
SET
must be a 1% resistor.
EL4581
4
Typical Performance Curves
R
SET
vs Horizontal
Frequency
Back Porch Clamp
On Time vs R
SET
Vertical Pulse Width
vs R
SET
Vertical Default Delay
Time vs R
SET
Vertical Pulse Width
vs Temperature
Supply Current
vs Temperature
Input Signal = 300mV
P-P
EL4581 Filter Characteristic
Constant Delay 240ns
1.8
1.6
1.4
1.2
1
0.8
0.6
0.4
0.2
0
0
25
50
75
100
125
150
Package Power Dissipation vs Ambient Temperature
JEDEC JESD51-3 Low Effective Thermal Conductivity Test Board
Ambient Temperature (C)
Po
w
e
r
D
i
ssi
pat
io
n
(W
)
1.25W
781mW
85
2
1.8
1.6
1.4
1.2
0.8
0.6
0.4
0.2
0
Po
w
e
r
D
i
ssi
pat
io
n
(W
)
1
0
25
50
75
100
125
150
Package Power Dissipation vs Ambient Temperature
JEDEC JESD51-7 High Effective Thermal Conductivity Test Board
Ambient Temperature (C)
85
1.471W
1.136
SO8
JA
=110C/W
PDIP8
JA
=85C/W
SO8
JA
=160C/W
PDIP8
JA
=100C/W
EL4581
5
Timing Diagrams
NOTES:
b. The composite sync output reproduces all the video input sync pulses, with a propagation delay.
c. Vertical sync leading edge is coincident with the first vertical serration pulse leading edge, with a propagation delay.
d. Odd-even output is low for even field, and high for odd field.
e. Back porch goes low for a fixed pulse width on the trailing edge of video input sync pulses. Note that for serration pulses during vertical, the back porch starts
on the rising edge of the serration pulse (with propagation delay).
FIGURE 1.
EL4581
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