HA-5020

100MHz Current Feedback

Video Amplifier With Disable

The HA-5020 is a wide bandwidth, high slew rate amplifier
optimized for video applications and gains between 1 and
10. Manufactured on Intersil's Reduced Feature
Complementary Bipolar DI process, this amplifier uses
current mode feedback to maintain higher bandwidth at a
given gain than conventional voltage feedback amplifiers.
Since it is a closed loop device, the HA-5020 offers better
gain accuracy and lower distortion than open loop buffers.

The HA-5020 features low differential gain and phase and
will drive two double terminated 75

coax cables to video

levels with low distortion. Adding a gain flatness
performance of 0.1dB makes this amplifier ideal for
demanding video applications. The bandwidth and slew rate
of the HA-5020 are relatively independent of closed loop
gain. The 100MHz unity gain bandwidth only decreases to
60MHz at a gain of 10. The HA-5020 used in place of a
conventional op amp will yield a significant improvement in
the speed power product. To further reduce power, HA-5020
has a disable function which significantly reduces supply
current, while forcing the output to a true high impedance
state. This allows the outputs of multiple amplifiers to be
wire-OR'd into multiplexer configurations. The device also
includes output short circuit protection and output offset
voltage adjustment.

For multi channel versions of the HA-5020 see the HA5022
dual with disable, HA5023 dual, HA5013 triple and HA5024
quad with disable op amp data sheets.

Pinout

HA-5020

(PDIP, SOIC)

TOP VIEW

Features

· Wide Unity Gain Bandwidth . . . . . . . . . . . . . . . . . 100MHz

· Slew Rate. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 800V/

· Output Current . . . . . . . . . . . . . . . . . . . . . . .

30mA (Min)

· Drives 3.5V into 75

· Differential Gain . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.03%

· Differential Phase. . . . . . . . . . . . . . . . . . . . . 0.03 Degrees

· Low Input Voltage Noise . . . . . . . . . . . . . . . . . 4.5nV/

· Low Supply Current . . . . . . . . . . . . . . . . . . . . 10mA (Max)

· Wide Supply Range . . . . . . . . . . . . . . . . . . .

5V to

15V

· Output Enable/Disable

· High Performance Replacement for EL2020

Applications

· Unity Gain Video/Wideband Buffer

· Video Gain Block

· Video Distribution Amp/Coax Cable Driver

· Flash A/D Driver

· Waveform Generator Output Driver

· Current to Voltage Converter; D/A Output Buffer

· Radar Systems

· Imaging Systems

BAL

IN-

IN+

V-

DISABLE

V+

OUT

BAL

Ordering Information

PART NUMBER

(BRAND)

TEMP.

RANGE (

PACKAGE

PKG.

NO.

HA3-5020-5

0 to 75

8 Ld PDIP

E8.3

HA9P5020-5
(H50205)

0 to 75

8 Ld SOIC

M8.15

Data Sheet

August 2002

FN2845.9

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 321-724-7143

Intersil (and design) is a registered trademark of Intersil Americas Inc.

Absolute Maximum Ratings

(Note 1)

Thermal Information

Voltage Between V+ and V- Terminals. . . . . . . . . . . . . . . . . . . . 36V
DC Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

SUPPLY

Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10V
Output Current . . . . . . . . . . . . . . . . . . . . . . . Short Circuit Protected

Operating Conditions

Temperature Range
HA-5020-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0

C to 75

Thermal Resistance (Typical, Note 2)

(

C/W)

(

C/W)

PDIP Package . . . . . . . . . . . . . . . . . . .

120

N/A

SOIC Package . . . . . . . . . . . . . . . . . . .

165

N/A

Maximum Junction Temperature (Plastic Packages, Note 1) . . . 150

Maximum Storage Temperature Range . . . . . . . . . . -65

C to 150

Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300

(SOIC - Lead Tips Only)

CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTES:

1. Maximum power dissipation, including output load, must be designed to maintain junction temperature below 150

C for plastic packages.

is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.

Electrical Specifications

SUPPLY

15V, R

= 1k

= +1, R

= 400

10pF,

Unless Otherwise Specified

PARAMETER

TEST CONDITIONS

TEMP.

(

MIN

TYP

MAX

UNITS

INPUT CHARACTERISTICS

Input Offset Voltage (Notes 3, 14)

Full

Average Input Offset Voltage Drift

Full

Common Mode Rejection Ratio (Note 14)

10V

Full

Power Supply Rejection Ratio (Note 14)

4.5V

18V

Full

Non-Inverting Input (+IN) Current (Note 14)

Full

+IN Common Mode Rejection

10V

0.1

A/V

Full

0.5

A/V

+IN Power Supply Rejection

±4.5V

18V

0.06

A/V

Full

0.2

A/V

Inverting Input (-IN) Current (Note 14)

Full

-IN Common Mode Rejection

10V

0.4

A/V

Full

0.5

A/V

-IN Power Supply Rejection

±4.5V

18V

0.2

A/V

Full

0.5

A/V

TRANSFER CHARACTERISTICS

Transimpedance (Notes 9, 14)

3500

V/mA

Full

1000

V/mA

Open Loop DC Voltage Gain (Note 9)

= 400

OUT

10V

Full

Open Loop DC Voltage Gain

= 100

OUT

2.5V

Full

HA-5020

OUTPUT CHARACTERISTICS

Output Voltage Swing (Note 14)

= 150

25 to 85

12.7

-40 to 0

11.8

Output Current (Guaranteed by Output Voltage Test)

31.7

Full

27.5

POWER SUPPLY CHARACTERISTICS

Quiescent Supply Current (Note 14)

Full

7.5

Supply Current, Disabled (Note 14)

DISABLE = 0V

Full

7.5

Disable Pin Input Current

DISABLE = 0V

Full

1.0

1.5

Minimum Pin 8 Current to Disable (Note 4)

Full

350

Maximum Pin 8 Current to Enable (Note 5)

Full

AC CHARACTERISTICS (A

= +1)

Slew Rate (Note 6)

600

800

Full

500

700

Full Power Bandwidth (Note 7)
(Guaranteed by Slew Rate Test)

9.6

12.7

MHz

Full

8.0

11.1

MHz

Rise Time (Note 8)

Fall Time (Note 8)

Propagation Delay (Notes 8, 14)

-3dB Bandwidth (Note 14)

OUT

= 100mV

100

MHz

Settling Time to 1%

10V Output Step

Settling Time to 0.25%

10V Output Step

100

AC CHARACTERISTICS (A

= +10, R

= 383

)

Slew Rate (Notes 6, 9)

900

1100

Full

700

Full Power Bandwidth (Note 7)
(Guaranteed by Slew Rate Test)

14.3

17.5

MHz

Full

11.1

MHz

Rise Time (Note 8)

Fall Time (Note 8)

Propagation Delay (Notes 8, 14)

-3dB Bandwidth

OUT

= 100mV

MHz

Settling Time to 1%

10V Output Step

Settling Time to 0.1%

10V Output Step

INTERSIL VALUE ADDED SPECIFICATIONS

Input Noise Voltage (Note 14)

f = 1kHz

4.5

nV/

+Input Noise Current (Note 14)

f = 1kHz

2.5

pA/

-Input Noise Current (Note 14)

f = 1kHz

pA/

Input Common Mode Range

Full

-I

BIAS

Adjust Range (Note 3)

Full

Overshoot (Note 14)

Electrical Specifications

SUPPLY

15V, R

= 1k

= +1, R

= 400

10pF,

Unless Otherwise Specified

(Continued)

PARAMETER

TEST CONDITIONS

TEMP.

(

MIN

TYP

MAX

UNITS

HA-5020

Output Current, Short Circuit (Note 14)

10V, V

OUT

= 0V

Full

Output Current, Disabled (Note 14)

DISABLE = 0V,
V

OUT

10V

Full

Output Disable Time (Notes 10, 14)

Output Enable Time (Notes 11, 14)

200

Supply Voltage Range

Output Capacitance, Disabled (Note 12)

DISABLE = 0V

VIDEO CHARACTERISTICS

Differential Gain (Notes 13, 14)

= 150

0.03

Differential Phase (Notes 13, 14)

= 150

0.03

Degrees

Gain Flatness

To 5MHz

0.1

Electrical Specifications

V+ = +5V, V- = -5V, R

= 1k

= +1, R

= 400

10pF, Unless Otherwise Specified.

Parameters are not tested. The limits are guaranteed based on lab characterizations, and reflect
lot-to-lot variation.

PARAMETER

TEST CONDITIONS

TEMP.

(

MIN

TYP

MAX

UNITS

INPUT CHARACTERISTICS

Input Offset Voltage (Notes 3, 14)

Full

Average Input Offset Voltage Drift

Full

Common Mode Rejection Ratio (Notes 14, 15)

Full

Power Supply Rejection Ratio (Note 14)

3.5V

6.5V

Full

Non-Inverting Input (+IN) Current (Note 14)

Full

+IN Common Mode Rejection (Note 15)

0.1

A/V

Full

0.5

A/V

+IN Power Supply Rejection

3.5V

6.5V

0.06

A/V

Full

0.2

A/V

Inverting Input (-IN) Current (Note 14)

Full

-IN Common Mode Rejection (Note 15)

0.4

A/V

Full

0.5

A/V

-IN Power Supply Rejection

3.5V

6.5V

0.2

A/V

Full

0.5

A/V

TRANSFER CHARACTERISTICS

Transimpedance (Notes 9, 14)

1000

V/mA

Full

850

V/mA

Open Loop DC Voltage Gain

= 400

OUT

2.5V

Full

Electrical Specifications

SUPPLY

15V, R

= 1k

= +1, R

= 400

10pF,

Unless Otherwise Specified

(Continued)

PARAMETER

TEST CONDITIONS

TEMP.

(

MIN

TYP

MAX

UNITS

HA-5020

Open Loop DC Voltage Gain

= 100

OUT

2.5V

Full

OUTPUT CHARACTERISTICS

Output Voltage Swing (Note 14)

25 to 85

2.5

3.0

-40 to 0

2.5

3.0

Output Current
(Guaranteed by Output Voltage Test)

= 100

16.6

Full

16.6

POWER SUPPLY CHARACTERISTICS

Quiescent Supply Current (Note 14)

Full

7.5

Supply Current, Disabled (Note 14)

DISABLE = 0V

Full

7.5

Disable Pin Input Current

DISABLE = 0V

Full

1.0

1.5

Minimum Pin 8 Current to Disable (Note 16)

Full

350

Maximum Pin 8 Current to Enable (Note 5)

Full

AC CHARACTERISTICS (A

= +1)

Slew Rate (Note 17)

215

400

Full Power Bandwidth (Note 18)

MHz

Rise Time (Note 8)

Fall Time (Note 8)

Propagation Delay (Note 8)

Overshoot

4.5

-3dB Bandwidth (Note 14)

OUT

= 100mV

125

MHz

Settling Time to 1%

2V Output Step

Settling Time to 0.25%

2V Output Step

AC CHARACTERISTICS (A

= +2, R

= 681

)

Slew Rate (Note 17)

475

Full Power Bandwidth (Note 18)

MHz

Rise Time (Note 8)

Fall Time (Note 8)

Propagation Delay (Note 8)

Overshoot

-3dB Bandwidth (Note 14)

OUT

= 100mV

MHz

Settling Time to 1%

2V Output Step

Settling Time to 0.25%

2V Output Step

100

AC CHARACTERISTICS (A

= +10, R

= 383

)

Slew Rate (Note 17)

350

475

Full Power Bandwidth (Note 18)

MHz

Rise Time (Note 8)

Fall Time (Note 8)

Propagation Delay (Note 8)

Overshoot

1.8

Electrical Specifications

V+ = +5V, V- = -5V, R

= 1k

= +1, R

= 400

10pF, Unless Otherwise Specified.

Parameters are not tested. The limits are guaranteed based on lab characterizations, and reflect
lot-to-lot variation.

(Continued)

PARAMETER

TEST CONDITIONS

TEMP.

(

MIN

TYP

MAX

UNITS

HA-5020

-3dB Bandwidth (Note 14)

OUT

= 100mV

MHz

Settling Time to 1%

2V Output Step

Settling Time to 0.25%

2V Output Step

130

INTERSIL VALUE ADDED SPECIFICATIONS

Input Noise Voltage (Note 14)

f = 1kHz

4.5

nV/

+Input Noise Current (Note 14)

f = 1kHz

2.5

pA/

-Input Noise Current (Note 14)

f = 1kHz

pA/

Input Common Mode Range

Full

2.5V

Output Current, Short Circuit

2.5V, V

OUT

= 0V

Full

Output Current, Disabled (Note 14)

DISABLE = 0V,
V

OUT

2.5V, V

= 0V

Full

Output Disable Time (Notes 14, 20)

Output Enable Time (Notes 14, 21)

Supply Voltage Range

Output Capacitance, Disabled (Note 19)

DISABLE = 0V

VIDEO CHARACTERISTICS

Differential Gain (Notes 13, 14)

= 150

0.03

Differential Phase (Notes 13, 14)

= 150

0.03

Degrees

Gain Flatness

To 5MHz

0.1

NOTES:

2. Suggested V

Adjust Circuit: The inverting input current (-I

BIAS

) can be adjusted with an external 10k

pot between pins 1 and 5, wiper

connected to V+. Since -I

BIAS

flows through the feedback resistor (R

), the result is an adjustment in offset voltage. The amount of offset voltage

adjustment is determined by the value of R

(

-I

BIAS

3. R

= 100

, V

= 10V. This is the minimum current which must be pulled out of the Disable pin in order to disable the output. The output is

considered disabled when -10mV

OUT

+10mV.

4. V

= 0V. This is the maximum current that can be pulled out of the Disable pin with the HA-5020 remaining enabled. The HA-5020 is considered

disabled when the supply current has decreased by at least 0.5mA.

5. V

OUT

switches from -10V to +10V, or from +10V to -10V. Specification is from the 25% to 75% points.

7. R

= 100

, V

OUT

= 1V. Measured from 10% to 90% points for rise/fall times; from 50% points of input and output for propagation delay.

8. This parameter is not tested. The limits are guaranteed based on lab characterization, and reflect lot-to-lot variation.
9. V

= +10V, Disable = +15V to 0V. Measured from the 50% point of Disable to V

OUT

= 0V.

10. V

= +10V, Disable = 0V to +15V. Measured from the 50% point of Disable to V

OUT

= 10V.

11. V

= 0V, Force V

OUT

from 0V to

10V, t

= t

= 50ns.

12. Measured with a VM700A video tester using a NTC-7 composite VITS.
13. See "Typical Performance Curves" for more information.
14. V

2.5V. At -40

C product is tested at V

2.25V because short test duration does not allow self heating.

15. R

= 100

. V

= 2.5V. This is the minimum current which must be pulled out of the Disable pin in order to disable the output. The output is

considered disabled when -10mV

OUT

+10mV.

16. V

OUT

switches from -2V to +2V, or from +2V to -2V. Specification is from the 25% to 75% points.

17. FPBW =

18. V

= 0V, Force V

OUT

from 0V to

2.5V, t

= t

= 50ns.

19. V

= +2V, Disable = +5V to 0V. Measured from the 50% point of Disable to V

OUT

= 0V.

20. V

= +2V, Disable = 0V to +5V. Measured from the 50% point of Disable to V

OUT

= 2V.

Electrical Specifications

V+ = +5V, V- = -5V, R

= 1k

= +1, R

= 400

10pF, Unless Otherwise Specified.

Parameters are not tested. The limits are guaranteed based on lab characterizations, and reflect
lot-to-lot variation.

(Continued)

PARAMETER

TEST CONDITIONS

TEMP.

(

MIN

TYP

MAX

UNITS

FPBW

Slew Rate
2

PEAK

---------------------------; V

PEAK

= 10V.

Slew Rate
2

PEAK

---------------------------; V

PEAK

= 2V

HA-5020

Schematic Diagram

15K

60K

DIS

820

1.2

+IN

P10

400

280

P12

-I

P13

400

200

140

200

P16

200

P18

P17

9.5

P19

V+

V-

800

1.4

HA-5020

Application Information

Optimum Feedback Resistor

The plots of inverting and non-inverting frequency response
illustrate the performance of the HA-5020 in various closed
loop gain configurations. Although the bandwidth dependency
on closed loop gain isn't as severe as that of a voltage
feedback amplifier, there can be an appreciable decrease in
bandwidth at higher gains. This decrease may be minimized
by taking advantage of the current feedback amplifier's unique
relationship between bandwidth and R

. All current feedback

amplifiers require a feedback resistor, even for unity gain
applications, and R

, in conjunction with the internal

compensation capacitor, sets the dominant pole of the
frequency response. Thus, the amplifier's bandwidth is
inversely proportional to R

. The HA-5020 design is optimized

for a 1000

at a gain of +1. Decreasing R

in a unity gain

application decreases stability, resulting in excessive peaking
and overshoot. At higher gains the amplifier is more stable, so
R

can be decreased in a trade-off of stability for bandwidth.

The table below lists recommended R

values for various

gains, and the expected bandwidth.

PC Board Layout

The frequency response of this amplifier depends greatly on
the amount of care taken in designing the PC board. The use
of low inductance components such as chip resistors and
chip capacitors is strongly recommended. If leaded
components are used the leads must be kept short
especially for the power supply decoupling components and
those components connected to the inverting input.

Attention must be given to decoupling the power supplies. A
large value (10

F) tantalum or electrolytic capacitor in

parallel with a small value (0.1

F) chip capacitor works well

in most cases.

A ground plane is strongly recommended to control noise. Care
must also be taken to minimize the capacitance to ground seen
by the amplifier's inverting input (-IN). The larger this
capacitance, the worse the gain peaking, resulting in pulse
overshoot and possible instability. It is recommended that the
ground plane be removed under traces connected to -IN, and
that connections to -IN be kept as short as possible to minimize
the capacitance from this node to ground.

Driving Capacitive Loads

Capacitive loads will degrade the amplifier's phase margin
resulting in frequency response peaking and possible
oscillations. In most cases the oscillation can be avoided by
placing an isolation resistor (R) in series with the output as
shown in Figure 6.

The selection criteria for the isolation resistor is highly
dependent on the load, but 27

has been determined to be

a good starting value.

Enable/Disable Function

When enabled the amplifier functions as a normal current
feedback amplifier with all of the data in the electrical
specifications table being valid and applicable. When
disabled the amplifier output assumes a true high
impedance state and the supply current is reduced
significantly.

The circuit shown in Figure 7 is a simplified schematic of the
enable/disable function. The large value resistors in series
with the DISABLE pin makes it appear as a current source to
the driver. When the driver pulls this pin low current flows out
of the pin and into the driver. This current, which may be as
large as 350

A when external circuit and process variables

are at their extremes, is required to insure that point "A"
achieves the proper potential to disable the output. The
driver must have the compliance and capability of sinking all
of this current.

When V

is +5V the DISABLE pin may be driven with a

dedicated TTL gate. The maximum low level output voltage
of the TTL gate, 0.4V, has enough compliance to insure that
the amplifier will always be disabled even though D

will not

turn on, and the TTL gate will sink enough current to keep
point "A" at its proper voltage. When V

is greater than +5V

the DISABLE pin should be driven with an open collector
device that has a breakdown rating greater than V

GAIN (A

)

(

)

BANDWIDTH

(MHz)

-1

750

100

1000

125

681

1000

+10

383

-10

750

OUT

FIGURE 6. PLACEMENT OF THE OUTPUT ISOLATION

RESISTOR, R

15K

ENABLE/

P18

DISABLE INPUT

FIGURE 7. SIMPLIFIED SCHEMATIC OF ENABLE/DISABLE

FUNCTION

HA-5020

Referring to Figure 7, it can be seen that R

will act as a pull-up

resistor to +V

if the DISABLE pin is left open. In those cases

where the enable/disable function is not required on all circuits
some circuits can be permanently enabled by letting the
DISABLE pin float. If a driver is used to set the enable/disable
level, be sure that the driver does not sink more than 20

when the DISABLE pin is at a high level. TTL gates, especially
CMOS versions, do not violate this criteria so it is permissible to
control the enable/disable function with TTL.

Typical Applications

Two Channel Video Multiplexer

Referring to the amplifier U

in Figure 8, R

terminates the

cable in its characteristic impedance of 75

, and R

back

terminates the cable in its characteristic impedance. The
amplifier is set up in a gain configuration of +2 to yield an
overall network gain of +1 when driving a double terminated
cable. The value of R

can be changed if a different network

gain is desired. R

holds the disable pin at ground thus

inhibiting the amplifier until the switch, S

, is thrown to

position 1. At position 1 the switch pulls the disable pin up to
the plus supply rail thereby enabling the amplifier. Since all
of the actual signal switching takes place within the amplifier,
it's differential gain and phase parameters, which are 0.03%
and 0.03 degrees respectively, determine the circuit's
performance. The other circuit, U

, operates in a similar

manner.

When the plus supply rail is 5V the disable pin can be driven
by a dedicated TTL gate as discussed earlier. If a multiplexer
IC or its equivalent is used to select channels its logic must be
break before make. When these conditions are satisfied the
HA-5020 is often used as a remote video multiplexer, and the
multiplexer may be extended by adding more amplifier ICs.

Low Impedance Multiplexer

Two common problems surface when you try to multiplex
multiple high speed signals into a low impedance source

such as an A/D converter. The first problem is the low source
impedance which tends to make amplifiers oscillate and
causes gain errors. The second problem is the multiplexer
which supplies no gain, introduces all kinds of distortion and
limits the frequency response. Using op amps which have an
enable/disable function, such as the HA-5020, eliminates the
multiplexer problems because the external mux chip is not
needed, and the HA-5020 can drive low impedance (large
capacitance) loads if a series isolation resistor is used.

Referring to Figure 9, both inputs are terminated in their
characteristic impedance; 75

is typical for video

applications. Since the drivers usually are terminated in their
characteristic impedance the input gain is 0.5, thus the
amplifiers, U

, are configured in a gain of +2 to set the circuit

gain equal to one. Resistors R

and R

determine the

amplifier gain, and if a different gain is desired R

should be

changed according to the equation G = (1 + R

). R

sets

the frequency response of the amplifier so you should refer
to the manufacturers data sheet before changing its value.
R

, C

and D

are an asymmetrical charge/discharge time

circuit which configures U

as a break before make switch to

prevent both amplifiers from being active simultaneously. If
this design is extended to more channels the drive logic
must be designed to be break before make. R

is enclosed

in the feedback loop of the amplifier so that the large open
loop amplifier gain of U

will present the load with a small

closed loop output impedance while keeping the amplifier
stable for all values of load capacitance.

The circuit shown in Figure 9 was tested for the full range of
capacitor values with no oscillations being observed; thus,
problem one has been solved. The frequency and gain
characteristics of the circuit are now those of the amplifier
and independent of any multiplexing action; thus, problem
two has been solved. The multiplexer transition time is
approximately 15

s with the component values shown.

NOTES:
21. U

is HA-5020.

22. All resistors in

23. S

is break before make.

24. Use ground plane.

VIDEO INPUT #1

VIDEO INPUT #2

681

2000

681

+5V IN

+5V

0.1

-5V IN

-5V

0.1

100

VIDEO OUTPUT

TO 75

LOAD

+5V

ALL

OFF

FIGURE 8. TWO CHANNEL HIGH IMPEDANCE MULTIPLEXER

HA-5020

FIGURE 8. LOW IMPEDANCE MULTIPLEXER

INPUT B

-5V

+5V

INHIBIT

CHANNEL

SWITCH

INPUT A

1N4148

100K

2000

0.047

2000

1N4148

681

0.01

681

0.01

OUTPUT

0.047

NOTES:
25. U

: HA-5020.

26. U

: CD4011.

Typical Performance Curves

SUPPLY

15V, A

= +1, R

= 1k

= 400

= 25

C, Unless Otherwise Specified

FIGURE 9. INPUT NOISE vs FREQUENCY (AVERAGE OF 18

UNITS FROM 3 LOTS)

FIGURE 10. INPUT OFFSET VOLTAGE vs TEMPERATURE

(ABSOLUTE VALUE AVERAGE OF 30 UNITS
FROM 3 LOTS)

FIGURE 11. +INPUT BIAS CURRENT vs TEMPERATURE

(AVERAGE OF 30 UNITS FROM 3 LOTS)

FIGURE 12. -INPUT BIAS CURRENT vs TEMPERATURE

(ABSOLUTE VALUE AVERAGE OF 30 UNITS
FROM 3 LOTS)

FREQUENCY (Hz)

100

10K

100K

100

T N

OISE VOL

T
AGE (

)

T N

OIS

CUR

(
p

)

= +10

-INPUT NOISE CURRENT

INPUT NOISE VOLTAGE

+INPUT NOISE CURRENT

TEMPERATURE (

-60

-40

-20

100

120

140

OFFSET VO

L
T
A

(mV

)

2.5

2.0

1.5

1.0

0.5

0.0

SUPPLY

15V

SUPPLY

4.5V

SUPPLY

10V

TEMPERATURE (

-60

-40

-20

100

120

140

-0.5

-1.0

-1.5

-2.0

-2.5

SUPPLY

15V

SUPPLY

4.5V

SUPPLY

10V

I
AS CURRENT

(

TEMPERATURE (

-60

-40

-20

100

120

140

I
AS CURR

(

2.0

1.8

1.6

1.4

1.2

1.0

SUPPLY

15V

SUPPLY

4.5V

SUPPLY

10V

HA-5020

FIGURE 13. TRANSIMPEDANCE vs TEMPERATURE (AVERAGE

OF 30 UNITS FROM 3 LOTS)

FIGURE 14. SUPPLY CURRENT vs SUPPLY VOLTAGE

(AVERAGE OF 30 UNITS FROM 3 LOTS)

FIGURE 15. DISABLE SUPPLY CURRENT vs SUPPLY VOLTAGE

(AVERAGE OF 30 UNITS FROM 3 LOTS)

FIGURE 16. SUPPLY CURRENT vs DISABLE INPUT VOLTAGE

FIGURE 17. DISABLE MODE FEEDTHROUGH vs FREQUENCY

FIGURE 18. DISABLED OUTPUT LEAKAGE vs TEMPERATURE

(AVERAGE OF 30 UNITS FROM 3 LOTS)

Typical Performance Curves

SUPPLY

15V, A

= +1, R

= 1k

= 400

= 25

C, Unless Otherwise Specified (Con-

TEMPERATURE (

-60

-40

-20

100

120

140

IN (

)

SUPPLY

15V

SUPPLY

4.5V

SUPPLY

10V

SUPPLY VOLTAGE (

SUPP

L
Y

CURRENT (

125

-55

SUPPLY VOLTAGE (

SUPPL

Y CURRENT

(mA)

125

-55

DISABLE = 0V

DISABLE INPUT VOLTAGE (V)

PPL

Y CUR

(mA)

SUPPLY

15V

SUPPLY

4.5V

SUPPLY

10V

-10

-20

-30

-40

-50

-60

-70

-80

FEEDTHROUGH (dB)

FREQUENCY (MHz)

DISABLE = 0V
V

= 5V

P-P

= 750

TEMPERATURE (

-60

-40

-20

100

120

140

OUT

UT L

AKA

CUR

(

1.0

0.5

-0.5

-1.0

OUT

= +10V

OUT

= -10V

HA-5020

FIGURE 19. ENABLE/DISABLE TIME vs OUTPUT VOLTAGE

(AVERAGE OF 9 UNITS FROM 3 LOTS)

FIGURE 20. NON-INVERTING GAIN vs FREQUENCY

FIGURE 21. INVERTING FREQUENCY RESPONSE

FIGURE 22. PHASE vs FREQUENCY

FIGURE 23. BANDWIDTH AND GAIN PEAKING vs LOAD

RESISTANCE

FIGURE 24. BANDWIDTH AND GAIN PEAKING vs FEEDBACK

RESISTANCE

Typical Performance Curves

SUPPLY

15V, A

= +1, R

= 1k

= 400

= 25

C, Unless Otherwise Specified (Con-

OUTPUT VOLTAGE (V)

-10

-8

-6

-4

-2

ABLE TIME

(

2.0

1.6

1.2

0.8

0.4

0.0

1.8

1.4

1.0

0.6

0.2

DISABLE TIME

(

ENABLE TIME

DISABLE TIME

FREQUENCY (MHz)

120

-7

-6

-5

-4

-3

-2

-1

NORMALIZED GAIN

(dB)

OUT

= 0.2V

P-P

= 10pF

= +1

= +2

= +6

= +10

FREQUENCY (MHz)

120

-7

-6

-5

-4

-3

-2

-1

NORMALIZED GAIN

(dB)

OUT

= 0.2V

P-P

= 10pF

= -1

= -2

= -6

= -10

= 750

-8

FREQUENCY (MHz)

120

-225

-180

-135

-90

-45

+45

= -1

= -2

= -6

= -10

-270

-135

-90

-45

+45

+90

+135

+180

-180

INV

RTIN

G PHA

SE (

EGR

EES

)

N-

I
N

VER

TING PH

SE (D

EGR

EES)

= +1

= +2

= +6

= +10

LOAD RESISTANCE (

)

-3

BANDWIDTH (MHz

)

GAIN PE

AKI

G (d

200

400

600

800

1000

100

110

GAIN PEAKING

-3dB BANDWIDTH

= 10pF

OUT

= 0.2V

P-P

FEEDBACK RESISTOR (

)

700

900

1.1K

1.3K

1.5K

100

105

-3

BAND

I
DTH

(
M

z
)

GAIN PEAKING (dB)

GAIN PEAKING

-3dB BANDWIDTH

= 10pF

OUT

= 0.2V

P-P

HA-5020

FIGURE 25. BANDWIDTH AND GAIN PEAKING vs FEEDBACK

RESISTANCE

FIGURE 26. BANDWIDTH vs FEEDBACK RESISTANCE

FIGURE 27. REJECTION RATIOS vs TEMPERATURE

(AVERAGE OF 30 UNITS FROM 3 LOTS)

FIGURE 28. REJECTION RATIOS vs FREQUENCY

FIGURE 29. OUTPUT SWING OVERHEAD vs TEMPERATURE

(AVERAGE OF 30 UNITS FROM 3 LOTS)

FIGURE 30. OUTPUT VOLTAGE SWING vs LOAD RESISTANCE

Typical Performance Curves

SUPPLY

15V, A

= +1, R

= 1k

= 400

= 25

C, Unless Otherwise Specified (Con-

FEEDBACK RESISTOR (

)

400

600

800

1.0K

1.2K

100

-3dB BA

NDWIDTH

(MHz)

GAIN PEAKING

-3dB BANDWIDTH

= 10pF, A

= +2

OUT

= 0.2V

P-P

GAIN PE

AKI

G (d

FEEDBACK RESISTOR (

)

200

400

600

800

1000

-3dB B

ANDWIDTH

(MHz)

GAIN PEAKING = 0dB

= 10pF, A

= +10

OUT

= 0.2V

P-P

TEMPERATURE (

-60

-40

-20

100

120

140

JECT

ION RA

TIO (dB)

PSRR

CMRR

FREQUENCY (Hz)

10K

100K

10M

JECT

ION RA

TIO (dB)

-50

-60

-70

-80

-90

+PSRR

CMRR

-40

-30

-20

-10

-PSRR

= +10

TEMPERATURE (

OUTPUT

ING OVERHE

AD (

1.5

2.0

2.5

3.0

3.5

-20

-40

-60

100

120

140

SUPPLY

15V

SUPPLY

4.5V

SUPPLY

10V

(

SUPPLY

) - (

OUT

)

LOAD RESISTANCE (

)

OUT

UT VOL

T
A

GE SWING (V

P-P

)

10K

100

SUPPLY

15V

SUPPLY

4.5V

SUPPLY

10V

HA-5020

FIGURE 31. SHORT CIRCUIT CURRENT LIMIT vs TEMPERATURE

FIGURE 32. PROPAGATION DELAY vs TEMPERATURE

(AVERAGE OF 18 UNITS FROM 3 LOTS)

FIGURE 33. PROPAGATION DELAY vs SUPPLY VOLTAGE

(AVERAGE OF 18 UNITS FROM 3 LOTS)

FIGURE 34. SMALL SIGNAL OVERSHOOT vs LOAD

RESISTANCE

FIGURE 35. DISTORTION vs FREQUENCY

FIGURE 36. DIFFERENTIAL GAIN vs SUPPLY VOLTAGE

(AVERAGE OF 18 UNITS FROM 3 LOTS)

Typical Performance Curves

SUPPLY

15V, A

= +1, R

= 1k

= 400

= 25

C, Unless Otherwise Specified (Con-

TEMPERATURE (

-60

-40

-20

100

120

140

100

SHORT

CIR

CUIT

CURRENT (m

-ISC

+ISC

TEMPERATURE (

-60

-40

-20

100

120

140

ION DE

Y (ns)

7.0

6.5

6.0

5.5

5.0

LOAD

= 100

OUT

= 1V

P-P

SUPPLY VOLTAGE (

5.0

6.0

7.0

8.0

9.0

10.0

11.0

PROP

AGA

ION DE

(ns)

= +10

= 383

)

LOAD

= 100

OUT

= 1V

P-P

= +2

= +1

LOAD RESISTANCE (

)

OVER

OOT (%)

1000

800

600

400

200

OUT

= 100mV

P-P

, C

= 10pF

SUPPLY

15V

SUPPLY

= +2

= +1

= +2

FREQUENCY (Hz)

10M

DIS

ORTI

(dBc)

-50

-60

-70

-80

-90

HD2

= 2V

P-P

= 30pF

HD3

HD3 (GEN)

HD2 (GEN)

ORDER IMD

(GENERATOR)

SUPPLY VOLTAGE (

FFEREN

IAL GAI

)

0.01

0.02

0.03

0.04

0.05

0.06

0.07

LOAD

= 1K

LOAD

= 150

LOAD

= 75

FREQUENCY = 3.58MHz

HA-5020

FIGURE 37. DIFFERENTIAL PHASE vs SUPPLY VOLTAGE

(AVERAGE OF 18 UNITS FROM 3 LOTS)

FIGURE 38. SLEW RATE vs TEMPERATURE

(AVERAGE OF 30 UNITS FROM 3 LOTS)

Typical Performance Curves

SUPPLY

5V, A

= +1, R

= 1k

= 400

= 25

C, Unless Otherwise Specified

FIGURE 39. NON-INVERTING FREQUENCY RESPONSE

FIGURE 40. INVERTING FREQUENCY RESPONSE

FIGURE 41. PHASE RESPONSE AS A FUNCTION OF

FREQUENCY

FIGURE 42. BANDWIDTH AND GAIN PEAKING vs FEEDBACK

RESISTANCE

Typical Performance Curves

SUPPLY

15V, A

= +1, R

= 1k

= 400

= 25

C, Unless Otherwise Specified (Con-

SUPPLY VOLTAGE (

I
FFERENTIAL

PHASE

(
D

REE

)

0.01

0.02

0.03

0.04

0.05

0.06

0.07

LOAD

= 1K

LOAD

= 150

LOAD

= 75

FREQUENCY = 3.58MHz

1200

1000

800

600

-60

SLE

(

-40

-20

100 120 140

SLEW RATE

OUT

= 20V

P-P

TEMPERATURE (

-1

-2

-3

-4

-5

100

200

FREQUENCY (MHz)

NORMALIZE

GAIN (dB

)

+ 2

+ 10

+ 1

-1

-2

-3

-4

-5

100

200

FREQUENCY (MHz)

NORMA

IZED GAIN (dB)

= -1

= -2

= -10

-1

-2

-3

-4

-5

100

200

FREQUENCY (MHz)

+ 1

- 1

- 10

+ 10

I
N

G PHASE (DE

REES

)

180

135

-45

-90

-135

-180

NON-INV

RTING P

(DEGRE

ES)

FEEDBACK RESISTOR (

)

500

700

900

1100

1300

1500

140

130

120

-3dB BAN

DWIDTH

(MHz)

ING

(

OUT

= 0.2V

P-P

= 10pF

-3dB BANDWIDTH

GAIN PEAKING

= +1

HA-5020

FIGURE 43. BANDWIDTH AND GAIN PEAKING vs FEEDBACK

RESISTANCE

FIGURE 44. BANDWIDTH AND GAIN PEAKING vs LOAD

RESISTANCE

FIGURE 45. BANDWIDTH vs FEEDBACK RESISTANCE

FIGURE 46. REJECTION RATIOS vs FREQUENCY

FIGURE 47. PROPAGATION DELAY vs TEMPERATURE

FIGURE 48. SLEW RATE vs TEMPERATURE

Typical Performance Curves

SUPPLY

5V, A

= +1, R

= 1k

= 400

= 25

C, Unless Otherwise Specified

(Continued)

FEEDBACK RESISTOR (

)

-3dB BANDWIDT

(MHz)

GAIN P

AKING (dB)

100

350

500

650

800

950

1100

-3dB BANDWIDTH

GAIN PEAKING

OUT

= 0.2V

P-P

= 10pF

= +2

LOAD RESISTOR (

)

-3dB BANDWIDT

(MHz)

GAIN PE

AKI

G (d

130

120

110

100

200

400

600

800

1000

OUT

= 0.2V

P-P

= 10pF

-3dB BANDWIDTH

GAIN PEAKING

= +1

200

350

500

650

800

950

-3dB BANDWIDT

(MHz)

FEEDBACK RESISTOR (

)

OUT

= 0.2V

P-P

= 10pF

= +10

FREQUENCY (MHz)

-10

-20

-30

-40

-50

-60

-70

-80

REJE

ION RA

TIO (dB)

0.001

0.01

0.1

= +1

CMRR

POSITIVE PSRR

NEGATIVE PSRR

TEMPERATURE (

-50

-25

100

125

8.0

7.5

7.0

6.5

6.0

PROP

AGA

ION DELA

(
n

s
)

= 100

OUT

= 1.0V

P-P

= +1

TEMPERATURE (

-50

-25

100

125

500

450

400

350

300

250

200

150

100

SLE

TE (

OUT

= 2V

P-P

+ SLEW RATE

- SLEW RATE

HA-5020

FIGURE 49. NON-INVERTING GAIN FLATNESS vs FREQUENCY

FIGURE 50. INVERTING GAIN FLATNESS vs FREQUENCY

FIGURE 51. INPUT NOISE CHARACTERISTICS

FIGURE 52. REJECTION RATIO vs TEMPERATURE

FIGURE 53. OUTPUT SWING vs TEMPERATURE

FIGURE 54. ENABLE/DISABLE TIME vs OUTPUT VOLTAGE

Typical Performance Curves

SUPPLY

5V, A

= +1, R

= 1k

= 400

= 25

C, Unless Otherwise Specified

(Continued)

FREQUENCY (MHz)

0.8

0.6

0.4

0.2

-0.2

-0.4

-0.6

-0.8

-1.0

-1.2

NORMALIZE

GAIN

(
d

OUT

= 0.2V

P-P

= 10pF

= +2, R

= 681

= +5, R

= 1k

= +1, R

= 1k

= 10, R

= 383

0.8

0.6

0.4

0.2

-0.2

-0.4

-0.6

-0.8

-1.0

-1.2

NORMALIZE

GAIN (dB

)

FREQUENCY (MHz)

= -1

= -2

= -5

= -10

OUT

= 0.2V

P-P

= 10pF

= 750

FREQUENCY (kHz)

0.01

0.1

100

L
T
AGE NOI

SE (nV/

)

CURR

NOISE

(pA/

)

100

1000

800

600

400

200

= 10, R

= 383

-INPUT NOISE CURRENT

+INPUT NOISE CURRENT

+INPUT NOISE VOLTAGE

-100

-50

100

150

+PSRR

-PSRR

CMRR

200

250

TEMPERATURE (

REJECTION RA

TIO (dB

)

4.0

3.8

3.6

-60

-40

-20

100

120

140

TEMPERATURE (

OUT

ING

)

DISABLE

ENABLE

DISABLE

ENAB

LE TIME

(ns)

OUTPUT VOLTAGE (V)

-2.5 -2.0 -1.5 -1.0 -0.5

0.5

1.0

1.5

2.0

2.5

I
SABLE TIME

(

HA-5020

FIGURE 55. DISABLE FEEDTHROUGH vs FREQUENCY

FIGURE 56. TRANSIMPEDANCE vs FREQUENCY

FIGURE 57. TRANSIMPEDENCE vs FREQUENCY

Typical Performance Curves

SUPPLY

5V, A

= +1, R

= 1k

= 400

= 25

C, Unless Otherwise Specified

(Continued)

-20

-40

-50

-60

-70

-80

0.1

EDTH

ROUGH (dB

)

FREQUENCY (MHz)

-30

-10

DISABLE = 0V

= 5V

P-P

= 750

-135

-90

-45

135

180

0.1

0.01

0.001

0.01

0.1

100

PHASE ANGLE (DEG

REES

)

TRANSIMP

DANCE (M

)

= 100

FREQUENCY (MHz)

-135

-90

-45

135

180

0.1

0.01

0.001

0.01

0.1

100

PHAS

E ANGL

(

REE

)

= 400

FREQUENCY (MHz)

TRAN

I
MP

EDANCE (M

)

HA-5020

HA-5020

Dual-In-Line Plastic Packages (PDIP)

-B-

INDEX

1 2 3

N/2

AREA

SEATING

BASE

PLANE

-C-

-A-

0.010 (0.25)

C A

B S

NOTES:

1. Controlling Dimensions: INCH. In case of conflict between

English and Metric dimensions, the inch dimensions control.

2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Symbols are defined in the "MO Series Symbol List" in Section

2.2 of Publication No. 95.

4. Dimensions A, A1 and L are measured with the package seated

in JEDEC seating plane gauge GS-3.

5. D, D1, and E1 dimensions do not include mold flash or protru-

sions. Mold flash or protrusions shall not exceed 0.010 inch
(0.25mm).

6. E and

are measured with the leads constrained to be per-

pendicular to datum

7. e

and e

are measured at the lead tips with the leads uncon-

strained. e

must be zero or greater.

8. B1 maximum dimensions do not include dambar protrusions.

Dambar protrusions shall not exceed 0.010 inch (0.25mm).

9. N is the maximum number of terminal positions.

10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3,

E28.3, E42.6 will have a B1 dimension of 0.030 - 0.045 inch
(0.76 - 1.14mm).

-C-

E8.3

(JEDEC MS-001-BA ISSUE D)

8 LEAD DUAL-IN-LINE PLASTIC PACKAGE

SYMBOL

INCHES

MILLIMETERS

NOTES

MIN

MAX

MIN

MAX

0.210

5.33

0.015

0.39

0.115

0.195

2.93

4.95

0.014

0.022

0.356

0.558

0.045

0.070

1.15

1.77

8, 10

0.008

0.014

0.204

0.355

0.400

9.01

10.16

0.005

0.13

0.300

0.325

7.62

8.25

0.240

0.280

6.10

7.11

0.100 BSC

2.54 BSC

0.300 BSC

7.62 BSC

0.430

10.92

0.115

0.150

2.93

3.81

Rev. 0 12/93

All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.

Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality

Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

For information regarding Intersil Corporation and its products, see www.intersil.com

HA-5020

Small Outline Plastic Packages (SOIC)

INDEX

AREA

-B-

0.25(0.010)

C A

B S

-A-

-C-

SEATING PLANE

0.10(0.004)

h x 45

0.25(0.010)

NOTES:

1. Symbols are defined in the "MO Series Symbol List" in Section 2.2 of

Publication Number 95.

2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension "D" does not include mold flash, protrusions or gate burrs.

Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.

4. Dimension "E" does not include interlead flash or protrusions. Inter-

lead flash and protrusions shall not exceed 0.25mm (0.010 inch) per
side.

5. The chamfer on the body is optional. If it is not present, a visual index

feature must be located within the crosshatched area.

6. "L" is the length of terminal for soldering to a substrate.
7. "N" is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width "B", as measured 0.36mm (0.014 inch) or greater

above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch).

10. Controlling dimension: MILLIMETER. Converted inch dimensions

are not necessarily exact.

M8.15

(JEDEC MS-012-AA ISSUE C)

8 LEAD NARROW BODY SMALL OUTLINE PLASTIC
PACKAGE

SYMBOL

INCHES

MILLIMETERS

NOTES

MIN

MAX

MIN

MAX

0.0532

0.0688

1.35

1.75

0.0040

0.0098

0.10

0.25

0.013

0.020

0.33

0.51

0.0075

0.0098

0.19

0.25

0.1890

0.1968

4.80

5.00

0.1497

0.1574

3.80

4.00

0.050 BSC

1.27 BSC

0.2284

0.2440

5.80

6.20

0.0099

0.0196

0.25

0.50

0.016

0.050

0.40

1.27

Rev. 0 12/93

Ð­Ð»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: HA9P5020-5X96

ÐÐ»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: HA9P5020-5X96