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Электронный компонент: HC4P5509A1-5

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CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2002. All Rights Reserved
,
8-131
Description
The HC-5509A1 telephone Subscriber Line Interface Circuit
integrates most of the BORSCHT functions on a monolithic
IC. The device is manufactured in a Dielectric Isolation (DI)
process and is designed for use as a high voltage interface
between the traditional telephone subscriber pair (Tip and
Ring) and the low voltage filtering and coding/decoding func-
tions of the line card. Together with a secondary protection
diode bridge and "feed" resistors, the device will withstand
1000V lightning induced surges, in plastic packages. The
SLIC also maintains specified transmission performance in
the presence of externally induced longitudinal currents. The
BORSCHT functions that the SLIC provides are:
Battery Feed with Subscriber Loop Current Limiting
Overvoltage Protection
Ring Relay Driver
Supervisory Signaling Functions
Hybrid Functions (with External Op-Amp)
Test (or Battery Reversal) Relay Driver
In addition, the SLIC provides selective denial of power to
subscriber loops, a programmable subscriber loop current
limit from 20 to 60mA, a thermal shutdown with an alarm out-
put and line fault protection. Switch hook detection, ring trip
detection and ground key detection functions are also incor-
porated in the SLIC device.
The HC-5509A1 SLIC is ideally suited for line card designs
in PBX and CO systems, replacing traditional transformer
solutions.
Features
DI Monolithic High Voltage Process
Compatible with Worldwide PBX and CO Performance
Requirements
Controlled Supply of Battery Feed Current with Programmable
Current Limit
Operates with 5V Positive Supply (V
B+
)
Internal Ring Relay Driver and a Utility Relay Driver
High Impedance Mode for Subscriber Loop
High Temperature Alarm Output
Low Power Consumption During Standby Functions
Switch Hook, Ground Key, and Ring Trip Detection
Selective Power Denial to Subscriber
Voice Path Active During Power Denial
On Chip Op-Amp for 2 Wire Impedance Matching
Applications
Solid State Line Interface Circuit for PBX or Central Office
Systems, Digital Loop Carrier Systems
Hotel/Motel Switching Systems
Direct Inward Dialing (DID) Trunks
Voice Messaging PBX's
High Voltage 2W/4W, 4W/2W Hybrid
Ordering Information
PART NUMBER
TEMP. RANGE
PACKAGE
HC1-5509A1-5
0
o
to +75
o
C
28 Lead Ceramic DIP
HC1-5509A1-9
-40
o
to +85
o
C
28 Lead Ceramic DIP
HC3-5509A1-5
0
o
to +75
o
C
28 Lead Plastic DIP
HC3-5509A1-9
-40
o
to +85
o
C
28 Lead Plastic DIP
HC4P5509A1-5
0
o
to +75
o
C
44 Lead PLCC
HC4P5509A1-9
-40
o
to +85
o
C
44 Lead PLCC
HC9P5509A1-5
0
o
to +75
o
C
28 Lead SOIC
PRELIMINARY
May 1997
Pinouts
HC-5509A1 (PDIP, CDIP, SOIC)
TOP VIEW
C2
RF
TF
VFB
VTX
LAO
VRX
RFS
RING
VB-
BG
28
27
26
24
23
22
21
20
19
18
17
16
15
25
PR
RD
PRI
VB+
1
2
3
4
5
6
7
8
9
10
11
12
13
14
AG
RS
ILMT
OUT 1
-IN 1
TIP
F0
C1
F1
SHD
GKD
TST
ALM
TRUTH TABLE
F1
F0
ACTION
0
0
Normal Loop Feed
0
1
RD Active
1
0
Power Down Latch
RESET
1
0
Power on RESET
1
1
Loop Power
Denial Active
HC-5509A1 (PLCC)
TOP VIEW
15
14
13
12
11
10
9
8
7
17
16
N/C
F1
F0
ALM
N/C
N/C
RS
SHD
N/C
C1
VB
+
AG
C2
VB
-
RF
2
RF
1
TF1
X
GKD
IL
M
T
OU
T
1
-I
N
1
TI
P
RI
NG
RF
S
VR
X
N/C
1
2
3
4
5
6
40
41
42
43
44
18 19 20 21 22 23 24 25 26 27 28
31
32
33
34
35
36
37
38
39
29
30
TF2
VFB
RD
DG
VTX
LAO
N/C
N/C
BG
PR
PRI
TST
N/C
N/C
N/C
N/C
N/C
N/C
HC-5509A1
SLIC
Subscriber Line Interface Circuit
File Number
3567.1
NOT
REC
OMM
END
ED F
OR N
EW D
ESIG
NS
See
HC5
509A
1R30
60
or co
ntac
t our
Tec
hnic
al Su
ppor
t Cen
ter a
t
1-888
-INTE
RSIL
or w
ww.i
nters
il.com
/tsc
8-132
Specifications HC-5509A1
Absolute Maximum Ratings
(Note 1)
Operating Conditions
Relay Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +15V
Maximum Supply Voltages
(V
B+
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7V
(V
B+
)-(V
B-
). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +75V
Junction Temperature Ceramic . . . . . . . . . . . . . . . . . . . . . . +175
o
C
Junction Temperature Plastic. . . . . . . . . . . . . . . . . . . . . . . . +150
o
C
Lead Temperature (Soldering 10 Sec.) . . . . . . . . . . . . . . . . +300
o
C
Operating Temperature Range
HC-5509A1-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0
o
C to +75
o
C
HC-5509A1-9. . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40
o
C to +85
o
C
Storage Temperature Range . . . . . . . . . . . . . . . . . -65
o
C to +150
o
C
Relay Drivers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5V to +12V
Positive Power Supply (V
B+
) . . . . . . . . . . . . . . . . . . . . . . . . +5V
5%
Negative Power Supply (V
B-
) . . . . . . . . . . . . . . . . . . . . -42V to -58V
Loop Resistance (R
L
) . . . . . . . . . . . . . . . . . 200
to 1750
(Note 2)
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Electrical Specifications
Unless Otherwise Specified, Typical Parameters are at T
A
= +25
o
C, Min-Max Parameters are over
Operating Temperature Range, V
B-
= -48V, V
B+
= +5V, AG = DG = BG = 0V. All A.C. Parameters are
specified at 600
2-Wire terminating impedance.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
A.C. TRANSMISSION PARAMETERS
RX Input Impedance
300Hz to 3.4kHz (Note 3)
-
100
-
k
TX Output Impedance
300Hz to 3.4kHz (Note 3)
-
-
20
4W Input Overload Level
300Hz to 3.4kHz R
L
= 1200
,
600
Reference
+1.5
-
-
V
PEAK
2W Return Loss
Matched for 600
(Note 3)
SRL LO
26
35
-
dB
ERL
30
40
-
dB
SRL HI
30
40
-
dB
2W Longitudinal to Metallic Balance
Off Hook
Per ANSI/IEEE STD 455-1976 (Note 3)
300Hz to 3400Hz
58
63
-
dB
4W Longitudinal Balance
Off Hook
300Hz to 3400Hz (Note 3)
50
55
-
dB
Low Frequency Longitudinal Balance
R.E.A. Test Circuit
-
-
-67
dBmp
I
LINE
= 40mA T
A
= +25
o
C (Note 3)
-
-
23
dBrnC
Longitudinal Current Capability
I
LINE
= 40mA T
A
= +25
o
C (Note 3)
-
-
30
mArms
Insertion Loss
0dBm at 1kHz, Referenced 600
2W/4W
-
0.05
0.2
dB
4W/2W
-
0.05
0.2
dB
4W/4W
-
-
0.12
dB
Frequency Response
300Hz to 3400Hz (Note 3) Referenced to
Absolute Level at 1kHz, 0dBm Referenced
600
-
0.02
0.05
dB
Level Linearity
Referenced to -10dBm (Note 3)
2W to 4W and 4W to 2W
+3 to -40dBm
-
-
0.05
dB
-40 to -50dBm
-
-
0.1
dB
-50 to -55dBm
-
-
0.3
dB
Absolute Delay
(Note 3)
8-133
Specifications HC-5509A1
2W/4W
300Hz to 3400Hz
-
-
1
s
4W/2W
300Hz to 3400Hz
-
-
1
s
4W/4W
300Hz to 3400Hz
-
-
1.5
s
Transhybrid Loss, THL
(Note 3) See Figure 1
-
40
-
dB
Total Harmonic Distortion
2W/4W, 4W/2W, 4W/4W
Reference Level 0dBm at 600
300Hz to 3400Hz (Note 3)
-
-
-52
dB
Idle Channel Noise
(Note 3)
2W and 4W
C-Message
-
-
5
dBrnC
Psophometric
-
-
-85
dBmp
3kHz Flat
-
-
15
dBrn
Power Supply Rejection Ratio
(Note 3)
30Hz to 200Hz, R
L
= 600
V
B+
to 2W
20
29
-
dB
V
B+
to 4W
20
29
-
dB
V
B-
to 2W
20
29
-
dB
V
B-
to 4W
20
29
-
dB
V
B+
to 4W
(Note 3)
200Hz to 16kHz, R
L
= 600
30
-
-
dB
V
B-
to 2W
30
-
-
dB
V
B-
to 4W
20
25
-
dB
V
B-
to 4W
20
25
-
dB
Ring Sync Pulse Width
50
-
500
s
D.C. PARAMETERS
Loop Current Programming
Limit Range
20
40
60
mA
Accuracy
10
-
-
%
Loop Current During Power Denial
R
L
= 200
-
3
5
mA
Fault Currents
TIP to Ground
-
30
-
mA
RING to Ground
-
60
-
mA
TIP and RING to Ground
-
90
-
mA
Switch Hook Detection Threshold
-
12
15
mA
Ground Key Detection Threshold
8
12
16
mA
Thermal ALARM Output
Safe Operating Die Temperature Exceeded
140
-
160
o
C
Ring Trip Comparator Threshold
See Typical Applications for more informa-
tion
9.5
13.5
17.5
mA
Dial Pulse Distortion
-
0.1
0.5
ms
Electrical Specifications
Unless Otherwise Specified, Typical Parameters are at T
A
= +25
o
C, Min-Max Parameters are over
Operating Temperature Range, V
B-
= -48V, V
B+
= +5V, AG = DG = BG = 0V. All A.C. Parameters are
specified at 600
2-Wire terminating impedance. (Continued)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
8-134
Specifications HC-5509A1
Relay Driver Outputs
On Voltage V
OL
I
OL
(PR) = 60mA, I
OL
(RD) = 30mA
-
0.2
0.5
V
Off Leakage Current
V
OH
= 13.2V
-
10
100
A
TTL/CMOS Logic Inputs (F0, F1, RS, TEST,
PRI)
Logic `0' V
IL
-
-
0.8
V
Logic `1' V
IH
2.0
-
5.5
V
Input Current (F0, F1, RS, TEST, PRI)
0V
V
IN
5V
-
-
100
A
Logic Outputs
Logic `0' V
OL
I
LOAD
= 800
A
-
0.1
0.5
V
Logic `1' V
OH
I
LOAD
= 40
A
2.7
-
-
V
Power Dissipation On Hook
Relay Drivers Off
-
200
-
mW
I
B+
V
B+
= +5.25V, V
B-
= -58V, R
LOOP
=
-
-
6
mA
I
B-
V
B+
= +5.25V, V
B
- = -58V, R
LOOP
=
-6
-
-
mA
UNCOMMITED OP AMP PARAMETERS
Input Offset Voltage
-
5
-
mV
Input Offset Current
-
10
-
nA
Differential Input Resistance
(Note 2)
-
1
-
M
Output Voltage Swing
R
L
= 10k
-
3
-
V
P-P
Small Signal GBW
(Note 2)
-
1
-
MHz
NOTES:
1. Absolute maximum ratings are limiting values, applied individually, beyond which the serviceability of the circuit may be impaired. Func-
tional operability under any of these conditions is not necessarily implied.
2. May Be Extended to 1900
With Application Circuit.
3. These parameters are controlled by design or process parameters and are not directly tested. These parameters are characterized upon
initial design release, upon design changes which would affect these characteristics, and at intervals to assure product quality and spec-
ification compliance.
Pin Descriptions
DIP/SOIC
PLCC
SYMBOL
DESCRIPTION
1
2
AG
Analog Ground - To be connected to zero potential. Serves as a reference for the transmit output
and receive input terminals.
2
3
VB+
Positive Voltage Source - Most Positive Supply.
3
4
C1
Capacitor #C1 - An external capacitor to be connected between this terminal and analog ground.
Required for proper operation of the loop current limiting function.
4
8
F1
Function Address #1 - A TTL and CMOS compatible input used with F0 function address line to
externally select logic functions. The three selectable functions are mutually exclusive. See Truth
Table on page1. F1 should be toggled high after power is applied.
Electrical Specifications
Unless Otherwise Specified, Typical Parameters are at T
A
= +25
o
C, Min-Max Parameters are over
Operating Temperature Range, V
B-
= -48V, V
B+
= +5V, AG = DG = BG = 0V. All A.C. Parameters are
specified at 600
2-Wire terminating impedance. (Continued)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
8-135
HC-5509A1
5
9
F0
Function Address #0 - A TTL and CMOS compatible input used with F1 function address line to
externally select logic functions. The three selectable functions are mutually exclusive. See Truth
Table on page 1.
6
10
RS
Ring Synchronization Input - A TTL - compatible clock input. The clock is arranged such that a
positive pulse (50 - 500
s) occurs on the zero crossing of the ring voltage source, as it appears
at the RFS terminal. For Tip side injected systems, the RS pulse should occur on the negative
going zero crossing and for Ring injected systems, on the positive going zero crossing. This en-
sures that the ring delay activates and deactivates when the instantaneous ring voltage is near
zero. If synchronization is not required, the pin should be tied to +5.
7
11
SHD
Switch Hook Detection - An active low LS TTL compatible logic output. A line supervisory output.
8
12
GKD
Ground Key Detection - An active low LS TTL compatible logic output. A line supervisory output.
9
13
TST
A TTL logic input. A low on this pin will set a latch and keep the SLIC in a power down mode until
the proper F1, F0 state is set and will keep ALM low. See Truth Table on page 1.
10
14
ALM
A LS TTL compatible active low output which responds to the thermal detector circuit when a safe
operating die temperature has been exceeded. When TST is forced low by an external control
signal, ALM is latched low until the proper F1, F0 state and TST input is brought high. The ALM
can be tied directly to the TST pin to power down the part when a thermal fault is detected and
then reset with F0, F1. See Truth Table on page 1. It is possible to ignore transient thermal over-
load conditions in the SLIC by delaying the response to the TST pin from the ALM. Care must be
exercised in attempting this as continued thermal overstress may reduced component life.
11
18
ILMT
Loop Current Limit - Voltage on this pin sets the short loop current limiting conditions using a re-
sistive voltage divider.
12
19
OUT1
The analog output of the spare operational amplifier.
13
20
-IN1
The inverting analog input of the spare operational amplifier.
14
22
TIP
An analog input connected to the TIP (more positive) side of the subscriber loop through a feed
resistor and ring relay contact. Functions with the RING terminal to receive voice signals from
the telephone and for loop monitoring purpose.
15
24
RING
An analog input connected to the RING (more negative) side of the subscriber loop through a
feed resistor. Functions with the TIP terminal to receive voice signals from the telephone and for
loop monitoring purposes.
16
25
RFS
Ring Feed Sense - Senses RING side of the loop for Ground Key Detection. During Ring injected
ringing the ring signal at this node is isolated from RF via the ring relay. For Tip injected ringing,
the RF and RFS pins must be shorted.
17
27
VRX
Receive Input, Four Wire Side - A high impedance analog input. AC signals appearing at this in-
put drive the Tip Feed and Ring Feed amplifiers differentially.
18
31
LAO
Longitudinal Amplifier Output - A low impedance output to be connected to C2 through a low pass
filter. Output is proportional to the difference in I
TIP
and I
RING
.
19
32
VTX
Transmit Output, Four Wire Side - A low impedance analog output which represents the differ-
ential voltage across TIP and RING. Transhybrid balancing must be performed beyond this out-
put to completely implement two to four wire conversion. This output is referenced to analog
ground. Since the D.C. level of this output varies with loop current, capacitive coupling to the next
stage is necessary.
20
33
PRI
A TTL compatible input used to control PR. PRI active High = PR active low.
21
34
PR
An active low open collector output. Can be used to drive a Polarity Reversal Relay.
NA
35
DG
Digital Ground - To be connected to zero potential - serves as reference for all digital inputs and
outputs on the SLIC.
22
36
BG
Battery Ground - Tube connected to zero potential. All loop current and some quiescent current
flows into this terminal.
Pin Descriptions (Continued)
DIP/SOIC
PLCC
SYMBOL
DESCRIPTION
8-136
HC-5509A1
23
37
RD
Ring Relay Driver - An active low open collector output. Used to drive a relay that switches ring-
ing signals onto the 2-Wire line.
24
38
VFB
Feedback input to the tip feed amplifier; may be used in conjunction with transmit output signal
and the spare op-amp to accommodate 2W line impedance matching.
25
39
TF2
Tip Feed - A low impedance analog output connected to the TIP terminal through a feed resistor.
Functions with the RF terminal to provide loop current, and to feed voice signals to the telephone
set and to sink longitudinal currents. Must be tied to TF1.
NA
40
TF1
Tie directly to TF2 in the PLCC application.
26
41
RF1
Ring Feed - A low impedance analog output connected to the RING terminal through a feed re-
sistor. Functions with the TF terminal to provide loop current, feed voice signals to the telephone
set, and to sink longitudinal currents. Tie directly to RF2.
NA
42
RF2
Tie directly to RF1 in the PLCC application.
27
43
VB-
The battery voltage source. The most negative supply.
28
44
C2
Capacitor #2 - An external capacitor to be connected between this terminal and ground. It pre-
vents false ring trip detection from occurring when longitudinal currents are induced onto the sub-
scriber loop from power lines and other noise sources. This capacitor should be nonpolarized.
1, 5, 6, 7,
15, 16,
17, 21,
23, 26,
28, 29, 30
NC
No internal connection.
NOTE:
1. All grounds (AG, BG, DG) must be applied before V
B+
or V
B-
. Failure to do so may result in premature failure of the part. If a user wishes
to run separate grounds off a line card, the AG must be applied first.
Pin Descriptions (Continued)
DIP/SOIC
PLCC
SYMBOL
DESCRIPTION
8-137
HC-5509A1
Functional Diagram
DIP OR SOIC
R
2R
C1
VRX
OUT 1
2R
R/2
+
TA
2R
2R
90k
+
LA
25k
25k
17
12
RF1
3
SHD
FAULT
DET
OP AMP
+
VFB
VTX
+
RTD
GKD
GM
28
11
RF2
VB
REF
VB/2
-IN 1
13
24
19
THERM
LTD
18
C2
LAO
ILMT
Die Characteristics
Transistor Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 224
Diode Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Die Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . 174 x 120
Substrate Potential . . . . . . . . . . . . . . . . . . . . . . . Connected
Process . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Bipolar-DI
Thermal Constants (
o
C/W)
JA
JC
Ceramic DIP . . . . . . . . . . . . . . . . . . . .
48
12
Plastic DIP . . . . . . . . . . . . . . . . . . . . . .
51
21
PLCC . . . . . . . . . . . . . . . . . . . . . . . . . .
47
17
SOIC . . . . . . . . . . . . . . . . . . . . . . . . . .
72
22
Overvoltage Protection and Longitudinal
Current Protection
The SLIC device, in conjunction with an external protection
bridge, will withstand high voltage lightning surges and
power line crosses.
High voltage surge conditions are as specified in Table 1.
The SLIC will withstand longitudinal currents up to a maxi-
mum or 30mArms, 15mArms per leg, without any perfor-
mance degradation
.
TABLE 1.
PARAMETER
TEST
CONDITION
PERFORMANCE
(MAX)
UNITS
Longitudinal
Surge
10
s Rise/
1000 (Plastic)
V
PEAK
1000
s Fall
500 (Ceramic)
V
PEAK
Metallic Surge
10
s Rise/
1000 (Plastic)
V
PEAK
1000
s Fall
500 (Ceramic)
V
PEAK
T/GND
10
s Rise/
1000 (Plastic)
V
PEAK
R/GND
1000
s Fall
500 (Ceramic)
V
PEAK
50/60Hz Current
T/GND
11 Cycles
700 (Plastic)
V
RMS
R/GND
Limited to
10Arms
350 (Ceramic)
V
RMS
8-138
HC-5509A1
Functional Diagram (Continued)
PLCC
R
2R
VRX
OUT 1
2R
R/2
+
TA
2R
2R
90k
+
LA
25k
25k
27
19
RF1
4
SHD
FAULT
DET
OP AMP
+
VFB
VTX
+
RTD
GKD
GM
44
18
RF2
VB
REF
VB/2
20
38
32
THERM
LTD
31
-IN 1
C1
C2
LAO
ILMT
8-139
HC-5509A1
Logic Diagram
THERMAL
SHUT DOWN
RMAL
T
WN
CH
KEY
A
B
C
INJ
A
B
C
RELAY
DRIVER
NOTE: PRI is an independent switch driven by TTL input lev-
8-140
HC-5509A1
Applications Diagram
FIGURE 1. TYPICAL LINE CIRCUIT APPLICATION WITH THE MONOLITHIC SLIC
VB-
BG
C2
DG AG VB+ C1
C3
C4
+5V
ILIMIT
VRX+
VFB
VTX
-IN1
OUT1
RL1
CAC
KZ0
FROM PCM
FILTER/CODER
SYSTEM CONTROLLER
PRI RS
F1
F0
SHD GKD
TEST
ALARM
RB3
RING
RB1
K1A
TIP
RS1 CS1
PTC
Z1
PRIMARY
PROTECTION
K2
K1
+5V
+5V
KIB
150V
PEAK
(MAX)
VRING
RS2
CS2
RF2**
RF1**
RFS
RING
TF1**
TF2**
TIP
PR
RD
RB2
VB-
C5
KRF
RL2
*SECONDARY
PROTECTION
TO HYBIRD
BALANCE
NETWORK
***
CF2
RB4
RF2
CF1
LAO
RF1
SLIC
HC-5509A1
TYPICAL COMPONENT VALUES
C1 = 0.5
F, 30V
RF1 = RF2 = 210k
, 1%
CF1 = CF2 = 0.22
F, 10%, 20V Nonpolarized
C3 = 0.01
F, 100V,
20%
C4 = 0.01
F, 100V,
20%
C5 = 0.01
F, 100V,
20%
C
AC
= 0.5
F, 20V
KZ
0
= 60k
, (Z
0
= 600
, K = Scaling Factor = 100)
RL1, RL2; Current Limit Setting Resistors:
RL1 + RL2 > 90k
offset
I
LIMIT
= (0.6) (RL1 + RL2)/(200 x RL2), RL1 typically 100k
KR
F
= 20k
, RF = 2(R
B2
+ R
B4
), K = Scaling Factor = 100)
RB
1
= RB
2
= RB
3
= RB
4
= 50
(1% absolute, matching
requirements covered in a Tech Brief)
R
S1
= R
S2
= 1k
typically
CS1 = CS2 = 0.1
F, 200V typically, depending on V
Ring
and
line length.
Z
1
= 150V to 200V transient protector. PTC used as ring
generator ballast.
* Secondary protection diode bridge recommended is 3A, 200V
type.
**TF1, TF2 and RF1, RF2 are on PLCC only and should be con-
nected together as shown.
***Not Present on DIP or SOIC packages.
NOTES:
1. All grounds (AG, BG, & DG) must be applied before V
B
+ or V
B
-. Failure to do so may result in premature failure of the part. If a user wishes
to run separate grounds off a line card, the AG must be applied first.
2. Application shows Ring Injected Ringing, a Balanced or Tip injected configuration may be used.
Additional information is contained in Application Note 549, "The HC-550X Telephone SLICs" By Geoff Phillips