1
TM
File Number
3653.5
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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Copyright
Intersil Corporation 2000
HFA1135
360MHz, Low Power, Video Operational
Amplifier with Output Limiting
The HFA1135 is a high speed, low power current feedback
amplifier build with Intersil's proprietary complementary
bipolar UHF-1 process. This amplifier features user
programmable output limiting, via the V
H
and V
L
pins.
The HFA1135 is the ideal choice for high speed, low power
applications requiring output limiting (e.g. flash A/D drivers),
especially those requiring fast overdrive recovery times. The
limiting function allows the designer to set the maximum and
minimum output levels to protect downstream stages from
damage or input saturation. The sub-nanosecond overdrive
recovery time ensures a quick return to linear operation
following an overdrive condition.
Component and composite video systems also benefit from
this operational amplifier's performance, as indicated by the
gain flatness, and differential gain and phase specifications.
The HFA1135 is a low power, high performance upgrade for
the CLC501 and CLC502.
Features
User Programmable Output Voltage Limiting
Fast Overdrive Recovery . . . . . . . . . . . . . . . . . . . . . . <1ns
Low Supply Current . . . . . . . . . . . . . . . . . . . . . . . . 6.8mA
High Input Impedance . . . . . . . . . . . . . . . . . . . . . . . 2M
Wide -3dB Bandwidth. . . . . . . . . . . . . . . . . . . . . . 360MHz
Very Fast Slew Rate . . . . . . . . . . . . . . . . . . . . . . 1200V/
s
Gain Flatness (to 50MHz) . . . . . . . . . . . . . . . . . .
0.07dB
Differential Gain . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.02%
Differential Phase . . . . . . . . . . . . . . . . . . . . 0.04 Degrees
Pin Compatible Upgrade to CLC501 and CLC502
Applications
Flash A/D Drivers
High Resolution Monitors
Professional Video Processing
Video Digitizing Boards/Systems
Multimedia Systems
RGB Preamps
Medical Imaging
Hand Held and Miniaturized RF Equipment
Battery Powered Communications
Pinout
HFA1135
(SOIC)
TOP VIEW
Ordering Information
PART NUMBER
(BRAND)
TEMP.
RANGE (
o
C)
PACKAGE
PKG.
NO.
HFA1135IB
(H1135I)
-40 to 85
8 Ld SOIC
M8.15
HFA1135IB96
(H1135I)
-40 to 85
8 Ld SOIC
Tape and Reel
M8.15
HFA11XXEVAL
DIP Evaluation Board for High Speed
Op Amps
1
2
3
4
8
7
6
5
NC
-IN
+IN
V-
V
H
V+
OUT
V
L
+
-
Data Sheet
June 2000
2
Absolute Maximum Ratings
T
A
= 25
o
C
Thermal Information
Voltage Between V+ and V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11V
DC Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
SUPPLY
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8V
Output Current (Note 1) . . . . . . . . . . . . . . . . .Short Circuit Protected
30mA Continuous
60mA
50% Duty Cycle
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >600V
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . -40
o
C to 85
o
C
Thermal Resistance (Typical, Note 1)
JA
(
o
C/W)
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
165
Maximum Junction Temperature (Die Only) . . . . . . . . . . . . . . . .175
o
C
Maximum Junction Temperature (Plastic Package) . . . . . . . .150
o
C
Maximum Storage Temperature Range . . . . . . . . . . -65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300
o
C
(SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1.
JA
is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications
V
SUPPLY
=
5V, A
V
= +1, R
F
= 510
(Note 3), R
L
= 100
,
Unless Otherwise Specified
PARAMETER
TEST CONDITIONS
(NOTE 2)
TEST
LEVEL
TEMP.
(
o
C)
MIN
TYP
MAX
UNITS
INPUT CHARACTERISTICS
Input Offset Voltage
A
25
-
2
5
mV
A
Full
-
3
8
mV
Average Input Offset Voltage Drift
B
Full
-
1
10
V/
o
C
Input Offset Voltage
Common-Mode Rejection Ratio
V
CM
=
1.8V
A
25
47
50
-
dB
V
CM
=
1.8V
A
85
45
48
-
dB
V
CM
=
1.2V
A
-40
45
48
-
dB
Input Offset Voltage
Power Supply Rejection Ratio
V
PS
=
1.8V
A
25
50
54
-
dB
V
PS
=
1.8V
A
85
47
50
-
dB
V
PS
=
1.2V
A
-40
47
50
-
dB
Non-Inverting Input Bias Current
A
25
-
6
15
A
A
Full
-
10
25
A
Non-Inverting Input Bias Current Drift
B
Full
-
5
60
nA/
o
C
Non-Inverting Input Bias Current
Power Supply Sensitivity
V
PS
=
1.8V
A
25
-
0.5
1
A/V
V
PS
=
1.8V
A
85
-
0.8
3
A/V
V
PS
=
1.2V
A
-40
-
0.8
3
A/V
Non-Inverting Input Resistance
V
CM
=
1.8V
A
25
0.8
2
-
M
V
CM
=
1.8V
A
85
0.5
1.3
-
M
V
CM
=
1.2V
A
-40
0.5
1.3
-
M
Inverting Input Bias Current
A
25
-
0.1
4
A
A
Full
-
3
8
A
Inverting Input Bias Current Drift
B
Full
-
60
200
nA/
o
C
Inverting Input Bias Current
Common-Mode Sensitivity
V
CM
=
1.8V
A
25
-
3
6
A/V
V
CM
=
1.8V
A
85
-
4
8
A/V
V
CM
=
1.2V
A
-40
-
4
8
A/V
Inverting Input Bias Current
Power Supply Sensitivity
V
PS
=
1.8V
A
25
-
2
5
A/V
V
PS
=
1.8V
A
85
-
4
8
A/V
V
PS
=
1.2V
A
-40
-
4
8
A/V
Inverting Input Resistance
C
25
-
40
-
Input Capacitance (Either Input)
C
25
-
1.6
-
pF
HFA1135
3
Input Voltage Common Mode Range (Implied by
V
IO
CMRR, +R
IN
, and -I
BIAS
CMS tests)
A
25, 85
1.8
2.4
-
V
A
-40
1.2
1.7
-
V
Input Noise Voltage Density (Note 5)
f = 100kHz
B
25
-
3.5
-
nV/
Hz
Non-Inverting Input Noise Current Density (Note 5)
f = 100kHz
B
25
-
2.5
-
pA/
Hz
Inverting Input Noise Current Density (Note 5)
f = 100kHz
B
25
-
20
-
pA/
Hz
TRANSFER CHARACTERISTICS
Open Loop Transimpedance Gain (Note 5)
A
V
= -1
C
25
-
500
-
k
AC CHARACTERISTICS
A
V
= +2, R
F
= 250
, Unless Otherwise Specified
-3dB Bandwidth
(V
OUT
= 0.2V
P-P
, Note 5)
A
V
= +1, R
F
= 1.5k
B
25
-
660
-
MHz
A
V
= +2, R
F
= 250
B
25
-
360
-
MHz
A
V
= +2, R
F
= 330
B
25
-
315
-
MHz
A
V
= -1, R
F
= 330
B
25
-
290
-
MHz
Full Power Bandwidth
(V
OUT
= 5V
P-P
at A
V
= +2/-1,
4V
P-P
at A
V
= +1, Note 5)
A
V
= +1, R
F
= 1.5k
B
25
-
90
-
MHz
A
V
= +2, R
F
= 250
B
25
-
130
-
MHz
A
V
= -1, R
F
= 330
B
25
-
170
-
MHz
Gain Flatness
(to 25MHz, V
OUT
= 0.2V
P-P
, Note 5)
A
V
= +1, R
F
= 1.5k
B
25
-
0.10
-
dB
A
V
= +2, R
F
= 250
B
25
-
0.02
-
dB
A
V
= +2, R
F
= 330
B
25
-
0.02
-
dB
Gain Flatness
(to 50MHz, V
OUT
= 0.2V
P-P
, Note 5)
A
V
= +1, R
F
= 1.5k
B
25
-
0.22
-
dB
A
V
= +2, R
F
= 250
B
25
-
0.07
-
dB
A
V
= +2, R
F
= 330
B
25
-
0.03
-
dB
Minimum Stable Gain
A
Full
-
1
-
V/V
OUTPUT CHARACTERISTICS
R
F
= 510
, Unless Otherwise Specified
Output Voltage Swing (Note 5)
A
V
= -1, R
L
= 100
A
25
3
3.4
-
V
A
Full
2.8
3
-
V
Output Current (Note 5)
A
V
= -1, R
L
= 50
A
25, 85
50
60
-
mA
A
-40
28
42
-
mA
Output Short Circuit Current
B
25
-
90
-
mA
Closed Loop Output Resistance (Note 5)
DC, A
V
= +2, R
F
= 250
B
25
-
0.07
-
Second Harmonic Distortion
(A
V
= +2, R
F
= 250
, V
OUT
= 2V
P-P
, Note 5)
10MHz
B
25
-
-50
-
dBc
20MHz
B
25
-
-45
-
dBc
Third Harmonic Distortion
(A
V
= +2, R
F
= 250
, V
OUT
= 2V
P-P
, Note 5)
10MHz
B
25
-
-50
-
dBc
20MHz
B
25
-
-45
-
dBc
TRANSIENT CHARACTERISTICS
A
V
= +2, R
F
= 250
,
Unless Otherwise Specified
Rise and Fall Times
(V
OUT
= 0.5V
P-P
, Note 5)
Rise Time
B
25
-
0.81
-
ns
Fall Time
B
25
-
1.25
-
ns
Overshoot (Note 4)
(V
OUT
= 0 to 0.5V, V
IN
t
RISE
= 2.5ns)
+OS
B
25
-
3
-
%
-OS
B
25
-
5
-
%
Overshoot (Note 4)
(V
OUT
= 0.5V
P-P
, V
IN
t
RISE
= 2.5ns)
+OS
B
25
-
2
-
%
-OS
B
25
-
10
-
%
Slew Rate
(V
OUT
= 4V
P-P
, A
V
= +1, R
F
= 1.5k
)
+SR
B
25
-
875
-
V/
s
-SR (Note 6)
B
25
-
510
-
V/
s
Slew Rate
(V
OUT
= 5V
P-P
, A
V
= +2, R
F
= 250
)
+SR
B
25
-
1530
-
V/
s
-SR (Note 6)
B
25
-
850
-
V/
s
Electrical Specifications
V
SUPPLY
=
5V, A
V
= +1, R
F
= 510
(Note 3), R
L
= 100
,
Unless Otherwise Specified (Continued)
PARAMETER
TEST CONDITIONS
(NOTE 2)
TEST
LEVEL
TEMP.
(
o
C)
MIN
TYP
MAX
UNITS
HFA1135
4
Application Information
Relevant Application Notes
The following Application Notes pertain to the HFA1135:
AN9653-Use and Application of Output Limiting
Amplifiers
AN9752-Sync Stripper and Sync Inserter for
Composite Video
AN9787-An Intuitive Approach to Understanding
Current Feedback Amplifiers
AN9420-Current Feedback Amplifier Theory and
Applications
AN9663-Converting from Voltage Feedback to Current
Feedback Amplifiers
These publications may be obtained from Intersil's web site
(www.intersil.com) or via our AnswerFAX system.
Optimum Feedback Resistor
Although a current feedback amplifier's bandwidth
dependency on closed loop gain isn't as severe as that of a
voltage feedback amplifier, there can be an appreciable
decrease in bandwidth at higher gains. This decrease may
be minimized by taking advantage of the current feedback
amplifier's unique relationship between bandwidth and R
F
.
All current feedback amplifiers require a feedback resistor,
even for unity gain applications, and R
F
, in conjunction with
the internal compensation capacitor, sets the dominant pole
of the frequency response. Thus, the amplifier's bandwidth is
inversely proportional to R
F
. The HFA1135 design is
optimized for a 250
R
F
at a gain of +2. Decreasing R
F
decreases stability, resulting in excessive peaking and
overshoot (Note: Capacitive feedback will cause the same
Slew Rate
(V
OUT
= 5V
P-P
, A
V
= -1, R
F
= 330
)
+SR
B
25
-
2300
-
V/
s
-SR (Note 6)
B
25
-
1200
-
V/
s
Settling Time
(V
OUT
= +2V to 0V step, Note 5)
To 0.1%
B
25
-
23
-
ns
To 0.05%
B
25
-
33
-
ns
To 0.02%
B
25
-
45
-
ns
VIDEO CHARACTERISTICS
A
V
= +2, R
F
= 250
,
Unless Otherwise Specified
Differential Gain (f = 3.58MHz)
R
L
= 150
B
25
-
0.02
-
%
R
L
= 75
B
25
-
0.03
-
%
Differential Phase (f = 3.58MHz)
R
L
= 150
B
25
-
0.04
-
Degrees
R
L
= 75
B
25
-
0.06
-
Degrees
OUTPUT LIMITING CHARACTERISTICS
A
V
= +2, R
F
= 250
,
V
H
= +1V, V
L
= -1V, Unless Otherwise Specified
Limit Accuracy (Note 5)
V
IN
=
2V, A
V
= -1,
R
F
= 510
A
Full
-125
25
125
mV
Overdrive Recovery Time (Note 5)
V
IN
=
1V
B
25
-
0.8
-
ns
Negative Limit Range
B
25
-5.0 to +2.5
V
Positive Limit Range
B
25
-2.5 to +5.0
V
Limit Input Bias Current
A
25
-
50
200
A
A
Full
-
80
200
A
POWER SUPPLY CHARACTERISTICS
Power Supply Range
C
25
4.5
-
5.5
V
Power Supply Current (Note 5)
A
Full
6.4
6.9
7.3
mA
NOTES:
2. Test Level: A. Production Tested; B. Typical or Guaranteed Limit Based on Characterization; C. Design Typical for Information Only.
3. The optimum feedback resistor for the HFA1135 at A
V
= +1 is 1.5k
. The Production Tested parameters are tested with R
F
= 510
because
the HFA1135 shares test hardware with the HFA1105 amplifier.
4. Undershoot dominates for output signal swings below GND (e.g., 0.5V
P-P
), yielding a higher overshoot limit compared to the V
OUT
= 0V to 0.5V
condition. See the "Application Information" section for details.
5. See Typical Performance Curves for more information.
6. Slew rates are asymmetrical if the output swings below GND (e.g., a bipolar signal). Positive unipolar output signals have symmetric positive and
negative slew rates comparable to the +SR specification. See the "Application Information" section, and the pulse response graphs for details.
Electrical Specifications
V
SUPPLY
=
5V, A
V
= +1, R
F
= 510
(Note 3), R
L
= 100
,
Unless Otherwise Specified (Continued)
PARAMETER
TEST CONDITIONS
(NOTE 2)
TEST
LEVEL
TEMP.
(
o
C)
MIN
TYP
MAX
UNITS
HFA1135
5
problems due to the feedback impedance decrease at higher
frequencies). At higher gains the amplifier is more stable, so
R
F
can be decreased in a trade-off of stability for bandwidth.
The table below lists recommended R
F
values, and the
expected bandwidth, for various closed loop gains.
Non-inverting Input Source Impedance
For best operation, the DC source impedance seen by the
non-inverting input should be
50
.
This is especially
important in inverting gain configurations where the non-
inverting input would normally be connected directly to GND.
Pulse Undershoot and Asymmetrical Slew Rates
The HFA1135 utilizes a quasi-complementary output stage
to achieve high output current while minimizing quiescent
supply current. In this approach, a composite device
replaces the traditional PNP pulldown transistor. The
composite device switches modes after crossing 0V,
resulting in added distortion for signals swinging below
ground, and an increased undershoot on the negative
portion of the output waveform (see Figures 9, 13, and 17).
This undershoot isn't present for small bipolar signals, or
large positive signals. Another artifact of the composite
device is asymmetrical slew rates for output signals with a
negative voltage component. The slew rate degrades as the
output signal crosses through 0V (see Figures 9, 13, and
17), resulting in a slower overall negative slew rate. Positive
only signals have symmetrical slew rates as illustrated in the
large signal positive pulse response graphs (see Figures 7,
11, and 15).
PC Board Layout
This amplifier's frequency response depends greatly on the
care taken in designing the PC board. The use of low
inductance components such as chip resistors and chip
capacitors is strongly recommended, while a solid
ground plane is a must!
Attention should be given to decoupling the power supplies.
A large value (10
F) tantalum in parallel with a small value
(0.1
F) chip capacitor works well in most cases.
Terminated microstrip signal lines are recommended at the
input and output of the device. Capacitance directly on the
output must be minimized, or isolated as discussed in the
next section.
Care must also be taken to minimize the capacitance to
ground at the amplifier's inverting input (-IN), as this
capacitance causes gain peaking, pulse overshoot, and if
large enough, instability. To reduce this capacitance, the
designer should remove the ground plane under traces
connected to -IN, and keep connections to -IN as short as
possible.
An example of a good high frequency layout is the
Evaluation Board shown in Figure 2.
Driving Capacitive Loads
Capacitive loads, such as an A/D input, or an improperly
terminated transmission line degrade the amplifier's phase
margin resulting in frequency response peaking and
possible oscillations. In most cases, the oscillation can be
avoided by placing a resistor (R
S
) in series with the output
prior to the capacitance.
Figure 1 details starting points for the selection of this
resistor. The points on the curve indicate the R
S
and C
L
combinations for the optimum bandwidth, stability, and
settling time, but experimental fine tuning is recommended.
Picking a point above or to the right of the curve yields an
overdamped response, while points below or left of the curve
indicate areas of underdamped performance.
R
S
and C
L
form a low pass network at the output, thus
limiting system bandwidth well below the amplifier bandwidth
of 660MHz (A
V
= +1). By decreasing R
S
as C
L
increases (as
illustrated by the curves), the maximum bandwidth is
obtained without sacrificing stability. In spite of this,
bandwidth still decreases as the load capacitance increases.
For example, at A
V
= +1, R
S
= 50
, C
L
= 20pF, the overall
bandwidth is 170MHz, but the bandwidth drops to 45MHz at
A
V
= +1, R
S
= 10
, C
L
= 330pF.
TABLE 1. OPTIMUM FEEDBACK RESISTOR
GAIN
(A
V
)
R
F
(
)
BANDWIDTH
(MHz)
-1
330
290
+1
1.5k
660
+2
250
330
360
315
+5
180
200
+10
250
90
R
S
(
)
LOAD CAPACITANCE (pF)
50
45
40
35
30
25
20
15
10
5
0
0
40
80
120
160
200
240
280
320
360
400
A
V
= +1
A
V
= +2, R
F
= 250
FIGURE 1. RECOMMENDED SERIES RESISTOR vs LOAD
CAPACITANCE
A
V
= +1
HFA1135
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