1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright Intersil Corporation 1999
HFA1205
Dual, 400MHz, Low Power, Video
Operational Amplifier
The HFA1205 is a dual, high speed, low power current
feedback amplifier built with Intersil's proprietary
complementary bipolar UHF-1 process.
These amplifiers deliver 400MHz bandwidth and 1275V/
s
slew rate, on only 60mW of quiescent power. They are
specifically designed to meet the performance, power, and
cost requirements of high volume video applications. The
excellent gain flatness and differential gain/phase
performance make these amplifiers well suited for
component or composite video applications. Video
performance is maintained even when driving a back
terminated cable (R
L
= 150
), and degrades only slightly
when driving two back terminated cables (R
L
= 75
). RGB
applications will benefit from the high slew rates, and high
full power bandwidth.
The HFA1205 is a pin compatible, low power, high
performance upgrade for the popular Intersil HA5023. For a
dual amplifier with output disable capability, please see the
HFA1245 datasheet.
Features
Low Supply Current . . . . . . . . . . . . . . . . . 5.8mA/Op Amp
High Input Impedance . . . . . . . . . . . . . . . . . . . . . . . 2M
Wide -3dB Bandwidth (A
V
= +2) . . . . . . . . . . . . . . 400MHz
Very Fast Slew Rate . . . . . . . . . . . . . . . . . . . . . . 1275V/
s
Gain Flatness (to 50MHz)
. . . . . . . . . . . . . . . . . . . .
0.03dB
Differential Gain . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.03%
Differential Phase . . . . . . . . . . . . . . . . . . . . 0.03 Degrees
Pin Compatible Upgrade to HA5023
Applications
Flash A/D Drivers
High Resolution Monitors
Video Switching and Routing
Professional Video Processing
Video Digitizing Boards/Systems
Multimedia Systems
RGB Preamps
Medical Imaging
Hand Held and Miniaturized RF Equipment
Battery Powered Communications
High Speed Oscilloscopes and Analyzers
Pinout
HFA1205
(PDIP, SOIC)
TOP VIEW
Ordering Information
PART NUMBER
(BRAND)
TEMP.
RANGE (
o
C)
PACKAGE
PKG.
NO.
HFA1205IP
-40 to 85
8 Ld PDIP
E8.3
HFA1205IB
(H1205I)
-40 to 85
8 Ld SOIC
M8.15
HA5023EVAL
High Speed Op Amp DIP Evaluation Board
OUT1
-IN1
+IN1
V-
1
2
3
4
8
7
6
5
V+
OUT2
-IN2
+IN2
+
-
+
-
September 1998
File Number
3605.5
2
Absolute Maximum Ratings
Thermal Information
Voltage Between V+ and V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11V
DC Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
SUPPLY
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8V
Output Current (Note 2) . . . . . . . . . . . . . . . . .Short Circuit Protected
30mA Continuous
60mA
50% Duty Cycle
ESD Rating
Human Body Model (Per MIL-STD-883 Method 3015.7) . . . .600V
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . -40
o
C to 85
o
C
Thermal Resistance (Typical, Note 1)
JA
(
o
C/W)
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
130
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
160
Maximum Junction Temperature (Die Only) . . . . . . . . . . . . . . . .175
o
C
Maximum Junction Temperature (Plastic Package) . . . . . . . .150
o
C
Maximum Storage Temperature Range . . . . . . . . . . -65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300
o
C
(SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1.
JA
is measured with the component mounted on an evaluation PC board in free air.
2. Output is short circuit protected to ground. Brief short circuits to ground will not degrade reliability, however continuous (100% duty cycle) output
current must not exceed 30mA for maximum reliability.
Electrical Specifications
V
SUPPLY
=
5V, A
V
= +1, R
F
= 560
, R
L
= 100
, Unless Otherwise Specified
PARAMETER
TEST CONDITIONS
(NOTE 3)
TEST
LEVEL
TEMP.
(
o
C)
MIN
TYP
MAX
UNITS
INPUT CHARACTERISTICS
Input Offset Voltage
A
25
-
2
5
mV
A
Full
-
3
8
mV
Average Input Offset Voltage Drift
B
Full
-
1
10
V/
o
C
Input Offset Voltage
Common-Mode Rejection Ratio
V
CM
=
1.8V
A
25
45
48
-
dB
V
CM
=
1.8V
A
85
43
46
-
dB
V
CM
=
1.2V
A
-40
43
46
-
dB
Input Offset Voltage
Power Supply Rejection Ratio
V
PS
=
1.8V
A
25
48
52
-
dB
V
PS
=
1.8V
A
85
46
50
-
dB
V
PS
=
1.2V
A
-40
46
50
-
dB
Non-Inverting Input Bias Current
A
25
-
6
15
A
A
Full
-
10
25
A
Non-Inverting Input Bias Current Drift
B
Full
-
5
60
nA/
o
C
Non-Inverting Input Bias Current
Power Supply Sensitivity
V
PS
=
1.8V
A
25
-
0.5
1
A/V
V
PS
=
1.8V
A
85
-
0.8
3
A/V
V
PS
=
1.2V
A
-40
-
0.8
3
A/V
Non-Inverting Input Resistance
V
CM
=
1.8V
A
25
0.8
2
-
M
V
CM
=
1.8V
A
85
0.5
1.3
-
M
V
CM
=
1.2V
A
-40
0.5
1.3
-
M
Inverting Input Bias Current
A
25
-
2
8.5
A
A
Full
-
5
15
A
Inverting Input Bias Current Drift
B
Full
-
60
200
nA/
o
C
Inverting Input Bias Current
Common-Mode Sensitivity
V
CM
=
1.8V
A
25
-
3
6
A/V
V
CM
=
1.8V
A
85
-
4
8
A/ V
V
CM
=
1.2V
A
-40
-
4
8
A/V
HFA1205
3
Inverting Input Bias Current
Power Supply Sensitivity
V
PS
=
1.8V
A
25
-
2
5
A/V
V
PS
=
1.8V
A
85
-
4
8
A/V
V
PS
=
1.2V
A
-40
-
4
8
A/V
Inverting Input Resistance
C
25
-
60
-
Input Capacitance
C
25
-
1.6
-
pF
Input Voltage Common Mode Range
(Implied by V
IO
CMRR, +R
IN
, and -I
BIAS
CMS
tests)
A
25, 85
1.8
2.4
-
V
A
-40
1.2
1.7
-
V
Input Noise Voltage Density
f = 100kHz
B
25
-
3.5
-
nV/
Hz
Non-Inverting Input Noise Current Density
f = 100kHz
B
25
-
2.5
-
pA/
Hz
Inverting Input Noise Current Density
f = 100kHz
B
25
-
20
-
pA/
Hz
TRANSFER CHARACTERISTICS
Open Loop Transimpedance Gain
A
V
= -1
C
25
-
500
-
k
AC CHARACTERISTICS
A
V
= +2, R
F
= 464
, Unless Otherwise Specified
-3dB Bandwidth (V
OUT
= 0.2V
P-P
)
A
V
= +1, +R
S
= 432
B
25
-
280
-
MHz
A
V
= +2
B
25
-
400
-
MHz
A
V
= -1, R
F
= 332
B
25
-
360
-
MHz
Full Power Bandwidth
(V
OUT
= 5V
P-P
at A
V
= +2/-1,
4V
P-P
at A
V
= +1)
A
V
= +1, R
S
= 432
B
25
-
140
-
MHz
A
V
= +2
B
25
-
125
-
MHz
A
V
= -1, R
F
= 332
B
25
-
180
-
MHz
Gain Flatness (A
V
= +2,V
OUT
= 0.2V
P-P
)
To 25MHz
B
25
-
0.02
-
dB
To 50MHz
B
25
-
0.03
-
dB
Minimum Stable Gain
A
Full
-
1
-
V/V
Crosstalk
5MHz
B
25
-
-60
-
dB
10MHz
B
25
-
-54
-
dB
OUTPUT CHARACTERISTICS
R
F
= 560
, Unless Otherwise Specified
Output Voltage Swing
A
V
= -1, R
L
= 100
A
25
3
3.4
-
V
A
Full
2.8
3
-
V
Output Current
A
V
= -1, R
L
= 50
A
25, 85
50
60
-
mA
A
-40
28
42
-
mA
Output Short Circuit Current
B
25
-
90
-
mA
Closed Loop Output Impedance
DC, A
V
= +2, R
F
= 464
B
25
-
0.07
-
Second Harmonic Distortion
(A
V
= +2, R
F
= 464
, V
OUT
= 2V
P-P
)
10MHz
B
25
-
-50
-
dBc
20MHz
B
25
-
-45
-
dBc
Third Harmonic Distortion
(A
V
= +2, R
F
= 464
, V
OUT
= 2V
P-P
)
10MHz
B
25
-
-55
-
dBc
20MHz
B
25
-
-50
-
dBc
TRANSIENT CHARACTERISTICS
A
V
= +2, R
F
= 464
,
Unless Otherwise Specified
Rise and Fall Times (V
OUT
= 0.5V
P-P
)
Rise Time
B
25
-
0.8
-
ns
Fall Time
B
25
-
1.25
-
ns
Electrical Specifications
V
SUPPLY
=
5V, A
V
= +1, R
F
= 560
, R
L
= 100
, Unless Otherwise Specified (Continued)
PARAMETER
TEST CONDITIONS
(NOTE 3)
TEST
LEVEL
TEMP.
(
o
C)
MIN
TYP
MAX
UNITS
HFA1205
4
Application Information
Optimum Feedback Resistor
Although a current feedback amplifier's bandwidth dependency
on closed loop gain isn't as severe as that of a voltage feedback
amplifier, there can be an appreciable decrease in bandwidth at
higher gains. This decrease may be minimized by taking
advantage of the current feedback amplifier's unique
relationship between bandwidth and R
F
. All current feedback
amplifiers require a feedback resistor, even for unity gain
applications, and R
F
, in conjunction with the internal
compensation capacitor, sets the dominant pole of the
frequency response. Thus, the amplifier's bandwidth is
inversely proportional to R
F
. The HFA1205 design is optimized
for a 464
R
F
at a gain of +2. Decreasing R
F
decreases
stability, resulting in excessive peaking and overshoot (Note:
Capacitive feedback will cause the same problems due to the
feedback impedance decrease at higher frequencies). At
higher gains the amplifier is more stable, so R
F
can be
decreased in a trade-off of stability for bandwidth.
The table below lists recommended R
F
values for various
gains, and the expected bandwidth. For good channel-to-
channel gain matching, it is recommended that all resistors
(termination as well as gain setting) be
1% tolerance or better.
Note that a series input resistor, on +IN, is required for a gain of
+1, to reduce gain peaking and increase stability.
Overshoot
V
OUT
= 0.5V
P-P
,
V
IN
t
RISE
= 2.5ns
B
25
-
5
-
%
Slew Rate
(V
OUT
= 4V
P-P
, A
V
= +1, +R
S
= 432
)
+SR
B
25
-
1050
-
V/
s
-SR
B
25
-
750
-
V/
s
Slew Rate (V
OUT
= 5V
P-P
, A
V
= +2)
+SR
B
25
-
1375
-
V/
s
-SR
B
25
-
875
-
V/
s
Slew Rate
(V
OUT
= 5V
P-P
, A
V
= -1, R
F
= 332
)
+SR
B
25
-
2250
-
V/
s
-SR
B
25
-
1275
-
V/
s
Settling Time (V
OUT
= +2V to 0V step)
To 0.1%
B
25
-
15
-
ns
To 0.05%
B
25
-
20
-
ns
To 0.02%
B
25
-
30
-
ns
Overdrive Recovery Time
V
IN
=
2V
B
25
-
10
-
ns
VIDEO CHARACTERISTICS
A
V
= +2, R
F
= 464
,
Unless Otherwise Specified
Differential Gain (f = 3.58MHz)
R
L
= 150
B
25
-
0.03
-
%
R
L
= 75
B
25
-
0.03
-
%
Differential Phase (f = 3.58MHz)
R
L
= 150
B
25
-
0.03
-
Degrees
R
L
= 75
B
25
-
0.05
-
Degrees
POWER SUPPLY CHARACTERISTICS
Power Supply Range
C
25
4.5
-
5.5
V
Power Supply Current
A
25
5.6
5.8
6.1
mA/
Op Amp
A
Full
5.4
5.9
6.3
mA/
Op Amp
NOTE:
3. Test Level: A. Production Tested.; B. Typical or Guaranteed Limit Based on Characterization.; C. Design Typical for Information Only.
Electrical Specifications
V
SUPPLY
=
5V, A
V
= +1, R
F
= 560
, R
L
= 100
, Unless Otherwise Specified (Continued)
PARAMETER
TEST CONDITIONS
(NOTE 3)
TEST
LEVEL
TEMP.
(
o
C)
MIN
TYP
MAX
UNITS
GAIN
(A
CL
)
R
F
(
)
BANDWIDTH
(MHz)
-1
332
360
+1
464 (+R
S
= 432
)
280
+2
464
400
HFA1205
5
Non-inverting Input Source Impedance
For best operation, the DC source impedance seen by the
non-inverting input should be
50
.
This is especially
important in inverting gain configurations where the non-
inverting input would normally be connected directly to GND.
PC Board Layout
The frequency response of this amplifier depends greatly on
the amount of care taken in designing the PC board. The
use of low inductance components such as chip
resistors and chip capacitors is strongly recommended,
while a solid ground plane is a must!
Attention should be given to decoupling the power supplies.
A large value (10
F) tantalum in parallel with a small value
(0.1
F) chip capacitor works well in most cases.
Terminated microstrip signal lines are recommended at the
input and output of the device. Capacitance directly on the
output must be minimized, or isolated as discussed in the
next section.
Care must also be taken to minimize the capacitance to
ground seen by the amplifier's inverting input (-IN). The
larger this capacitance, the worse the gain peaking, resulting
in pulse overshoot and possible instability. To this end, it is
recommended that the ground plane be removed under
traces connected to -IN, and connections to -IN should be
kept as short as possible.
Driving Capacitive Loads
Capacitive loads, such as an A/D input, or an improperly
terminated transmission line will degrade the amplifier's
phase margin resulting in frequency response peaking and
possible oscillations. In most cases, the oscillation can be
avoided by placing a resistor (R
S
) in series with the output
prior to the capacitance.
Figure 1 details starting points for the selection of this
resistor. The points on the curve indicate the R
S
and C
L
combinations for the optimum bandwidth, stability, and
settling time, but experimental fine tuning is recommended.
Picking a point above or to the right of the curve yields an
overdamped response, while points below or left of the curve
indicate areas of underdamped performance.
R
S
and C
L
form a low pass network at the output, thus
limiting system bandwidth well below the amplifier
bandwidth of 280MHz (for A
V
= +1). By decreasing R
S
as
C
L
increases (as illustrated in the curves), the maximum
bandwidth is obtained without sacrificing stability. In spite
of this, bandwidth decreases as the load capacitance
increases. For example, at A
V
= +1, R
S
= 62
, C
L
= 40pF,
the overall bandwidth is limited to 180MHz, and bandwidth
drops to 70MHz at A
V
= +1, R
S
= 8
, C
L
= 400pF.
Evaluation Board
The performance of the HFA1205 may be evaluated using
the HA5023 Evaluation Board. The feedback and gain
setting resistors must be replaced with the appropriate value
(see "Optimum Feedback Resistor" section) for the gain
being evaluated. Also, replace the two 0
series output
resistors with 50
resistors.
To order evaluation boards (Part Number HA5023EVAL),
please contact your local sales office.
0
100
200
300
400
0
10
20
30
40
50
LOAD CAPACITANCE (pF)
SERIES OUTPUT RESISTANCE (
)
A
V
= +2
150
250
350
50
A
V
= +1
FIGURE 1. RECOMMENDED SERIES OUTPUT RESISTOR vs
LOAD CAPACITANCE
HFA1205
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