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Электронный компонент: HI1179JCQ

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4-1110
August 1997
HI1179
8-Bit, 35 MSPS, Video A/D Converter
Features
Resolution 8-Bit . . . . . . . . . . . . . . . . . .
0.5 LSB (DNL)
ENOB at f
IN
= 1MHz . . . . . . . . . . . . . . . . . . . . . . 7.6 Bits
Maximum Sampling Frequency . . . . . . . . . . . 35 MSPS
Low Power Consumption 80mW (at 35 MSPS Typ)
(Reference Current Excluded)
Built-In Input Clamp Function (DC Restore)
No Sample/Hold Required
Internal Voltage Reference
Input CMOS Compatible
Three-State TTL Compatible Output
Single Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . +5V
Low Input Capacitance (Typ) . . . . . . . . . . . . . . . . . 8pF
Reference Impedance (Typ) . . . . . . . . . . . . . . . . . 330
Direct Replacement for Sony CXD1179
Applications
Desktop Video
Multimedia
Video Digitizing
Image Scanners
Low Cost High Speed Data Acquisition Systems
Description
The HI1179 is an 8-bit CMOS analog-to-digital converter for
video use that features a sync clamp function. The adoption
of a 2-step parallel method realizes low power consumption
and a maximum conversion speed of 35 MSPS, allowing up
to 8x over sampling of NTSC and PAL signals.
The HI1179 is available in the Industrial temperature range
and is supplied in 32 lead Plastic Metric Quad Flatpack
(MQFP) package. For lower sampling rates, refer to the
HI1176 data sheet.
Pinout
HI1179 (MQFP)
TOP VIEW
Ordering Information
PART
NUMBER
TEMP. RANGE
(
o
C)
PACKAGE
PKG. NO.
HI1179JCQ
-40 to 85
32 Ld MQFP
Q32.7x7-S
HI1179-EV
25
Evaluation Board
1
2
3
4
5
6
7
8
(LSB) D0
D1
D2
D3
D4
D5
D6
(MSB) D7
V
RB
AV
SS
AV
SS
V
IN
AV
DD
AV
DD
V
RT
V
RTS
NC
DV
SS
OE
CLE
DV
SS
CCP
V
REF
V
RBS
32 31 30 29 28 27 26 25
24
23
22
21
20
19
18
17
9 10 11 12 13 14 15 16
NC
DV
DD
DV
DD
CLK
TEST
CLP
AV
DD
TEST
File Number
3666.3
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright Intersil Corporation 1999
4-1111
Functional Block Diagram
LOWER
DATA
LATCHES
UPPER
DATA
LATCHES
LOWER
ENCODER
(4-BIT)
LOWER
ENCODER
(4-BIT)
UPPER
ENCODER
(4-BIT)
UPPER SAMPLING
COMPARATORS
(4-BIT)
REFERENCE SUPPLY
CLOCK GENERATOR
OE
DV
SS
D0 (LSB)
D1
D2
D3
D4
D5
D6
D7 (MSB)
NC
CLK
11
10
9
8
7
6
5
4
3
2
1
12
LOWER SAMPLING
COMPARATORS
(4-BIT)
DV
DD
DV
DD
NC
32
31
30
28
DV
SS
24
23
20
21
22
19
16
17
18
13
V
RBS
V
RB
AV
SS
AV
SS
V
IN
AV
DD
V
RTS
AV
DD
TEST
TEST
25
AV
DD
V
RT
CLP
-
+
LOGIC
15
14
26
27
29
CLE CCP V
REF
LOWER SAMPLING
COMPARATORS
(4-BIT)
Typical Application Schematic
NON-CLAMP APPLICATION (INTERNAL REFERENCE USED)
17
18
19
20
21
22
23
24
16 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
25 26 27 28 29 30 31 32
74ACO4
CLOCK IN
VIDEO IN
0.01
F
0.1
F
10pF
D7
D6
D5
D4
D3
D2
D1
D0
0.1
F
+5V (DIGITAL)
GND (ANALOG)
GND (DIGITAL)
0.01
F
75
+5V (DIGITAL)
1k
-
+
HA5020
+5V (ANALOG)
1k
HI1179
4-1112
Absolute Maximum Ratings
Thermal Information
Supply Voltage, V
DD
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V
Reference Voltage, V
RT
, V
RB
. . . . . . . . . . . . . . . . . . . . V
DD
to V
SS
Analog Input Voltage, V
IN
. . . . . . . . . . . . . . . . . . . . . . . . V
DD
to V
SS
Digital Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DD
to V
SS
Digital Output Voltage, V
OH
, V
OL
. . . . . . . . . . . . . . . . . . V
DD
to V
SS
Thermal Resistance (Typical, Note 1)
JA
o
C/W
MQFP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . .
122
Maximum Junction Temperature (Plastic Package) . . . . . . . . 150
o
C
Maximum Storage Temperature Range, T
STG
. . . . -65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300
o
C
(MQFP - Lead Tips Only)
Recommended Operating Conditions
(Note 2)
Supply Voltage
AV
DD
, AV
SS
, DV
DD
, DV
SS
. . . . . . . . . . . . . . . . +4.75V to +5.25V
|DGND-AGND| . . . . . . . . . . . . . . . . . . . . . . . . . . . .0mV to 100mV
Reference Input Voltage
V
RB
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0V and Above
V
RT
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7V and Below
Temperature Range, T
A
. . . . . . . . . . . . . . . . . . . . . . . -40
o
C to 85
o
C
Analog Input Voltage, V
IN
. . . . . . . . .V
RB
to V
RT
(1.8V
P-P
to AV
DD
)
Clock Pulse Width
t
PW1
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14ns (Min)
t
PW0
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14ns (Min)
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
2.
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
f
C
= 35 MSPS, V
DD
= +5V, V
RB
= 0.5V, V
RT
= 2.5V, T
A
= 25
o
C (Note 2)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SYSTEM PERFORMANCE
Maximum Conversion Speed, f
C
V
IN
= 0.5V to 2.5V, f
IN
= 1kHz Ramp
35
40
-
MSPS
Minimum Conversion Speed, f
C
V
IN
= 0.5V to 2.5V, f
IN
= 1kHz Ramp
-
-
0.5
MSPS
Integral Non-Linearity, INL
f
C
= 35 MSPS, V
IN
= 0.5V to 2.5V
-1.0
0.5
+1.3
LSB
Differential Non-Linearity, DNL
f
C
= 35 MSPS, V
IN
= 0.5V to 2.5V
-0.5
0.3
+0.5
LSB
DYNAMIC CHARACTERISTICS
ENOB
f
IN
= 1MHz
-
7.6
-
Bits
f
IN
= 5MHz
-
7.3
-
Bits
Differential Gain Error, DG
NTSC 40 IRE Mod Ramp, f
C
= 14.3 MSPS
-
1.0
-
%
Differential Phase Error, DP
-
0.5
-
Degree
Aperture Jitter, t
AJ
-
30
-
ps
Offset Voltage
E
OT
-60
-40
-20
mV
E
OB
+55
+75
+95
mV
Sampling Delay, t
SD
-
2
-
ns
ANALOG INPUTS
Analog Input Bandwidth, BW
-1dB
-
25
-
MHz
-3dB
-
60
-
MHz
Analog Input Capacitance, C
IN
V
IN
= 1.5V + 0.07V
RMS
-
8
-
pF
REFERENCE INPUT
Reference Pin Current, I
REF
4.5
6.1
8.7
mA
Reference Resistance (V
RT
to V
RB
),
R
REF
230
330
440
HI1179
4-1113
INTERNAL VOLTAGE REFERENCES
Self Bias
V
RB
Short V
RB
to V
RBS
, Short V
RT
to V
RTS
0.52
0.56
0.60
V
V
RT
- V
RB
1.96
2.10
2.24
V
V
RT
- V
RB
Short V
RT
to V
RTS
, Short V
RB
to AV
SS
2.13
2.33
2.53
V
DIGITAL INPUTS
Digital Input Voltage
V
IH
3.5
-
-
V
V
IL
-
-
0.5
V
Digital Input Current
I
IH
V
DD
= Max
V
IH
= V
DD
-
-
5
A
I
IL
V
IL
= 0V
-
-
5
A
DIGITAL OUTPUTS
Digital Output Current
I
OH
OE = V
SS
, V
DD
= Min
V
OH
= V
DD
-0.5V
-1.1
-2.5
-
mA
I
OL
V
OL
= 0.4V
3.7
6.5
-
mA
Digital Output Leakage Current
I
OZH
OE = V
DD
, V
DD
= Max
V
OH
= V
DD
-
-
16
A
I
OZL
V
OL
= 0V
-
-
16
A
TIMING CHARACTERISTICS
Output Data Delay, t
D
Load is One TTL Gate and 10pF Load
7
13
18
ns
Output Enable/Disable Delay
t
PZH
, t
PZL
R
L
= 1K, C
L
= 15pF,
OE = 5V
0V
5
8
14
ns
t
PHZ
, t
PLZ
R
L
= 1K, C
L
= 15pF,
OE = 0V
5V
4
6.5
11
ns
POWER SUPPLY CHARACTERISTIC
Supply Current, I
DD
f
C
= 35 MSPS, NTSC Ramp Wave Input
-
16
22
mA
CLAMP CHARACTERISTICS
Clamp Offset Voltage, E
OC
V
IN
= DC, PWS = 3
s
V
REF
= 0.5V
-20
0
+20
mV
V
REF
= 2.5V
-30
-10
+10
mV
Clamp Pulse Delay, t
CPD
-
25
-
ns
NOTE:
3. Electrical specifications guaranteed only under the stated operating conditions.
Electrical Specifications
f
C
= 35 MSPS, V
DD
= +5V, V
RB
= 0.5V, V
RT
= 2.5V, T
A
= 25
o
C (Note 2) (Continued)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
HI1179
4-1114
Timing Diagrams
FIGURE 12.
FIGURE 13.
t
PW1
t
PW0
CLOCK
ANALOG INPUT
DATA OUTPUT
N
N - 2
N + 3
N + 4
N - 3
N - 2
N - 1
N
N + 1
t
D
= 13ns
: POINT FOR ANALOG SIGNAL SAMPLING
N + 1
ANALOG INPUT
EXTERNAL CLOCK
UPPER COMPARATOR BLOCK
UPPER DATA
LOWER REFERENCE VOLTAGE
LOWER COMPARATOR BLOCK A
LOWER DATA A
LOWER COMPARATOR BLOCK B
LOWER DATA B
DIGITAL OUTPUT
V
I
(1)
V
I
(2)
V
I
(3)
V
I
(4)
S (1)
C (1)
S (2)
C (2)
S (3)
S (4)
C (3)
C (4)
MD (0)
MD (1)
MD (2)
MD (3)
RV (0)
RV (1)
RV (2)
RV (3)
S (1)
C (1)
S (3)
C (3)
H (3)
H (1)
LD (-1)
LD (1)
H (0)
C (0)
S (2)
H (2)
C (2)
S (4)
H (4)
LD (-2)
LD (0)
LD (2)
OUT (-2)
OUT (-1)
OUT (0)
OUT (1)
HI1179