1
File Number
3150.2
HI-546, HI-547, HI-548, HI-549
Single 16 and 8, Differential 8-Channel
and 4-Channel CMOS Analog MUXs with
Active Overvoltage Protection
The HI-546, HI-547, HI-548 and HI-549 are analog
multiplexers with active overvoltage protection and
guaranteed r
ON
matching. Analog input levels may greatly
exceed either power supply without damaging the device or
disturbing the signal path of other channels. Active
protection circuitry assures that signal fidelity is maintained
even under fault conditions that would destroy other
multiplexers.
Analog inputs can withstand constant 70V
P-P
levels with
15V supplies. Digital inputs will also sustain continuous
faults up to 4V greater than either supply. In addition, signal
sources are protected from short circuiting should
multiplexer supply loss occur. Each input presents 1k
of
resistance under this condition. These features make the
HI-546, HI-547, HI-548 and HI-549 ideal for use in systems
where the analog inputs originate from external equipment
or separately powered circuitry. All devices are fabricated
with 44V Dielectrically Isolated CMOS technology. The
HI-546 is a single 16-Channel, the HI-547 is an 8-Channel
differential, the HI-548 is a single 8-Channel and the HI-549
is a 4-Channel differential device. If input overvoltage
protection is not needed the HI-506/507/508/509
multiplexers are recommended. For further information see
Application Notes AN520 and AN521.
For MIL-STD-883 compliant parts, request the HI-546/883,
HI-547/883, HI-548/883 and HI-549/883 datasheets.
Features
Analog Overvoltage Protection. . . . . . . . . . . . . . . . . . 70V
P-P
No Channel Interaction During Overvoltage
Guaranteed r
ON
Matching
Maximum Power Supply . . . . . . . . . . . . . . . . . . . . . . . 44V
Break-Before-Make Switching
Analog Signal Range . . . . . . . . . . . . . . . . . . . . . . . .
15V
Access Time (Typical) . . . . . . . . . . . . . . . . . . . . . . . 500ns
Standby Power (Typical) . . . . . . . . . . . . . . . . . . . . . 7.5mW
Applications
Data Acquisition
Industrial Controls
Telemetry
Ordering Information
PART NUMBER
TEMP.
RANGE (
o
C)
PACKAGE
PKG.
NO.
HI1-0546-5
0 to 75
28 Ld CERDIP
F28.6
HI1-0546-2
-55 to 125
28 Ld CERDIP
F28.6
HI3-0546-5
0 to 75
28 Ld PDIP
E28.6
HI4P0546-5
0 to 75
28 Ld PLCC
N28.45
HI9P0546-9
-40 to 85
28 Ld SOIC
M28.3
HI1-0547-5
0 to 75
28 Ld CERDIP
F28.6
HI3-0547-5
0 to 75
28 Ld PDIP
E28.6
HI4P0547-5
0 to 75
28 Ld PLCC
N28.45
HI9P0547-9
-40 to 85
28 Ld SOIC
M28.3
HI1-0548-2
-55 to 125
16 Ld CERDIP
F16.3
HI1-0548-5
0 to 75
16 Ld CERDIP
F16.3
HI3-0548-5
0 to 75
16 Ld PDIP
E16.3
HI4P0548-5
0 to 75
20 Ld PLCC
N20.35
HI9P0548-5
0 to 75
16 Ld SOIC
M16.15
HI9P0548-9
-40 to 85
16 Ld SOIC
M16.15
HI1-0549-2
-55 to 125
16 Ld CERDIP
F16.3
HI3-0549-5
0 to 75
16 Ld PDIP
E16.3
HI4P0549-5
0 to 75
20 Ld PLCC
N20.35
HI9P0549-5
0 to 75
16 Ld SOIC
M16.15
HI9P0549-9
-40 to 85
16 Ld SOIC
M16.15
Data Sheet
June 1999
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207
|
Copyright
Intersil Corporation 1999
2
Pinouts
HI-546 (CERDIP, PDIP, SOIC)
TOP VIEW
HI-547 (CERDIP, PDIP, SOIC)
TOP VIEW
HI-546 (PLCC)
TOP VIEW
HI-547 (PLCC)
TOP VIEW
HI-548 (CERDIP, PDIP, SOIC)
TOP VIEW
HI-549 (CERDIP, PDIP, SOIC)
TOP VIEW
+V
SUPPLY
NC
NC
IN 16
IN 15
IN 14
IN 13
IN 12
IN 11
IN 10
IN 9
GND
V
REF
ADDRESS A
3
OUT
IN 8
IN 7
IN 6
IN 5
IN 3
IN 1
ENABLE
ADDRESS A
0
ADDRESS A
1
ADDRESS A
2
-V
SUPPLY
IN 4
IN 2
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
+V
SUPPLY
OUT B
NC
IN 8B
IN 7B
IN 6B
IN 5B
IN 4B
IN 3B
IN 2B
IN 1B
GND
V
REF
NC
OUT A
IN 8A
IN 7A
IN 6A
IN 5A
IN 3A
IN 1A
ENABLE
ADDRESS A
0
ADDRESS A
1
ADDRESS A
2
-V
SUPPLY
IN 4A
IN 2A
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
IN 15
IN 14
IN 13
IN 12
IN 11
IN 10
IN 9
IN 16
NC
NC
+V
SUPPL
Y
OUT
-V
SUPPL
Y
IN 8
GND
V
REF
A
3
A
2
A
1
ENABLE
A
0
IN 7
IN 6
IN 5
IN 4
IN 3
IN 2
IN 1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
IN 7B
IN 6B
IN 5B
IN 4B
IN 3B
IN 2B
IN 1B
IN 8B
NC
OUT B
+V
SUPPL
Y
OUT A
-V
SUPPL
Y
IN 8A
GND
V
REF
NC
A
2
A
1
ENABLE
A
0
IN 7A
IN 6A
IN 5A
IN 4A
IN 3A
IN 2A
IN 1A
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
A
0
ENABLE
-V
SUPPLY
IN 1
IN 2
IN 3
OUT
IN 4
A
1
GND
+V
SUPPLY
IN 5
IN 6
IN 7
IN 8
A
2
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
A
0
ENABLE
-V
SUPPLY
IN 1A
IN 2A
IN 3A
OUT A
IN 4A
A
1
+V
SUPPLY
IN 1B
IN 2B
IN 3B
IN 4B
OUT B
GND
HI-546, HI-547, HI-548, HI-549
5
Schematic Diagrams
ADDRESS DECODER
MULTIPLEX SWITCH
P
N
A
0
OR A
0
TO N-CHANNEL
DEVICE OF
THE SWITCH
A
1
OR A
1
A
2
OR A
2
A
3
OR A
3
ENABLE
P
P
P
P
P
P
V+
V-
N
N
N
N
N
N
TO P-CHANNEL
DEVICE OF
THE SWITCH
DELETE A
3
OR A
3
INPUT FOR HI-547, HI-548, HI-549
DELETE A
2
OR A
2
INPUT FOR HI-549
IN
FROM
DECODE
R11
1K
V+
P
D6
D7
Q6
FROM
DECODE
OVERVOLTAGE PROTECTION
V-
Q5
D4
D5
N
N
N
P
OUT
HI-546, HI-547, HI-548, HI-549
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