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Электронный компонент: HM4-65642883

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6-220
March 1997
HM-65642/883
8K x 8 Asynchronous
CMOS Static RAM
Features
This Circuit is Processed in Accordance to MIL-STD-
883 and is Fully Conformant Under the Provisions of
Paragraph 1.2.1.
Full CMOS Design
Six Transistor Memory Cell
Low Standby Supply Current . . . . . . . . . . . . . . . .100
A
Low Operating Supply Current . . . . . . . . . . . . . . . 20mA
Fast Address Access Time . . . . . . . . . . . . . . . . . . 150ns
Low Data Retention Supply Voltage. . . . . . . . . . . . 2.0V
CMOS/TTL Compatible Inputs/Outputs
JEDEC Approved Pinout
Equal Cycle and Access Times
No Clocks or Strobes Required
Gated Inputs
- No Pull-Up or Pull-Down Resistors Required
Temperature Range -55
o
C to +125
o
C
Easy Microprocessor Interfacing
Dual Chip Enable Control
Description
The HM-65642/883 is a CMOS 8192 x 8-bit Static Random
Access Memory. The pinout is the JEDEC 28 pin, 8-bit wide
standard, which allows easy memory board layouts which
accommodate a variety of industry standard ROM, PROM,
EPROM, EEPROM and RAMs. The HM-65642/883 is ideally
suited for use in microprocessor based systems. In particu-
lar, interfacing with the Intersil 80C86 and 80C88 micropro-
cessors is simplified by the convenient output enable (G)
input.
The HM-65642/883 is a full CMOS RAM which utilizes an
array of six transistor (6T) memory cells for the most stable
and lowest possible standby supply current over the full mili-
tary temperature range. In addition to this, the high stability
of the 6T RAM cell provides excellent protection against soft
errors due to noise and alpha particles. This stability also
improves the radiation tolerance of the RAM over that of four
transistor or MIX-MOS (4T) devices
Ordering Information
PACKAGE
TEMPERATURE RANGE
150ns/75
A
150ns/150
A
200ns/250
A
PKG. NO.
CERDIP
-55
o
C to +125
o
C
HM1-65642B/883
HM1-65642/883
HM1-65642C/883
F28.6
CLCC
-55
o
C to +125
o
C
HM4-65642B/883
HM4-65642/883
-
J32.A
Pinouts
HM-65642/883 (CERDIP)
TOP VIEW
HM4-65642/883 (CLCC)
TOP VIEW
28
27
26
25
24
23
22
21
20
19
18
17
16
15
NC
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
VCC
E2
A8
A9
A11
A10
DQ7
DQ6
DQ5
DQ4
DQ3
W
G
E1
5
6
7
8
11
10
9
13
12
27
28
29
26
25
24
23
22
21
3
2
1
4
32
31
30
16
17
18
19
20
14
15
A6
A5
A4
A3
A2
A1
A0
NC
DQ0
DQ1
DQ2
GND
NC
DQ3
DQ4
DQ5
VCC
NC
NC
A7
A12
E2
W
A8
A9
A11
G
A10
E1
DQ7
DQ6
NC
PIN
DESCRIPTION
A
Address Input
DQ
Data Input/Output
E1
Chip Enable
E2
Chip Enable
W
Write Enable
G
Output Enable
NC
No Connections
GND
Ground
VCC
Power
File Number
3004.1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207
|
Copyright
Intersil Corporation 1999
6-221
Absolute Maximum Ratings
Thermal Information
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7.0V
Input or Output Voltage Applied for all Grades . . . . . . .GND -0.3V to
VCC +0.3V
Typical Derating Factor . . . . . . . . . . . . 5mA/MHz Increase in ICCOP
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Thermal Resistance (Typical)
JA
JC
CERDIP Package . . . . . . . . . . . . . . . .
45
o
C/W
8
o
C/W
CLCC Package . . . . . . . . . . . . . . . . . .
55
o
C/W
10
o
C/W
Maximum Storage Temperature Range . . . . . . . . .-65
o
C to +150
o
C
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +175
o
C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . +300
o
C
Die Characteristics
Gate Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101,000 Gates
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Operating Conditions
Operating Voltage Range . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V
Operating Temperature Range . . . . . . . . . . . . . . . . -55
o
C to +125
o
C
Input Low Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +0.8V
Input High Voltage . . . . . . . . . . . . . . . . . . . . . . . +2.2V to VCC +0.3V
Data Retention Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . 2.0V
Input Rise and Fall Time . . . . . . . . . . . . . . . . . . . . . . . . . . 40ns Max.
TABLE 1. HM-65642/883 DC ELECTRICAL PERFORMANCE SPECIFICATIONS
Device Guaranteed and 100% Tested
PARAMETER
SYMBOL
(NOTE 1)
CONDITIONS
GROUP A
SUBGROUPS
TEMPERATURE
LIMITS
UNITS
MIN
MAX
High Level Output
Voltage
VOH 1
VCC = 4.5V, IO = -1.0mA
1, 2, 3
-55
o
C
T
A
+125
o
C
2.4
-
V
Low Level Output
Voltage
VOL
VCC = 4.5V, IO = 4.0mA
1, 2, 3
-55
o
C
T
A
+125
o
C
-
0.4
V
High Impedance
Output Leakage
Current
IIOZ
HM-65642B/883, HM-65642/883
VCC = 5.5V, G = 2.2V,
VI/O = GND or VCC
1, 2, 3
-55
o
C
T
A
+125
o
C
-1.0
+1.0
A
HM-65642C/883
VCC = 5.5V, G = 2.2V,
VI/O = GND or VCC
1, 2, 3
-55
o
C
T
A
+125
o
C
-2.0
+2.0
A
Input Leakage
Current
II
HM-65642B/883, HM-65642/883
VCC = 5.5V, VI = GND or VCC
1, 2, 3
-55
o
C
T
A
+125
o
C
-1.0
+1.0
A
HM-65642C/883
VCC = 5.5V, VI = GND or VCC
1, 2, 3
-55
o
C
T
A
+125
o
C
-2.0
+2.0
A
Standby Supply
Current
ICCSB1
HM-65642B/883
VCC = 5.5V, E1 = VCC -0.3V or
E2 = GND +0.3V
1, 2, 3
-55
o
C
T
A
+125
o
C
-
100
A
HM-65642/883
VCC = 5.5V, E1 = VCC -0.3V or
E2 = GND +0.3V
1, 2, 3
-55
o
C
T
A
+125
o
C
-
250
A
HM-65642C/883
VCC = 5.5V, E1 = VCC -0.3V or
E2 = GND +0.3V
1, 2, 3
-55
o
C
T
A
+125
o
C
-
400
A
Standby Supply
Current
ICCSB
VCC = 5.5V, IO = 0mA, E1 = 2.2V or
E2 = 0.8V
1, 2, 3
-55
o
C
T
A
+125
o
C
-
5
mA
Enable Supply
Current
ICCEN
VCC = 5.5V, IO = 0mA, E1 =0.8V,
E2 = 2.2V
1, 2, 3
-55
o
C
T
A
+125
o
C
-
5
mA
Operating Supply
Current
ICCOP
VCC = 5.5V, G = 5.5V, (Note 2),
f = 1MHz, E1 = 0.8V, E2 = 2.2V
1, 2, 3
-55
o
C
T
A
+125
o
C
-
20
mA
HM-65642/883
6-222
Data Retention
Supply Current
ICCDR
HM-65642B/883
VCC = 2.0V, E1 = VCC -0.3V or
E2 = GND +0.3V
1, 2, 3
-55
o
C
T
A
+125
o
C
-
75
A
HM-65642/883
VCC = 2.0V, E1 = VCC -0.3V or
E2 = GND +0.3V
1, 2, 3
-55
o
C
T
A
+125
o
C
-
150
A
HM-65642C/883
VCC = 2.0V, E1 = VCC -0.3V or
E2 = GND +0.3V
1, 2, 3
-55
o
C
T
A
+125
o
C
-
250
A
Functional Test
FT
VCC = 4.5V (Note 3)
7, 8A, 8B
-55
o
C
T
A
+125
o
C
-
-
-
NOTES:
1. All voltages referenced to device GND.
2. Typical derating 5mA/MHz increase in ICCOP.
3. Tested as follows: f = 2MHz, VIH = 2.4V, VIL = 0.4V, IOH = -4.0mA, IOL = 4.0mA, VOH
1.5V, and VOL
1.5V.
TABLE 1. HM-65642/883 DC ELECTRICAL PERFORMANCE SPECIFICATIONS (Continued)
Device Guaranteed and 100% Tested
PARAMETER
SYMBOL
(NOTE 1)
CONDITIONS
GROUP A
SUBGROUPS
TEMPERATURE
LIMITS
UNITS
MIN
MAX
TABLE 2. HM-65642/883 AC ELECTRICAL PERFORMANCE SPECIFICATIONS
PARAMETERS
SYMBOL
(NOTES 1, 2)
CONDITIONS
GROUP A
SUB-
GROUPS
TEMPERATURE
LIMITS
UNITS
HM-
65642B/883
HM-
65642/883
HM-
65642C/883
MIN
MAX
MIN
MAX
MIN
MAX
Read/Write/
Cycle Time
TAVAX
VCC = 4.5V and
5.5V
9, 10, 11
-55
o
C
T
A
+125
o
C
150
-
150
-
200
-
ns
Address Access
Time
TAVQV
VCC = 4.5V and
5.5V
9, 10, 11
-55
o
C
T
A
+125
o
C
-
150
-
150
-
200
-
Output Enable
Access Time
TGLQV
VCC = 4.5V and
5.5V
9, 10, 11
-55
o
C
T
A
+125
o
C
-
70
-
70
-
70
ns
Chip Enable
Access Time
TE1LQV
TE2HQV
VCC = 4.5V and
5.5V
9, 10, 11
-55
o
C
T
A
+125
o
C
-
150
-
150
-
200
ns
Write Recovery
Time
TWHAX
TE1HAX
TE2LAX
VCC = 4.5V and
5.5V
9, 10, 11
-55
o
C
T
A
+125
o
C
10
-
10
-
10
-
ns
Chip Enable to
End-of-Write
TE1LE1H
TE2HE2L
VCC = 4.5V and
5.5V
9, 10, 11
-55
o
C
T
A
+125
o
C
90
-
90
-
120
-
ns
Address Setup
Time
TAVWL
TAVE1L
TAVE2H
VCC = 4.5V and
5.5V
9, 10, 11
-55
o
C
T
A
+125
o
C
0
-
0
-
0
-
ns
Write Enable
Pulse Width
TWLWH
VCC = 4.5V and
5.5V
9, 10, 11
-55
o
C
T
A
+125
o
C
90
-
90
-
120
-
ns
Data Setup Time
TDVWH
TDVE1H
TDVE2L
VCC = 4.5V and
5.5V
9, 10, 11
-55
o
C
T
A
+125
o
C
60
-
60
-
80
-
ns
HM-65642/883
6-223
Data Hold Time
TWHDX
VCC = 4.5V and
5.5V
9, 10, 11
-55
o
C
T
A
+125
o
C
5
-
5
-
5
-
ns
TE1HDX
VCC = 4.5V and
5.5V
9, 10, 11
-55
o
C
T
A
+125
o
C
10
-
10
-
10
-
ns
TE2LDX
VCC = 4.5V and
5.5V
9, 10, 11
-55
o
C
T
A
+125
o
C
10
-
10
-
10
-
ns
NOTES:
1. All voltages referenced to device GND.
2. AC measurements assume transition time
5ns; input levels = 0.0V to 3.0V; timing reference levels = 1.5V; output load = 1TTL equivalent
load and CL
50pF, for CL > 50pF, access times are derated 0.15ns/pF.
TABLE 3. HM-65642/883 ELECTRICAL PERFORMANCE SPECIFICATIONS
PARAMETER
SYMBOL
CONDITIONS
NOTES
TEMPERATURE
LIMITS
MIN
MAX
UNITS
Output High Voltage
VOH2
VCC = 4.5V, IO = -100
A
1
-55
o
C
T
A
+125
o
C
VCC -0.4
-
V
Input Capacitance
CIN
VCC = Open, f = 1MHz, All
Measurements Refer-
enced to Device Ground
1, 2
T
A
= +25
o
C
-
12
pF
VCC = Open, f = 1MHz, All
Measurements Refer-
enced to Device Ground
1, 3
T
A
= +25
o
C
-
10
pF
I/O Capacitance
CI/O
VCC = Open, f = 1MHz, All
Measurements Refer-
enced to Device Ground
1, 2
T
A
= +25
o
C
-
14
pF
VCC = 4.5V, VI/O = GND
or VCC, All Measurements
Referenced to Device
Ground
1, 3
T
A
= +25
o
C
-
12
pF
Write Enable to Output in High Z
TWLQZ
VCC = 4.5V and 5.5V
1
-55
o
C
T
A
+125
o
C
-
50
ns
Write Enable High to Output ON
TWHQX
VCC = 4.5V and 5.5V
1
-55
o
C
T
A
+125
o
C
5
-
ns
Chip Enable to Output ON
TE1LQX
TE2HQX
VCC = 4.5V and 5.5V
1
-55
o
C
T
A
+125
o
C
10
-
ns
Output Enable to Output ON
TGLQX
VCC = 4.5V and 5.5V
1
-55
o
C
T
A
+125
o
C
5
-
ns
Chip Enable to Output in High Z
TE1HQZ
VCC = 4.5V and 5.5V
1
-55
o
C
T
A
+125
o
C
-
50
ns
TE2LQZ
1
-55
o
C
T
A
+125
o
C
-
60
ns
Output Disable to Output in High Z
TGHQZ
VCC = 4.5V and 5.5V
1
-55
o
C
T
A
+125
o
C
-
50
ns
Output Hold from Address
Change
TAXQX
VCC = 4.5V and 5.5V
1
-55
o
C
T
A
+125
o
C
10
-
ns
NOTES:
1. The parameters listed in Table 3 are controlled via design or process parameters and are not directly tested. These parameters are char-
acterized upon initial design release and upon design changes which would affect these characteristics.
2. Applies to DIP device types only. For design purposes CIN = 6pF typical and CI/O = 7pF typical.
3. Applies to LCC device types only. For design purposes CIN = 4pF typical and CI/O = 5pF typical.
TABLE 2. HM-65642/883 AC ELECTRICAL PERFORMANCE SPECIFICATIONS (Continued)
PARAMETERS
SYMBOL
(NOTES 1, 2)
CONDITIONS
GROUP A
SUB-
GROUPS
TEMPERATURE
LIMITS
UNITS
HM-
65642B/883
HM-
65642/883
HM-
65642C/883
MIN
MAX
MIN
MAX
MIN
MAX
HM-65642/883
6-224
TABLE 4. APPLICABLE SUBGROUPS
CONFORMANCE GROUPS
GROUPS METHOD
SUBGROUPS
Interim Test 1
100%/5004
-
Interim Test
100%/5004
1, 7, 9
PDA
100%/5004
1
Final Test 1
100%/5004
2, 3, 8A, 8B, 10, 11
Group A
Samples/5005
1, 2, 3, 7, 8A, 8B, 9, 10, 11
Groups C and D
Samples/5005
1, 7, 9
HM-65642/883