1
TM
File Number
4845.2
CAUTION: These devices are sensitive to electrostatic discharge. Follow proper ESD Handling Procedures.
UltraFETTM is a trademark of Intersil Corporation. PSPICE is a registered trademark of MicroSim Corporation.
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Copyright
Intersil Corporation 2000
SABER is a Copyright of Analogy Inc.
HUF75542P3, HUF75542S3S
75A, 80V, 0.014 Ohm, N-Channel,
UltraFET Power MOSFETs
Packaging
Symbol
Features
Ultra Low On-Resistance
- r
DS(ON)
= 0.014
,
V
GS
=
10V
Simulation Models
- Temperature Compensated PSPICE and SABER
Electrical Models
- Spice and SABER
Thermal Impedance Models
- www.intersil.com
Peak Current vs Pulse Width Curve
UIS Rating Curve
JEDEC TO-220AB
JEDEC TO-263AB
DRAIN (FLANGE)
DRAIN
SOURCE
GATE
HUF75542P3
HUF75542S3S
GATE
SOURCE
DRAIN
(FLANGE)
D
G
S
Ordering Information
PART NUMBER
PACKAGE
BRAND
HUF75542P3
TO-220AB
75542P
HUF75542S3S
TO-263AB
75542S
NOTE: When ordering, use the entire part number. Add the suffix T
to obtain the variant in tape and reel, e.g., HUF75542S3ST.
Absolute Maximum Ratings
T
C
= 25
o
C, Unless Otherwise Specified
HUF75542P3, HUF75542S3S
UNITS
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DSS
80
V
Drain to Gate Voltage (R
GS
= 20k
) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DGR
80
V
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
GS
20
V
Drain Current
Continuous (T
C
= 25
o
C, V
GS
= 10V) (Figure 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
D
Continuous (T
C
= 100
o
C, V
GS
= 10V) (Figure 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
D
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I
DM
75
58
Figure 4
A
A
Pulsed Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .UIS
Figures 6, 14, 15
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
D
Derate Above 25
o
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
230
1.54
W
W/
o
C
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
J
, T
STG
-55 to 175
o
C
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T
L
Package Body for 10s, See Techbrief TB334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
pkg
300
260
o
C
o
C
NOTE:
1. T
J
= 25
o
C to 150
o
C.
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Data Sheet
June 2000
2
Electrical Specifications
T
C
= 25
o
C, Unless Otherwise Specified
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
OFF STATE SPECIFICATIONS
Drain to Source Breakdown Voltage
BV
DSS
I
D
= 250
A, V
GS
= 0V (Figure 11)
80
-
-
V
Zero Gate Voltage Drain Current
I
DSS
V
DS
= 75V, V
GS
= 0V
-
-
1
A
V
DS
= 70V, V
GS
= 0V, T
C
= 150
o
C
-
-
250
A
Gate to Source Leakage Current
I
GSS
V
GS
=
20V
-
-
100
nA
ON STATE SPECIFICATIONS
Gate to Source Threshold Voltage
V
GS(TH)
V
GS
= V
DS
, I
D
= 250
A (Figure 10)
2
-
4
V
Drain to Source On Resistance
r
DS(ON)
I
D
= 75A, V
GS
= 10V (Figure 9)
-
0.012
0.014
THERMAL SPECIFICATIONS
Thermal Resistance Junction to Case
R
JC
TO-220 and TO-263
-
-
0.65
o
C/W
Thermal Resistance Junction to
Ambient
R
JA
-
-
62
o
C/W
SWITCHING SPECIFICATIONS (V
GS
= 10V)
Turn-On Time
t
ON
V
DD
= 40V, I
D
= 75A
V
GS
=
10V,
R
GS
= 3.9
(Figures 18, 19)
-
-
195
ns
Turn-On Delay Time
t
d(ON)
-
12.5
-
ns
Rise Time
t
r
-
117
-
ns
Turn-Off Delay Time
t
d(OFF)
-
50
-
ns
Fall Time
t
f
-
80
-
ns
Turn-Off Time
t
OFF
-
-
195
ns
GATE CHARGE SPECIFICATIONS
Total Gate Charge
Q
g(TOT)
V
GS
= 0V to 20V
V
DD
= 40V,
I
D
= 75A,
I
g(REF)
= 1.0mA
(Figures 13, 16, 17)
-
150
180
nC
Gate Charge at 10V
Q
g(10)
V
GS
= 0V to 10V
-
80
96
nC
Threshold Gate Charge
Q
g(TH)
V
GS
= 0V to 2V
-
5.7
7
nC
Gate to Source Gate Charge
Q
gs
-
15
-
nC
Gate to Drain "Miller" Charge
Q
gd
-
33
-
nC
CAPACITANCE SPECIFICATIONS
Input Capacitance
C
ISS
V
DS
= 25V, V
GS
= 0V,
f = 1MHz
(Figure 12)
-
2750
-
pF
Output Capacitance
C
OSS
-
700
-
pF
Reverse Transfer Capacitance
C
RSS
-
250
-
pF
Source to Drain Diode Specifications
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Source to Drain Diode Voltage
V
SD
I
SD
= 75A
-
-
1.25
V
I
SD
= 37.5A
-
-
1.00
V
Reverse Recovery Time
t
rr
I
SD
= 75A, dI
SD
/dt = 100A/
s
-
-
102
ns
Reverse Recovered Charge
Q
RR
I
SD
= 75A, dI
SD
/dt = 100A/
s
-
-
255
nC
HUF75542P3, HUF75542S3S
3
Typical Performance Curves
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
FIGURE 4. PEAK CURRENT CAPABILITY
T
C
, CASE TEMPERATURE (
o
C)
PO
WER DISSIP
A
TION MUL
TIPLIER
0
0
25
50
75
100
175
0.2
0.4
0.6
0.8
1.0
1.2
125
150
0
20
40
60
80
25
50
75
100
125
150
175
I
D
, DRAIN CURRENT (A)
T
C
, CASE TEMPERATURE (
o
C)
V
GS
= 10V
0.1
1
2
10
-4
10
-3
10
-2
10
-1
10
0
10
1
0.01
10
-5
t, RECTANGULAR PULSE DURATION (s)
Z
JC
, NORMALIZED
THERMAL IMPED
ANCE
SINGLE PULSE
NOTES:
DUTY FACTOR: D = t
1
/t
2
PEAK T
J
= P
DM
x Z
JC
x R
JC
+ T
C
DUTY CYCLE - DESCENDING ORDER
0.5
0.2
0.1
0.05
0.01
0.02
P
DM
t
1
t
2
100
1000
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
1
50
I
DM
, PEAK CURRENT (A)
t, PULSE WIDTH (s)
TRANSCONDUCTANCE
MAY LIMIT CURRENT
IN THIS REGION
I = I
25
175 - T
C
150
FOR TEMPERATURES
ABOVE 25
o
C DERATE PEAK
CURRENT AS FOLLOWS:
V
GS
= 10V
T
C
= 25
o
C
HUF75542P3, HUF75542S3S
4
FIGURE 5. FORWARD BIAS SAFE OPERATING AREA
NOTE: Refer to Intersil Application Notes AN9321 and AN9322.
FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING
CAPABILITY
FIGURE 7. TRANSFER CHARACTERISTICS
FIGURE 8. SATURATION CHARACTERISTICS
FIGURE 9. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
FIGURE 10. NORMALIZED GATE THRESHOLD VOLTAGE vs
JUNCTION TEMPERATURE
Typical Performance Curves
(Continued)
1
10
100
1
10
100
200
500
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
I
D
, DRAIN CURRENT (A)
T
J
= MAX RATED
T
C
= 25
o
C
SINGLE PULSE
100
s
10ms
1ms
LIMITED BY r
DS(ON)
AREA MAY BE
OPERATION IN THIS
10
100
1000
0.001
0.1
1
10
0.01
I
AS
, A
V
ALANCHE CURRENT (A)
t
AV
, TIME IN AVALANCHE (ms)
STARTING T
J
= 25
o
C
STARTING T
J
= 150
o
C
t
AV
= (L)(I
AS
)/(1.3*RATED BV
DSS
- V
DD
)
If R = 0
If R
0
t
AV
= (L/R)ln[(I
AS
*R)/(1.3*RATED BV
DSS
- V
DD
) +1]
0
30
60
90
120
150
2
3
4
5
6
I
D
, DRAIN CURRENT (A)
V
GS
, GATE TO SOURCE VOLTAGE (V)
PULSE DURATION = 80
s
DUTY CYCLE = 0.5% MAX
V
DD
= 15V
T
J
= 175
o
C
T
J
= 25
o
C
T
J
= -55
o
C
0
30
60
90
120
150
0
1
2
3
4
I
D
, DRAIN CURRENT (A)
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
V
GS
= 5V
PULSE DURATION = 80
s
DUTY CYCLE = 0.5% MAX
T
C
= 25
o
C
V
GS
= 6V
V
GS
= 20V
V
GS
= 10V
V
GS
= 7V
0.5
1.0
1.5
2.0
2.5
-80
-40
0
40
80
120
160
200
NORMALIZED DRAIN T
O
SOURCE
T
J
, JUNCTION TEMPERATURE (
o
C)
ON RESIST
ANCE
V
GS
= 10V, I
D
= 75A
PULSE DURATION = 80
s
DUTY CYCLE = 0.5% MAX
0.4
0.6
0.8
1.0
1.2
-80
-40
0
40
80
120
160
200
NORMALIZED GA
TE
T
J
, JUNCTION TEMPERATURE (
o
C)
V
GS
= V
DS
, I
D
= 250
A
THRESHOLD V
O
L
T
A
G
E
HUF75542P3, HUF75542S3S
5
FIGURE 11. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
FIGURE 12. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
NOTE: Refer to Intersil Application Notes AN7254 and AN7260.
FIGURE 13. GATE CHARGE WAVEFORMS FOR CONSTANT GATE CURRENT
Typical Performance Curves
(Continued)
0.8
0.9
1.0
1.1
1.2
-80
-40
0
40
80
120
160
200
T
J
, JUNCTION TEMPERATURE (
o
C)
NORMALIZED DRAIN T
O
SOURCE
BREAKDO
WN V
O
L
T
A
G
E
I
D
= 250
A
100
1000
10000
0.1
1
10
80
C, CAP
A
CIT
ANCE (pF)
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
V
GS
= 0V, f = 1MHz
C
ISS
=
C
GS
+ C
GD
C
RSS
=
C
GD
C
OSS
C
DS
+ C
GD
0
2
4
6
8
10
0
20
40
60
80
100
V
GS
, GA
TE T
O
SOURCE V
O
L
T
A
GE (V)
V
DD
= 40V
Q
g
, GATE CHARGE (nC)
I
D
= 75A
I
D
= 50A
WAVEFORMS IN
DESCENDING ORDER:
I
D
= 25A
Test Circuits and Waveforms
FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 15. UNCLAMPED ENERGY WAVEFORMS
t
P
V
GS
0.01
L
I
AS
+
-
V
DS
V
DD
R
G
DUT
VARY t
P
TO OBTAIN
REQUIRED PEAK I
AS
0V
V
DD
V
DS
BV
DSS
t
P
I
AS
t
AV
0
HUF75542P3, HUF75542S3S
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