1
ICL3224, ICL3226, ICL3238, ICL3244
1 Microamp, +3V to +5.5V, 250kbps,
RS-232 Transceivers with Enhanced
Automatic Powerdown
The Intersil ICL32XX devices are 3.0V to 5.5V powered
RS-232 transmitters/receivers which meet ElA/TIA-232 and
V.28/V.24 specifications, even at V
CC
= 3.0V. Targeted
applications are PDAs, Palmtops, and notebook and laptop
computers where the low operational, and even lower
standby, power consumption is critical. Efficient on-chip
charge pumps, coupled with manual and enhanced
automatic powerdown functions, reduce the standby supply
current to a 1
A trickle. Small footprint packaging, and the
use of small, low value capacitors ensure board space
savings as well. Data rates greater than 250kbps are
guaranteed at worst case load conditions. This family is fully
compatible with 3.3V only systems, mixed 3.3V and 5.0V
systems, and 5.0V only systems.
The ICL3244 is a 3 driver, 5 receiver device that provides a
complete serial port suitable for laptop or notebook
computers. The ICL3244/38 also include a noninverting
always-active receiver for RING INDICATOR monitoring.
These devices feature an enhanced automatic
powerdown function which powers down the on-chip power-
supply and driver circuits. This occurs when all receiver and
transmitter inputs detect no signal transitions for a period of
30sec. These devices power back up, automatically,
whenever they sense a transition on any transmitter or
receiver input.
Table 1 summarizes the features of the devices represented
by this data sheet, while Application Note AN9863
summarizes the features of each device comprising the
ICL32XX 3V family.
Features
15kV ESD Protected (Human Body Model)
Manual and Enhanced Automatic Powerdown Features
Drop in Replacements for MAX3224, MAX3226,
MAX3238, MAX3244
Meets EIA/TIA-232 and V.28/V.24 Specifications at 3V
Latch-Up Free
RS-232 Compatible with V
CC
= 2.7V
On-Chip Voltage Converters Require Only Four External
0.1
F Capacitors
Flow-Through Pinout (ICL3238)
Guaranteed Mouse Driveability (ICL3244)
"Ready to Transmit" Indicator Output (ICL3224/26)
Receiver Hysteresis For Improved Noise Immunity
Guaranteed Minimum Data Rate . . . . . . . . . . . . . 250kbps
Guaranteed Minimum Slew Rate . . . . . . . . . . . . . . . 6V/
s
Wide Power Supply Range . . . . . . . Single +3V to +5.5V
Low Supply Current in Powerdown State. . . . . . . . . . .1
A
Applications
Any System Requiring RS-232 Communication Ports
- Battery Powered, Hand-Held, and Portable Equipment
- Laptop Computers, Notebooks, Palmtops
- Modems, Printers and other Peripherals
- Digital Cameras
- Cellular/Mobile Phones
- Data Cradles
Related Literature
Technical Brief TB363 "Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)"
AN9863, "3V to +5.5V, 250k-1Mbps, RS-232
Transmitters/Receivers"
TABLE 1. SUMMARY OF FEATURES
PART
NUMBER
NO. OF
Tx.
NO. OF
Rx.
NO. OF
MONITOR Rx.
(R
OUTB
)
DATA
RATE
(kbps)
Rx. ENABLE
FUNCTION?
READY
OUTPUT?
MANUAL
POWER-
DOWN?
ENHANCED
AUTOMATIC
POWERDOWN
ICL3224
2
2
0
250
NO
YES
YES
YES
ICL3226
1
1
0
250
NO
YES
YES
YES
ICL3238
5
3
1
250
NO
NO
YES
YES
ICL3244
3
5
1
250
NO
NO
YES
YES
Data Sheet
November 2002
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2002. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
FN4876.6
2
Ordering Information
(NOTE 1)
PART NO.
TEMP.
RANGE (
o
C)
PACKAGE
PKG. NO.
ICL3224CA
0 to 70
20 Ld SSOP
M20.209
ICL3224IA
-40 to 85
20 Ld SSOP
M20.209
ICL3224CP
0 to 70
20 Ld PDIP
E20.3
ICL3226CA
0 to 70
16 Ld SSOP
M16.209
ICL3226IA
-40 to 85
16 Ld SSOP
M16.209
ICL3238CA
0 to 70
28 Ld SSOP
M28.209
ICL3238IA
-40 to 85
28 Ld SSOP
M28.209
ICL3244CA
0 to 70
28 Ld SSOP
M28.209
ICL3244IA
-40 to 85
28 Ld SSOP
M28.209
ICL3244CB
0 to 70
28 Ld SOIC
M28.3
ICL3244IB
-40 to 85
28 Ld SOIC
M28.3
ICL3244CV
0 to 70
28 Ld TSSOP
M28.173
ICL3244IV
-40 to 85
28 Ld TSSOP
M28.173
NOTE:
1. Most surface mount devices are available on tape and reel; add
"-T" to suffix.
Ordering Information
(Continued)
(NOTE 1)
PART NO.
TEMP.
RANGE (
o
C)
PACKAGE
PKG. NO.
Pinouts
ICL3224 (PDIP, SSOP)
TOP VIEW
ICL3226 (SSOP)
TOP VIEW
ICL3238 (SSOP)
TOP VIEW
ICL3244 (SOIC, SSOP, TSSOP)
TOP VIEW
READY
C1+
V+
C1-
C2+
C2-
V-
T2
OUT
R2
IN
FORCEOFF
GND
T1
OUT
R1
IN
R1
OUT
T1
IN
INVALID
V
CC
FORCEON
T2
IN
20
19
18
17
16
15
14
13
12
11
1
2
3
4
5
6
7
8
9
10
R2
OUT
READY
C1+
V+
C1-
C2+
C2-
V-
R1
IN
FORCEOFF
GND
T1
OUT
FORCEON
T1
IN
R1
OUT
V
CC
INVALID
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
C2+
C2-
V-
R1
IN
R2
IN
R3
IN
R4
IN
R5
IN
T1
OUT
T3
OUT
T3
IN
T2
IN
T1
IN
C1+
V
CC
GND
C1-
FORCEON
INVALID
R1
OUT
R2
OUT
R3
OUT
R4
OUT
R5
OUT
V+
FORCEOFF
R2
OUTB
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
T2
OUT
C2+
GND
C2-
V-
T1
OUT
T2
OUT
T3
OUT
R1
IN
R2
IN
R3
IN
T5
OUT
FORCEON
FORCEOFF
C1+
V
CC
C1-
T1
IN
T2
IN
R1
OUT
T4
IN
R3
OUT
T5
IN
R1
OUTB
INVALID
V+
T3
IN
R2
OUT
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
T4
OUT
ICL3224, ICL3226, ICL3238, ICL3244
3
Pin Descriptions
PIN
FUNCTION
V
CC
System power supply input (3.0V to 5.5V).
V+
Internally generated positive transmitter supply (+5.5V).
V-
Internally generated negative transmitter supply (-5.5V).
GND
Ground connection.
C1+
External capacitor (voltage doubler) is connected to this lead.
C1-
External capacitor (voltage doubler) is connected to this lead.
C2+
External capacitor (voltage inverter) is connected to this lead.
C2-
External capacitor (voltage inverter) is connected to this lead.
T
IN
TTL/CMOS compatible transmitter Inputs.
T
OUT
RS-232 level (nominally
5.5V) transmitter outputs.
R
IN
RS-232 compatible receiver inputs.
R
OUT
TTL/CMOS level receiver outputs.
R
OUTB
TTL/CMOS level, noninverting, always enabled receiver outputs.
INVALID
Active low output that indicates if no valid RS-232 levels are present on any receiver input.
READY
Active high output that indicates when the ICL32XX is ready to transmit (i.e., V-
-4V)
FORCEOFF Active low to shut down transmitters and on-chip power supply. This overrides any automatic circuitry and FORCEON (see Table 2).
FORCEON Active high input to override automatic powerdown circuitry thereby keeping transmitters active. (FORCEOFF must be high).
Typical Operating Circuits
ICL3224
ICL3226
19
V
CC
T1
OUT
T2
OUT
T1
IN
T2
IN
T
1
T
2
0.1
F
+0.1
F
+
0.1
F
13
12
17
8
2
4
3
7
V+
V-
C1+
C1-
C2+
C2-
+
0.1
F
5
6
R1
OUT
R1
IN
16
5k
R2
OUT
R2
IN
9
10
5k
15
C
1
C
2
+ C
3
C
4
READY
1
GND
+3.3V
+ 0.1
F
18
TTL/CMOS
LOGIC
RS-232
LEVELS
R
1
R
2
FORCEON
FORCEOFF
14
20
V
CC
11
INVALID
TO POWER
CONTROL
LEVELS
LOGIC
15
V
CC
T1
OUT
T1
IN
T
1
0.1
F
+0.1
F
+
0.1
F
11
13
2
4
3
7
V+
V-
C1+
C1-
C2+
C2-
+
0.1
F
5
6
R1
OUT
R1
IN
R
1
8
9
5k
C
1
C
2
+ C
3
C
4
READY
1
GND
+3.3V
+
0.1
F
14
TTL/CMOS
LOGIC
RS-232
LEVELS
FORCEON
FORCEOFF
12
16
V
CC
10
INVALID
TO POWER
CONTROL
LOGIC
LEVELS
ICL3224, ICL3226, ICL3238, ICL3244
4
ICL3238
NOTES:
2. THE NEGATIVE TERMINAL OF C
3
CAN BE CONNECTED TO EITHER
V
CC
OR GND.
3. FOR V
CC
= 3.15V (3.3V -5%), USE C
1
- C
4
= 0.1
F OR GREATER. FOR
V
CC
= 3.0V (3.3V -10%), USE C
1
- C
4
= 0.22
F.
ICL3244
Typical Operating Circuits
(Continued)
26
V
CC
T1
OUT
T2
OUT
T3
OUT
T1
IN
T2
IN
T3
IN
T
1
T
2
T
3
0.1
F
+
0.1
F
+
0.1
F
24
23
5
6
22
7
28
25
27
4
V+
V-
C1+
C1-
C2+
C2-
+
0.1
F
1
3
R1
OUT
R1
IN
8
5k
R2
OUT
R2
IN
9
20
5k
R3
OUT
R3
IN
11
18
5k
21
R1
OUTB
C
1
C
2
+ C
3
C
4
FORCEON
FORCEOFF
13
GND
14
+3.3V
+
0.1
F
16
2
V
CC
TTL/CMOS
LOGIC
RS-232
LEVELS
RS-232
LEVELS
R
1
R
2
R
3
15
INVALID
TO POWER
CONTROL
+
C
3
(OPTIONAL
T4
OUT
T5
OUT
T4
IN
T5
IN
T
3
T
4
19
10
17
12
LEVELS
LOGIC
CONNECTION, NOTE 2)
NOTE 3
NOTE 3
26
V
CC
T1
OUT
T2
OUT
T3
OUT
T1
IN
T2
IN
T3
IN
T
1
T
2
T
3
0.1
F
+
0.1
F
+
0.1
F
14
13
9
10
12
11
28
24
27
3
V+
V-
C1+
C1-
C2+
C2-
+
0.1
F
1
2
R1
OUT
R1
IN
4
5k
R2
OUT
R2
IN
5
18
5k
R3
OUT
R3
IN
6
17
5k
R4
OUT
R4
IN
7
16
5k
R5
OUT
R5
IN
R
5
8
15
5k
19
R2
OUTB
C
1
C
2
+ C
3
C
4
FORCEON
FORCEOFF
23
GND
22
+3.3V
+
0.1
F
20
25
V
CC
TTL/CMOS
LOGIC
RS-232
LEVELS
RS-232
LEVELS
R
1
R
2
R
3
R
4
21
INVALID
TO POWER
CONTROL LOGIC
LEVELS
ICL3224, ICL3226, ICL3238, ICL3244
5
Absolute Maximum Ratings
Thermal Information
V
CC
to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6V
V+ to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V
V- to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3V to -7V
V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14V
Input Voltages
T
IN
, FORCEOFF, FORCEON . . . . . . . . . . . . . . . . . . -0.3V to 6V
R
IN
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
25V
Output Voltages
T
OUT
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13.2V
R
OUT
, INVALID, READY . . . . . . . . . . . . . . . . -0.3V to V
CC
+0.3V
Short Circuit Duration
T
OUT
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . See Specification Table
Operating Conditions
Temperature Range
ICL32XXC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0
o
C to 70
o
C
ICL32XXI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40
o
C to 85
o
C
Thermal Resistance (Typical, Note 4)
JA
(
o
C/W)
20 Ld PDIP Package . . . . . . . . . . . . . . . . . . . . . . . .
80
28 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . .
75
16 Ld SSOP Package . . . . . . . . . . . . . . . . . . . . . . .
140
20 Ld SSOP Package . . . . . . . . . . . . . . . . . . . . . . .
125
28 Ld SSOP and TSSOP Packages . . . . . . . . . . . .
100
Moisture Sensitivity (see Technical Brief TB363)
All Packages Not Listed Below . . . . . . . . . . . . . . . . . . . . . Level 1
16 Ld SSOP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . Level 2
Maximum Junction Temperature (Plastic Package) . . . . . . . 150
o
C
Maximum Storage Temperature Range . . . . . . . . . -65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300
o
C
(SOIC, SSOP, TSSOP - Lead Tips Only)
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
4.
JA
is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications
Test Conditions: V
CC
= 3V to 5.5V, C
1
- C
4
= 0.1
F (ICL3238: C
1
- C
4
= 0.22
F @ V
CC
= 3V); Unless
Otherwise Specified. Typicals are at T
A
= 25
o
C
PARAMETER
TEST CONDITIONS
TEMP
(
o
C)
MIN
TYP
MAX
UNITS
DC CHARACTERISTICS
Supply Current, Automatic
Powerdown
All R
IN
Open, FORCEON = GND, FORCEOFF = V
CC
25
-
1.0
10
A
Supply Current, Powerdown
FORCEOFF = GND
25
-
1.0
10
A
Supply Current,
Automatic Powerdown Disabled
All Outputs Unloaded, FORCEON
= FORCEOFF = V
CC
ICL3244, V
CC
= 3V
25
-
0.3
1.0
mA
All Others, V
CC
= 3.15V
25
-
0.3
1.0
mA
LOGIC AND TRANSMITTER INPUTS AND RECEIVER OUTPUTS
Input Logic Threshold Low
T
IN
, FORCEON, FORCEOFF
Full
-
-
0.8
V
Input Logic Threshold High
T
IN
, FORCEON, FORCEOFF
V
CC
= 3.3V
Full
2.0
-
-
V
V
CC
= 5.0V
Full
2.4
-
-
V
Transmitter Input Hysteresis
25
-
0.5
-
V
Input Leakage Current
T
IN
, FORCEON, FORCEOFF
Full
-
0.01
1.0
A
Output Leakage Current
FORCEOFF = GND
Full
-
0.05
10
A
Output Voltage Low
I
OUT
= 1.6mA
Full
-
-
0.4
V
Output Voltage High
I
OUT
= -1.0mA
Full
V
CC
-0.6 V
CC
-0.1
-
V
RECEIVER INPUTS
Input Voltage Range
Full
-25
-
25
V
Input Threshold Low
V
CC
= 3.3V
25
0.6
1.2
-
V
V
CC
= 5.0V
25
0.8
1.5
-
V
Input Threshold High
V
CC
= 3.3V
25
-
1.5
2.4
V
V
CC
= 5.0V
25
-
1.8
2.4
V
Input Hysteresis
25
-
0.5
-
V
Input Resistance
25
3
5
7
k
TRANSMITTER OUTPUTS
Output Voltage Swing
All Transmitter Outputs Loaded with 3k
to Ground
Full
5.0
5.4
-
V
ICL3224, ICL3226, ICL3238, ICL3244
6
Output Resistance
V
CC
= V+ = V- = 0V, Transmitter Output =
2V
Full
300
10M
-
Output Short-Circuit Current
Full
-
35
60
mA
Output Leakage Current
V
OUT
=
12V, V
CC
= 0V or 3V to 5.5V,
Automatic Powerdown or FORCEOFF = GND
Full
-
-
25
A
MOUSE DRIVEABILITY (ICL3244 Only)
Transmitter Output Voltage
(See Figure 11)
T1
IN
= T2
IN
= GND, T3
IN
= V
CC
, T3
OUT
Loaded with 3k
to
GND, T1
OUT
and T2
OUT
Loaded with 2.5mA Each
Full
5
-
-
V
ENHANCED AUTOMATIC POWERDOWN (FORCEON = GND, FORCEOFF = V
CC
)
Receiver Input Thresholds to
INVALID High
See Figure 6
Full
-2.7
-
2.7
V
Receiver Input Thresholds to
INVALID Low
See Figure 6
Full
-0.3
-
0.3
V
INVALID, READY Output Voltage
Low
I
OUT
= 1.6mA
Full
-
-
0.4
V
INVALID, READY Output Voltage
High
I
OUT
= -1.0mA
Full
V
CC
-0.6
-
-
V
Receiver Positive or Negative
Threshold to INVALID High Delay
(t
INVH
)
ICL3238
25
-
0.1
-
s
All Others
25
-
1
-
s
Receiver Positive or Negative
Threshold to INVALID Low Delay
(t
INVL
)
ICL3238
25
-
50
-
s
All Others
25
-
30
-
s
Receiver or Transmitter Edge to
Transmitters Enabled Delay (t
WU
)
ICL3238, Note 5
25
-
25
-
s
All Others, Note 5
25
-
100
-
s
Receiver or Transmitter Edge to
Transmitters Disabled Delay
(t
AUTOPWDN
)
Note 5
Full
15
30
60
sec
TIMING CHARACTERISTICS
Maximum Data Rate
R
L
= 3k
,
C
L
= 1000pF, One Transmitter Switching
Full
250
500
-
kbps
Receiver Propagation Delay
Receiver Input to Receiver
Output, C
L
= 150pF
t
PHL
25
-
0.15
-
s
t
PLH
25
-
0.15
-
s
Receiver Output Enable Time
Normal Operation (ICL3238/44 Only)
25
-
200
-
ns
Receiver Output Disable Time
Normal Operation (ICL3238/44 Only)
25
-
200
-
ns
Transmitter Skew
t
PHL
- t
PLH
25
-
100
-
ns
Receiver Skew
t
PHL
- t
PLH
25
-
50
-
ns
Transition Region Slew Rate
V
CC
= 3.3V,
R
L
= 3k
to 7k
,
Measured From 3V to -3V or -3V
to 3V
C
L
= 150pF to 1000pF
25
6
-
30
V/
s
C
L
= 150pF to 2500pF
25
4
8
30
V/
s
ESD PERFORMANCE
RS-232 Pins (T
OUT
, R
IN
)
Human Body Model
25
-
15
-
kV
IEC1000-4-2 Contact Discharge
25
-
8
-
kV
IEC1000-4-2 Air Gap Discharge
25
-
10
-
kV
All Other Pins
Human Body Model
25
-
2.5
-
kV
NOTE:
5. An "edge" is defined as a transition through the transmitter or receiver input thresholds.
Electrical Specifications
Test Conditions: V
CC
= 3V to 5.5V, C
1
- C
4
= 0.1
F (ICL3238: C
1
- C
4
= 0.22
F @ V
CC
= 3V); Unless
Otherwise Specified. Typicals are at T
A
= 25
o
C (Continued)
PARAMETER
TEST CONDITIONS
TEMP
(
o
C)
MIN
TYP
MAX
UNITS
ICL3224, ICL3226, ICL3238, ICL3244
7
Detailed Description
These ICL32XX interface ICs operate from a single +3V to
+5.5V supply, guarantee a 250kbps minimum data rate,
require only four small external 0.1
F capacitors, feature low
power consumption, and meet all ElA RS-232C and V.28
specifications. The circuit is divided into three sections: The
charge pump, the transmitters, and the receivers.
Charge-Pump
Intersil's new ICL32XX family utilizes regulated on-chip dual
charge pumps as voltage doublers, and voltage inverters to
generate
5.5V transmitter supplies from a V
CC
supply as
low as 3.0V. This allows these devices to maintain RS-232
compliant output levels over the
10% tolerance range of
3.3V powered systems. The efficient on-chip power supplies
require only four small, external 0.1
F capacitors for the
voltage doubler and inverter functions at V
CC
= 3.3V. See
the "Capacitor Selection" section, and Table 3 for capacitor
recommendations for other operating conditions. The charge
pumps operate discontinuously (i.e., they turn off as soon as
the V+ and V- supplies are pumped up to the nominal
values), resulting in significant power savings.
Transmitters
The transmitters are proprietary, low dropout, inverting
drivers that translate TTL/CMOS inputs to EIA/TIA-232
output levels. Coupled with the on-chip
5.5V supplies,
these transmitters deliver true RS-232 levels over a wide
range of single supply system voltages.
Transmitter outputs disable and assume a high impedance
state when the device enters the powerdown mode (see
Table 2). These outputs may be driven to
12V when
disabled.
All devices guarantee a 250kbps data rate for full load
conditions (3k
and 1000pF), V
CC
3.0V, with one
transmitter operating at full speed. Under more typical
conditions of V
CC
3.3V, R
L
= 3k
, and C
L
= 250pF, one
transmitter easily operates at 1Mbps.
Transmitter inputs float if left unconnected, and may cause
I
CC
increases. Connect unused inputs to GND for the best
performance.
Receivers
All the ICL32XX devices contain standard inverting
receivers, but only the ICL3238 and ICL3244 receivers can
tristate, via the FORCEOFF control line. Additionally, the
ICL3238 and ICL3244 include a noninverting (monitor)
receiver (denoted by the R
OUTB
label) that is always active,
regardless of the state of any control lines. Both receiver
types convert RS-232 signals to CMOS output levels and
accept inputs up to
25V while presenting the required 3k
to 7k
input impedance (see Figure 1) even if the power is
off (V
CC
= 0V). The receivers' Schmitt trigger input stage
uses hysteresis to increase noise immunity and decrease
errors due to slow input signal transitions.
The ICL3238 and ICL3244 inverting receivers disable during
forced (manual) powerdown, but not during automatic
powerdown (see Table 2). Conversely, the monitor receiver
remains active even during manual powerdown making it
extremely useful for Ring Indicator monitoring. Standard
receivers driving powered down peripherals must be
disabled to prevent current flow through the peripheral's
protection diodes (see Figures 2 and 3). This renders them
useless for wake up functions, but the corresponding
monitor receiver can be dedicated to this task as shown in
Figure 3.
Powerdown Functionality
This 3V family of RS-232 interface devices requires a
nominal supply current of 0.3mA during normal operation
R
XOUT
GND
V
ROUT
V
CC
5k
R
XIN
-25V
V
RIN
+25V
GND
V
CC
FIGURE 1. INVERTING RECEIVER CONNECTIONS
FIGURE 2. POWER DRAIN THROUGH POWERED DOWN
PERIPHERAL
OLD
V
CC
POWERED
GND
SHDN = GND
V
CC
Rx
Tx
V
CC
CURRENT
V
OUT
=
V
CC
FLOW
RS-232 CHIP
DOWN
UART
FIGURE 3. DISABLED RECEIVERS PREVENT POWER DRAIN
ICL3238/44
TRANSITION
R
X
T
X
R2
OUTB
R2
OUT
T1
IN
FORCEOFF = GND
V
CC
V
CC
TO
R2
IN
T1
OUT
V
OUT
=
HI-Z
POWERED
DETECTOR
DOWN
UART
WAKE-UP
LOGIC
ICL3224, ICL3226, ICL3238, ICL3244
8
(not in powerdown mode). This is considerably less than the
5mA to 11mA current required of 5V RS-232 devices. The
already low current requirement drops significantly when the
device enters powerdown mode. In powerdown, supply
current drops to 1
A, because the on-chip charge pump
turns off (V+ collapses to V
CC
, V- collapses to GND), and
the transmitter outputs tristate. Inverting receiver outputs
may or may not disable in powerdown; refer to Table 2 for
details. This micro-power mode makes these devices ideal
for battery powered and portable applications.
Software Controlled (Manual) Powerdown
These devices allow the user to force the IC into the low
power, standby state, and utilize a two pin approach where
the FORCEON and FORCEOFF inputs determine the IC's
mode. For always enabled operation, FORCEON and
FORCEOFF are both strapped high. To switch between
active and powerdown modes, under logic or software
control, only the FORCEOFF input need be driven. The
FORCEON state isn't critical, as FORCEOFF dominates
over FORCEON. Nevertheless, if strictly manual control over
powerdown is desired, the user must strap FORCEON high
to disable the enhanced automatic powerdown circuitry.
ICL3238 and ICL3244 inverting (standard) receiver outputs
also disable when the device is in powerdown, thereby
eliminating the possible current path through a shutdown
peripheral's input protection diode (see Figures 2 and 3).
Connecting FORCEOFF and FORCEON together disables
the enhanced automatic powerdown feature, enabling them
to function as a manual SHUTDOWN input (see Figure 4).
With any of the above control schemes, the time required to
exit powerdown, and resume transmission is only 100
s.
TABLE 2. POWERDOWN LOGIC TRUTH TABLE
RCVR OR
XMTR
EDGE
WITHIN 30
SEC?
FORCEOFF
INPUT
FORCEON
INPUT
TRANSMITTER
OUTPUTS
RECEIVER
OUTPUTS
(NOTE 6)
R
OUTB
OUTPUTS
RS-232
LEVEL
PRESENT
AT
RECEIVER
INPUT?
INVALID
OUTPUT
MODE OF OPERATION
ICL3224, ICL3226
NO
H
H
Active
Active
N.A.
NO
L
Normal Operation (Enhanced
Auto Powerdown Disabled)
NO
H
H
Active
Active
N.A.
YES
H
YES
H
L
Active
Active
N.A.
NO
L
Normal Operation (Enhanced
Auto Powerdown Enabled)
YES
H
L
Active
Active
N.A.
YES
H
NO
H
L
High-Z
Active
N.A.
NO
L
Powerdown Due to Enhanced
Auto Powerdown Logic
NO
H
L
High-Z
Active
N.A.
YES
H
X
L
X
High-Z
Active
N.A.
NO
L
Manual Powerdown
X
L
X
High-Z
Active
N.A.
YES
H
ICL322X - INVALID DRIVING FORCEON AND FORCEOFF (EMULATES AUTOMATIC POWERDOWN)
X
NOTE 7
NOTE 7
Active
Active
N.A.
YES
H
Normal Operation
X
NOTE 7
NOTE 7
High-Z
Active
N.A.
NO
L
Forced Auto Powerdown
ICL3238, ICL3244
NO
H
H
Active
Active
Active
NO
L
Normal Operation (Enhanced
Auto Powerdown Disabled)
NO
H
H
Active
Active
Active
YES
H
YES
H
L
Active
Active
Active
NO
L
Normal Operation (Enhanced
Auto Powerdown Enabled)
YES
H
L
Active
Active
Active
YES
H
NO
H
L
High-Z
Active
Active
NO
L
Powerdown Due to Enhanced
Auto Powerdown Logic
NO
H
L
High-Z
Active
Active
YES
H
X
L
X
High-Z
High-Z
Active
NO
L
Manual Powerdown
X
L
X
High-Z
High-Z
Active
YES
H
ICL3238, ICL3244 - INVALID DRIVING FORCEON AND FORCEOFF (EMULATES AUTOMATIC POWERDOWN)
X
NOTE 7
NOTE 7
Active
Active
Active
YES
H
Normal Operation
X
NOTE 7
NOTE 7
High-Z
High-Z
Active
NO
L
Forced Auto Powerdown
NOTES:
6. Applies only to the ICL3238 and ICL3244.
7. Input is connected to INVALID Output.
ICL3224, ICL3226, ICL3238, ICL3244
9
When using both manual and enhanced automatic powerdown
(FORCEON = 0), the ICL32XX won't power up from manual
powerdown until both FORCEOFF and FORCEON are driven
high, or until a transition occurs on a receiver or transmitter
input. Figure 5 illustrates a circuit for ensuring that the ICL32XX
powers up as soon as FORCEOFF switches high. The rising
edge of the Master Powerdown signal forces the device to
power up, and the ICL32XX returns to enhanced automatic
powerdown mode an RC time constant after this rising edge.
The time constant isn't critical, because the ICL32XX remains
powered up for 30 seconds after the FORCEON falling edge,
even if there are no signal transitions. This gives slow-to-wake
systems (e.g., a mouse) plenty of time to start transmitting, and
as long as it starts transmitting within 30 seconds both systems
remain enabled.
INVALID Output
The INVALID output always indicates (see Table 2) whether
or not 30
s have elapsed with invalid RS-232 signals (see
Figures 6 and 8) persisting on all of the receiver inputs, giving
the user an easy way to determine when the interface block
should power down. Invalid receiver levels occur whenever
the driving peripheral's outputs are shut off (powered down) or
when the RS-232 interface cable is disconnected. In the case
of a disconnected interface cable where all the receiver inputs
are floating (but pulled to GND by the internal receiver pull
down resistors), the INVALID logic detects the invalid levels
and drives the output low. The power management logic then
uses this indicator to power down the interface block.
Reconnecting the cable restores valid levels at the receiver
inputs, INVALID switches high, and the power management
logic wakes up the interface block. INVALID can also be used
to indicate the DTR or RING INDICATOR signal, as long as
the other receiver inputs are floating, or driven to GND (as in
the case of a powered down driver).
Enhanced Automatic Powerdown
Even greater power savings is available by using these
devices which feature an enhanced automatic powerdown
function. When the enhanced powerdown logic determines
that no transitions have occurred on any of the transmitter
nor receiver inputs for 30 seconds, the charge pump and
transmitters powerdown, thereby reducing supply current to
1
A. The ICL32XX automatically powers back up whenever
it detects a transition on one of these inputs. This automatic
powerdown feature provides additional system power
savings without changes to the existing operating system.
Enhanced automatic powerdown operates when the
FORCEON input is low, and the FORCEOFF input is high.
Tying FORCEON high disables automatic powerdown, but
manual powerdown is always available via the overriding
FORCEOFF input. Table 2 summarizes the enhanced
automatic powerdown functionality.
Figure 7 illustrates the enhanced powerdown control logic.
Note that once the ICL32XX enters powerdown (manually or
automatically), the 30 second timer remains timed out (set),
keeping the ICL32XX powered down until FORCEON
FIGURE 4. CONNECTIONS FOR MANUAL POWERDOWN
WHEN NO VALID RECEIVER SIGNALS ARE
PRESENT
PWR
FORCEOFF
INVALID
CPU
I/O
FORCEON
ICL32XX
MGT
LOGIC
UART
FIGURE 5. CIRCUIT TO ENSURE IMMEDIATE POWER UP
WHEN EXITING FORCED POWERDOWN
FORCEOFF
FORCEON
POWER
MASTER POWERDOWN LINE
1M
0.1
F
MANAGEMENT
UNIT
ICL32XX
FIGURE 6. DEFINITION OF VALID RS-232 RECEIVER LEVELS
0.3V
-0.3V
-2.7V
2.7V
INVALID LEVEL - INVALID = 0
VALID RS-232 LEVEL - INVALID = 1
VALID RS-232 LEVEL - INVALID = 1
INDETERMINATE
INDETERMINATE
FIGURE 7. ENHANCED AUTOMATIC POWERDOWN LOGIC
30sec
TIMER
S
R
FORCEOFF
AUTOSHDN
FORCEON
R_IN
T_IN
EDGE
DETECT
EDGE
DETECT
ICL3224, ICL3226, ICL3238, ICL3244
10
transitions high, or until a transition occurs on a receiver or
transmitter input.
The INVALID output signal switches low to indicate that
invalid levels have persisted on all of the receiver inputs for
more than 30
s (see Figure 8), but this has no direct effect
on the state of the ICL32XX (see the next sections for
methods of utilizing INVALID to power down the device).
INVALID switches high 1
s after detecting a valid RS-232
level on a receiver input. INVALID operates in all modes
(forced or automatic powerdown, or forced on), so it is also
useful for systems employing manual powerdown circuitry.
The time to recover from automatic powerdown mode is
typically 100
s.
Emulating Standard Automatic Powerdown
If enhanced automatic powerdown isn't desired, the user can
implement the standard automatic powerdown feature
(mimics the function on the ICL3221/23/43) by connecting
the INVALID output to the FORCEON and FORCEOFF
inputs, as shown in Figure 9. After 30
s of invalid receiver
levels, INVALID switches low and drives the ICL32XX into a
forced powerdown condition. INVALID switches high as
soon as a receiver input senses a valid RS-232 level, forcing
the ICL32XX to power on. See the "INVALID DRIVING
FORCEON AND FORCEOFF" section of Table 2 for an
operational summary. This operational mode is perfect for
handheld devices that communicate with another computer
via a detachable cable. Detaching the cable allows the
internal receiver pull-down resistors to pull the inputs to GND
(an invalid RS-232 level), causing the 30
s timer to time-out
and drive the IC into powerdown. Reconnecting the cable
restores valid levels, causing the IC to power back up.
Hybrid Automatic Powerdown Options
For devices which communicate only through a detachable
cable, connecting INVALID to FORCEOFF (with FORCEON
= 0) may be a desirable configuration. While the cable is
attached INVALID and FORCEOFF remain high, so the
enhanced automatic powerdown logic powers down the RS-
232 device whenever there is 30 seconds of inactivity on the
receiver and transmitter inputs. Detaching the cable allows
the receiver inputs to drop to an invalid level (GND), so
INVALID switches low and forces the RS-232 device to
power down. The ICL32XX remains powered down until the
cable is reconnected (INVALID = FORCEOFF = 1) and a
transition occurs on a receiver or transmitter input (see
Figure 7). For immediate power up when the cable is
RECEIVER
INPUTS
TRANSMITTER
OUTPUTS
INVALID
OUTPUT
V+
V
CC
0
V-
t
INVL
t
INVH
FIGURE 8. ENHANCED AUTOMATIC POWERDOWN, INVALID AND READY TIMING DIAGRAMS
READY
OUTPUT
TRANSMITTER
INPUTS
t
WU
t
AUTOPWDN
t
AUTOPWDN
t
WU
INVALID
REGION
}
FIGURE 9. CONNECTIONS FOR AUTOMATIC POWERDOWN
WHEN NO VALID RECEIVER SIGNALS ARE
PRESENT
F
O
RCEOF
F
INV
A
L
I
D
CPU
I/O
F
O
RCEON
ICL32XX
UART
ICL3224, ICL3226, ICL3238, ICL3244
11
reattached, connect FORCEON to FORCEOFF through a
network similar to that shown in Figure 5.
Ready Output (ICL3224 and ICL3226 only)
The Ready output indicates that the ICL322X is ready to
transmit. Ready switches low whenever the device enters
powerdown, and switches back high during power-up when
V- reaches -4V or lower.
Capacitor Selection
The charge pumps require 0.1
F capacitors for 3.3V
operation. For other supply voltages refer to Table 3 for
capacitor values. Do not use values smaller than those listed
in Table 3. Increasing the capacitor values (by a factor of 2)
reduces ripple on the transmitter outputs and slightly
reduces power consumption. C
2
, C
3
, and C
4
can be
increased without increasing C
1
's value, however, do not
increase C
1
without also increasing C
2
, C
3
, and C
4
to
maintain the proper ratios (C
1
to the other capacitors).
When using minimum required capacitor values, make sure
that capacitor values do not degrade excessively with
temperature. If in doubt, use capacitors with a larger nominal
value. The capacitor's equivalent series resistance (ESR)
usually rises at low temperatures and it influences the
amount of ripple on V+ and V-.
Power Supply Decoupling
In most circumstances a 0.1
F bypass capacitor is
adequate. In applications that are particularly sensitive to
power supply noise, decouple V
CC
to ground with a
capacitor of the same value as the charge-pump capacitor C
1
.
Connect the bypass capacitor as close as possible to the IC.
Transmitter Outputs when Exiting
Powerdown
Figure 10 shows the response of two transmitter outputs
when exiting powerdown mode. As they activate, the two
transmitter outputs properly go to opposite RS-232 levels,
with no glitching, ringing, nor undesirable transients. Each
transmitter is loaded with 3k
in parallel with 2500pF. Note
that the transmitters enable only when the magnitude of the
supplies exceed approximately 3V.
Operation Down to 2.7V
ICL32XX transmitter outputs meet RS-562 levels (
3.7V), at
the full data rate, with V
CC
as low as 2.7V. RS-562 levels
typically ensure interoperability with RS-232 devices.
Mouse Driveability
The ICL3244 is specifically designed to power a serial
mouse while operating from low voltage supplies. Figure 11
shows the transmitter output voltages under increasing load
current. The on-chip switching regulator ensures the
transmitters will supply at least
5V during worst case
conditions (15mA for paralleled V+ transmitters, 7.3mA for
single V- transmitter).
High Data Rates
The ICL32XX maintain the RS-232
5V minimum transmitter
output voltages even at high data rates. Figure 12 details a
transmitter loopback test circuit, and Figure 13 illustrates the
loopback test result at 120kbps. For this test, all transmitters
were simultaneously driving RS-232 loads in parallel with
1000pF, at 120kbps. Figure 14 shows the loopback results
TABLE 3. REQUIRED CAPACITOR VALUES (Note 8)
V
CC
(V)
C
1
(
F)
C
2
, C
3
, C
4
(
F)
3.0 to 3.6 (3.3V
10%)
0.1 (0.22)
0.1 (0.22)
3.15 to 3.6 (3.3V
5%)
(0.1)
(0.1)
4.5 to 5.5
0.047
0.33
3.0 to 5.5
0.1 (0.22)
0.47 (1.0)
NOTE:
8. Parenthesized values apply only to the ICL3238
TIME (20
s/DIV.)
T1
T2
2V/DIV
5V/DIV
V
CC
= +3.3V
FORCEOFF
FIGURE 10. TRANSMITTER OUTPUTS WHEN EXITING
POWERDOWN
C1 - C4 = 0.1
F
5V/DIV
READY
FIGURE 11. TRANSMITTER OUTPUT VOLTAGE vs LOAD
CURRENT (PER TRANSMITTER, i.e., DOUBLE
CURRENT AXIS FOR TOTAL V
OUT+
CURRENT)
T
RANSM
I
T
T
ER OUT
P
UT
V
O
L
T
AGE (
V
)
LOAD CURRENT PER TRANSMITTER (mA)
0
2
4
6
8
10
-6
-4
-2
0
2
4
6
-5
-3
-1
1
3
5
1
3
5
7
9
V
OUT
+
V
OUT
-
V
CC
V
OUT
+
V
OUT
-
T1
T2
T3
V
CC
= 3.0V
ICL3244
ICL3224, ICL3226, ICL3238, ICL3244
12
for a single transmitter driving 1000pF and an RS-232 load
at 250kbps. The static transmitters were also loaded with an
RS-232 receiver.
Interconnection with 3V and 5V Logic
The ICL32XX directly interface with 5V CMOS and TTL logic
families. Nevertheless, with the ICL32XX at 3.3V, and the
logic supply at 5V, AC, HC, and CD4000 outputs can drive
ICL32XX inputs, but ICL32XX outputs do not reach the
minimum V
IH
for these logic families. See Table 4 for more
information.
FIGURE 12. TRANSMITTER LOOPBACK TEST CIRCUIT
FIGURE 13. LOOPBACK TEST AT 120kbps
ICL32XX
V
CC
FORCEOFF
C
1
C
2
C
4
C
3
+
+
+
+
1000pF
V+
V-
5K
T
IN
R
OUT
C1+
C1-
C2+
C2-
R
IN
T
OUT
+
V
CC
0.1
F
V
CC
FORCEON
T1
IN
T1
OUT
R1
OUT
5
s/DIV.
V
CC
= +3.3V
5V/DIV.
C1 - C4 = 0.1
F
FIGURE 14. LOOPBACK TEST AT 250kbps
TABLE 4. LOGIC FAMILY COMPATIBILITY WITH VARIOUS
SUPPLY VOLTAGES
SYSTEM
POWER-SUPPLY
VOLTAGE (V)
V
CC
SUPPLY
VOLTAGE
(V)
COMPATIBILITY
3.3
3.3
Compatible with all CMOS families.
5
5
Compatible with all TTL and
CMOS logic families.
5
3.3
Compatible with ACT and HCT
CMOS, and with TTL. ICL32XX
outputs are incompatible with AC,
HC, and CD4000 CMOS inputs.
T1
IN
T1
OUT
R1
OUT
2
s/DIV.
5V/DIV.
V
CC
= +3.3V
C1 - C4 = 0.1
F
ICL3224, ICL3226, ICL3238, ICL3244
13
Typical Performance Curves
V
CC
= 3.3V, T
A
= 25
o
C
FIGURE 15. TRANSMITTER OUTPUT VOLTAGE vs LOAD
CAPACITANCE
FIGURE 16. TRANSMITTER OUTPUT VOLTAGE vs LOAD
CAPACITANCE
FIGURE 17. SLEW RATE vs LOAD CAPACITANCE
FIGURE 18. SUPPLY CURRENT vs LOAD CAPACITANCE
WHEN TRANSMITTING DATA
FIGURE 19. SUPPLY CURRENT vs LOAD CAPACITANCE
WHEN TRANSMITTING DATA
FIGURE 20. SUPPLY CURRENT vs LOAD CAPACITANCE
WHEN TRANSMITTING DATA
-6
-4
-2
0
2
4
6
1000
2000
3000
4000
5000
0
LOAD CAPACITANCE (pF)
T
RAN
S
M
IT
T
E
R O
U
T
P
UT
VOL
T
AG
E
(
V
)
1 TRANSMITTER AT 250kbps
V
OUT
+
V
OUT
-
OTHER TRANSMITTERS AT 30kbps
ICL3224, ICL3226, ICL3244
-6
-4
-2
0
2
4
6
1000
2000
3000
4000
5000
0
LOAD CAPACITANCE (pF)
T
RANSM
I
T
T
ER
OUT
P
UT
VOL
T
A
GE (
V
)
1 TRANSMITTER AT 250kbps
V
OUT
+
V
OUT
-
OTHER TRANSMITTERS AT 30kbps
ICL3238
LOAD CAPACITANCE (pF)
SL
EW RATE (
V
/
s)
0
1000
2000
3000
4000
5000
5
10
15
20
25
+SLEW
-SLEW
5
10
15
20
25
40
30
35
0
1000
2000
3000
4000
5000
LOAD CAPACITANCE (pF)
SUPPL
Y CURRENT
(
m
A)
20kbps
250kbps
120kbps
ICL3224
0
5
10
15
20
35
25
30
0
1000
2000
3000
4000
5000
LOAD CAPACITANCE (pF)
SUPP
L
Y
CURRENT
(
m
A)
20kbps
250kbps
120kbps
ICL3226
20
25
30
35
40
55
45
50
0
1000
2000
3000
4000
5000
LOAD CAPACITANCE (pF)
SUPPL
Y CURRENT
(
m
A)
20kbps
250kbps
120kbps
ICL3238
ICL3224, ICL3226, ICL3238, ICL3244
14
Die Characteristics
SUBSTRATE POTENTIAL (POWERED UP):
GND
TRANSISTOR COUNT:
ICL3224: 937
ICL3226: 825
ICL3238: 1235
ICL3244: 1109
PROCESS:
Si Gate CMOS
FIGURE 21. SUPPLY CURRENT vs LOAD CAPACITANCE
WHEN TRANSMITTING DATA
FIGURE 22. SUPPLY CURRENT vs SUPPLY VOLTAGE
Typical Performance Curves
V
CC
= 3.3V, T
A
= 25
o
C (Continued)
10
15
20
25
30
45
35
40
0
1000
2000
3000
4000
5000
LOAD CAPACITANCE (pF)
SUPPL
Y CURRENT
(
m
A)
20kbps
250kbps
120kbps
ICL3244
SUPPL
Y
CURRENT
(
m
A)
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
0
0.5
1.0
1.5
2.0
SUPPLY VOLTAGE (V)
2.5
3.0
3.5
NO LOAD
ALL OUTPUTS STATIC
ICL3224, ICL3226, ICL3238, ICL3244
15
ICL3224, ICL3226, ICL3238, ICL3244
Dual-In-Line Plastic Packages (PDIP)
NOTES:
1. Controlling Dimensions: INCH. In case of conflict between English
and Metric dimensions, the inch dimensions control.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Symbols are defined in the "MO Series Symbol List" in Section 2.2
of Publication No. 95.
4. Dimensions A, A1 and L are measured with the package seated in
JEDEC seating plane gauge GS-3.
5. D, D1, and E1 dimensions do not include mold flash or protrusions.
Mold flash or protrusions shall not exceed 0.010 inch (0.25mm).
6. E and
are measured with the leads constrained to be perpen-
dicular to datum
.
7. e
B
and e
C
are measured at the lead tips with the leads uncon-
strained. e
C
must be zero or greater.
8. B1 maximum dimensions do not include dambar protrusions. Dam-
bar protrusions shall not exceed 0.010 inch (0.25mm).
9. N is the maximum number of terminal positions.
10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3,
E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm).
e
A
-C-
CL
E
e
A
C
e
B
e
C
-B-
E1
INDEX
1 2 3
N/2
N
AREA
SEATING
BASE
PLANE
PLANE
-C-
D1
B1
B
e
D
D1
A
A2
L
A1
-A-
0.010 (0.25)
C A
M
B S
E20.3
(JEDEC MS-001-AD ISSUE D)
20 LEAD DUAL-IN-LINE PLASTIC PACKAGE
SYMBOL
INCHES
MILLIMETERS
NOTES
MIN
MAX
MIN
MAX
A
-
0.210
-
5.33
4
A1
0.015
-
0.39
-
4
A2
0.115
0.195
2.93
4.95
-
B
0.014
0.022
0.356
0.558
-
B1
0.045
0.070
1.55
1.77
8
C
0.008
0.014
0.204
0.355
-
D
0.980
1.060
24.89
26.9
5
D1
0.005
-
0.13
-
5
E
0.300
0.325
7.62
8.25
6
E1
0.240
0.280
6.10
7.11
5
e
0.100 BSC
2.54 BSC
-
e
A
0.300 BSC
7.62 BSC
6
e
B
-
0.430
-
10.92
7
L
0.115
0.150
2.93
3.81
4
N
20
20
9
Rev. 0 12/93
16
ICL3224, ICL3226, ICL3238, ICL3244
Small Outline Plastic Packages (SSOP)
NOTES:
1. Symbols are defined in the "MO Series Symbol List" in Section 2.2 of
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension "D" does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.20mm (0.0078
inch) per side.
4. Dimension "E" does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.20mm (0.0078 inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. "L" is the length of terminal for soldering to a substrate.
7. "N" is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension "B" does not include dambar protrusion. Allowable dambar
protrusion shall be 0.13mm (0.005 inch) total in excess of "B" dimen-
sion at maximum material condition.
10. Controlling dimension: MILLIMETER. Converted inch dimensions are
not necessarily exact.
INDEX
AREA
E
D
N
1
2
3
-B-
0.25(0.010)
C A
M
B S
e
-A-
L
B
M
-C-
A1
A
SEATING PLANE
0.10(0.004)
C
H
0.25(0.010)
B
M
M
0.25
0.010
GAUGE
PLANE
A2
M16.209
(JEDEC MO-150-AC ISSUE B)
16 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE
SYMBOL
INCHES
MILLIMETERS
NOTES
MIN
MAX
MIN
MAX
A
-
0.078
-
2.00
-
A1
0.002
-
0.05
-
-
A2
0.065
0.072
1.65
1.85
-
B
0.009
0.014
0.22
0.38
9
C
0.004
0.009
0.09
0.25
-
D
0.233
0.255
5.90
6.50
3
E
0.197
0.220
5.00
5.60
4
e
0.026 BSC
0.65 BSC
-
H
0.292
0.322
7.40
8.20
-
L
0.022
0.037
0.55
0.95
6
N
16
16
7
0
o
8
o
0
o
8
o
-
Rev. 2 3/95
17
ICL3224, ICL3226, ICL3238, ICL3244
Shrink Small Outline Plastic Packages (SSOP)
NOTES:
1. Symbols are defined in the "MO Series Symbol List" in Section 2.2
of Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension "D" does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.20mm (0.0078 inch) per side.
4. Dimension "E" does not include interlead flash or protrusions. Inter-
lead flash and protrusions shall not exceed 0.20mm (0.0078 inch)
per side.
5. The chamfer on the body is optional. If it is not present, a visual in-
dex feature must be located within the crosshatched area.
6. "L" is the length of terminal for soldering to a substrate.
7. "N" is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension "B" does not include dambar protrusion. Allowable dam-
bar protrusion shall be 0.13mm (0.005 inch) total in excess of "B"
dimension at maximum material condition.
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
INDEX
AREA
E
D
N
1
2
3
-B-
0.25(0.010)
C A
M
B S
e
-A-
L
B
M
-C-
A1
A
SEATING PLANE
0.10(0.004)
C
H
0.25(0.010)
B
M
M
0.25
0.010
GAUGE
PLANE
A2
M20.209
(JEDEC MO-150-AE ISSUE B)
20 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE
SYMBOL
INCHES
MILLIMETERS
NOTES
MIN
MAX
MIN
MAX
A
-
0.078
-
2.00
-
A1
0.002
-
0.05
-
-
A2
0.065
0.072
1.65
1.85
-
B
0.009
0.014
0.22
0.38
9
C
0.004
0.009
0.09
0.25
-
D
0.272
0.295
6.90
7.50
3
E
0.197
0.220
5.00
5.60
4
e
0.026 BSC
0.65 BSC
-
H
0.292
0.322
7.40
8.20
-
L
0.022
0.037
0.55
0.95
6
N
20
20
7
0
o
8
o
0
o
8
o
-
Rev. 2 4/95
18
ICL3224, ICL3226, ICL3238, ICL3244
Thin Shrink Small Outline Plastic Packages (TSSOP)
INDEX
AREA
E1
D
N
1
2
3
-B-
0.10(0.004)
C A
M
B S
e
-A-
b
M
-C-
A1
A
SEATING PLANE
0.10(0.004)
c
E
0.25(0.010)
B
M
M
L
0.25
0.010
GAUGE
PLANE
A2
NOTES:
1. These package dimensions are within allowable dimensions of
JEDEC MO-153-AE, Issue E.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension "D" does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm
(0.006 inch) per side.
4. Dimension "E1" does not include interlead flash or protrusions. Inter-
lead flash and protrusions shall not exceed 0.15mm (0.006 inch) per
side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. "L" is the length of terminal for soldering to a substrate.
7. "N" is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension "b" does not include dambar protrusion. Allowable dambar
protrusion shall be 0.08mm (0.003 inch) total in excess of "b" dimen-
sion at maximum material condition. Minimum space between protru-
sion and adjacent lead is 0.07mm (0.0027 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact. (Angles in degrees)
0.05(0.002)
M28.173
28 LEAD THIN SHRINK SMALL OUTLINE PLASTIC
PACKAGE
SYMBOL
INCHES
MILLIMETERS
NOTES
MIN
MAX
MIN
MAX
A
-
0.047
-
1.20
-
A1
0.002
0.006
0.05
0.15
-
A2
0.031
0.051
0.80
1.05
-
b
0.0075
0.0118
0.19
0.30
9
c
0.0035
0.0079
0.09
0.20
-
D
0.378
0.386
9.60
9.80
3
E1
0.169
0.177
4.30
4.50
4
e
0.026 BSC
0.65 BSC
-
E
0.246
0.256
6.25
6.50
-
L
0.0177
0.0295
0.45
0.75
6
N
28
28
7
0
o
8
o
0
o
8
o
-
Rev. 0 6/98
19
ICL3224, ICL3226, ICL3238, ICL3244
Small Outline Exposed Pad Plastic Packages (EPSOIC)
INDEX
AREA
E
D
N
1
2
3
-B-
0.25(0.010)
C A
M
B S
e
-A-
L
B
M
-C-
A1
A
SEATING PLANE
0.10(0.004)
h x 45
o
C
H
0.25(0.010)
B
M
M
P1
N
1
2
3
TOP VIEW
SIDE VIEW
BOTTOM VIEW
P
M28.3B
28 LEAD WIDE BODY SMALL OUTLINE EXPOSED PAD
PLASTIC PACKAGE
SYMBOL
INCHES
NOTES
MIN
NOMINAL
MAX
A
0.091
-
0.099
-
A1
0.001
-
0.005
-
B
0.014
-
0.019
9
C
0.0091
-
0.0125
-
D
0.701
-
0.711
3
E
0.292
-
0.299
4
e
0.050 BSC
-
H
0.400
-
0.410
-
h
0.010
-
0.016
5
L
0.024
-
0.040
6
N
28
7
0
5
8
-
P
0.180
0.214
0.218
11
P1
0.156
0.190
0.194
11
Rev. 0 5/02
NOTES:
1. Symbols are defined in the "MO Series Symbol List" in Section
2.2 of Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension "D" does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.15mm (0.006 inch) per side.
4. Dimension "E" does not include interlead flash or protrusions.
Interlead flash and protrusions shall not exceed 0.25mm (0.010
inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual
index feature must be located within the crosshatched area.
6. "L" is the length of terminal for soldering to a substrate.
7. "N" is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width "B", as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch)
10. Controlling dimension: INCH.
11. Dimensions "P" and "P1" are thermal and/or electrical
enhanced variations. Values shown are maximum size of
exposed pad within lead count body size.
20
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
ICL3224, ICL3226, ICL3238, ICL3244
Shrink Small Outline Plastic Packages (SSOP)
NOTES:
1. Symbols are defined in the "MO Series Symbol List" in Section 2.2
of Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension "D" does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.20mm (0.0078 inch) per side.
4. Dimension "E" does not include interlead flash or protrusions. Inter-
lead flash and protrusions shall not exceed 0.20mm (0.0078 inch)
per side.
5. The chamfer on the body is optional. If it is not present, a visual in-
dex feature must be located within the crosshatched area.
6. "L" is the length of terminal for soldering to a substrate.
7. "N" is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension "B" does not include dambar protrusion. Allowable
dambar protrusion shall be 0.13mm (0.005 inch) total in excess of
"B" dimension at maximum material condition.
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
INDEX
AREA
E
D
N
1
2
3
-B-
0.25(0.010)
C A
M
B S
e
-A-
L
B
M
-C-
A1
A
SEATING PLANE
0.10(0.004)
C
H
0.25(0.010)
B
M
M
0.25
0.010
GAUGE
PLANE
A2
M28.209
(JEDEC MO-150-AH ISSUE B)
28 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE
SYMBOL
INCHES
MILLIMETERS
NOTES
MIN
MAX
MIN
MAX
A
-
0.078
-
2.00
-
A1
0.002
-
0.05
-
-
A2
0.065
0.072
1.65
1.85
-
B
0.009
0.014
0.22
0.38
9
C
0.004
0.009
0.09
0.25
-
D
0.390
0.413
9.90
10.50
3
E
0.197
0.220
5.00
5.60
4
e
0.026 BSC
0.65 BSC
-
H
0.292
0.322
7.40
8.20
-
L
0.022
0.037
0.55
0.95
6
N
28
28
7
0
o
8
o
0
o
8
o
-
Rev. 1 3/95
PDF 
ZIP