1
FN4899.4
ICL3224E, ICL3226E, ICL3244E
+/-15kV ESD Protected, +3V to +5.5V,
1Microamp, 250kbps, RS-232
Transceivers with Enhanced Automatic
Powerdown
The Intersil ICL32XXE devices are 3.0V to 5.5V powered
RS-232 transmitters/receivers which meet ElA/TIA-232 and
V.28/V.24 specifications, even at V
CC
= 3.0V. Additionally,
they provide
15kV ESD protection (IEC61000-4-2 Air Gap
and Human Body Model) on transmitter outputs and receiver
inputs (RS-232 pins). Targeted applications are PDAs,
Palmtops, and notebook and laptop computers where the
low operational, and even lower standby, power
consumption is critical. Efficient on-chip charge pumps,
coupled with manual and enhanced automatic powerdown
functions, reduce the standby supply current to a 1
A trickle.
Small footprint packaging, and the use of small, low value
capacitors ensure board space savings as well. Data rates
greater than 250kbps are guaranteed at worst case load
conditions. This family is fully compatible with 3.3V only
systems, mixed 3.3V and 5.0V systems, and 5.0V only
systems.
The ICL3244E is a 3 driver, 5 receiver device that provides a
complete serial port suitable for laptop or notebook
computers. It also includes a noninverting always-active
receiver for "wake-up" capability.
These devices, feature an enhanced automatic
powerdown function which powers down the on-chip power-
supply and driver circuits. This occurs when all receiver and
transmitter inputs detect no signal transitions for a period of
30 seconds. These devices power back up, automatically,
whenever they sense a transition on any transmitter or
receiver input.
Table 1 summarizes the features of the devices represented
by this data sheet, while Application Note AN9863
summarizes the features of each device comprising the
ICL32XXE 3V family.
Features
Pb-free Available as an Option (see Ordering Information)
ESD Protection for RS-232 I/O Pins to
15kV (IEC61000)
Manual and Enhanced Automatic Powerdown Features
Drop in Replacements for MAX3224E, MAX3226E,
MAX3244E
Meets EIA/TIA-232 and V.28/V.24 Specifications at 3V
RS-232 Compatible with V
CC
= 2.7V
Latch-Up Free
On-Chip Voltage Converters Require Only Four External
0.1
F Capacitors
Guaranteed Mouse Driveability (ICL3244E)
"Ready to Transmit" Indicator Output (ICL3224E/26E)
Receiver Hysteresis For Improved Noise Immunity
Guaranteed Minimum Data Rate . . . . . . . . . . . . . 250kbps
Guaranteed Minimum Slew Rate . . . . . . . . . . . . . . . 6V/
s
Wide Power Supply Range . . . . . . . Single +3V to +5.5V
Low Supply Current in Powerdown State. . . . . . . . . . .1
A
Applications
Any System Requiring RS-232 Communication Ports
- Battery Powered, Hand-Held, and Portable Equipment
- Laptop Computers, Notebooks, Palmtops
- Modems, Printers and other Peripherals
- Digital Cameras
- Cellular/Mobile Phones
Related Literature
Technical Brief TB363 "Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)"
TABLE 1. SUMMARY OF FEATURES
PART
NUMBER
NO. OF
Tx.
NO. OF
Rx.
NO. OF
MONITOR Rx.
(R
OUTB
)
DATA
RATE
(kbps)
Rx. ENABLE
FUNCTION?
READY
OUTPUT?
MANUAL
POWER-
DOWN?
ENHANCED
AUTOMATIC
POWERDOWN
FUNCTION?
ICL3224E
2
2
0
250
No
Yes
Yes
Yes
ICL3226E
1
1
0
250
No
Yes
Yes
Yes
ICL3244E
3
5
1
250
No
No
Yes
Yes
Data Sheet
July 2004
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2000, 2001, 2003, 2004. All Rights Reserved.
All other trademarks mentioned are the property of their respective owners.
2
Ordering Information
PART NO.
TEMP. RANGE (C)
PACKAGE
PKG. DWG. #
ICL3224EIA
-40 to 85
20 Ld SSOP
M20.209
ICL3224EIA-T
-40 to 85
20 Ld SSOP Tape and Reel
M20.209
ICL3226ECA
0 to 70
16 Ld SSOP
M16.209
ICL3226ECA-T
0 to 70
16 Ld SSOP Tape and Reel
M16.209
ICL3244ECA
0 to 70
28 Ld SSOP
M28.209
ICL3244ECA-T
0 to 70
28 Ld SSOP Tape and Reel
M28.209
ICL3244ECAZ (Note)
0 to 70
28 Ld SSOP
(Pb-free)
M28.209
ICL3244ECAZ-T (Note)
0 to 70
28 Ld SSOP Tape and Reel
(Pb-free)
M28.209
ICL3244EIA
-40 to 85
28 Ld SSOP
M28.209
ICL3244EIA-T
-40 to 85
28 Ld SSOP Tape and Reel
M28.209
ICL3244EIB
-40 to 85
28 Ld SOIC
M28.3
NOTE: Intersil Pb-free products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination
finish, which is compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J Std-020B.
Pinouts
ICL3224E (SSOP)
TOP VIEW
ICL3226E (SSOP)
TOP VIEW
ICL3244E (SOIC, SSOP)
TOP VIEW
READY
C1+
V+
C1-
C2+
C2-
V-
T2
OUT
R2
IN
FORCEOFF
GND
T1
OUT
R1
IN
R1
OUT
T1
IN
INVALID
V
CC
FORCEON
T2
IN
20
19
18
17
16
15
14
13
12
11
1
2
3
4
5
6
7
8
9
10
R2
OUT
READY
C1+
V+
C1-
C2+
C2-
V-
R1
IN
FORCEOFF
GND
T1
OUT
FORCEON
T1
IN
R1
OUT
V
CC
INVALID
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
C2+
C2-
V-
R1
IN
R2
IN
R3
IN
R4
IN
R5
IN
T1
OUT
T3
OUT
T3
IN
T2
IN
T1
IN
C1+
V
CC
GND
C1-
FORCEON
INVALID
R1
OUT
R2
OUT
R3
OUT
R4
OUT
R5
OUT
V+
FORCEOFF
R2
OUTB
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
T2
OUT
ICL3224E, ICL3226E, ICL3244E
3
Pin Descriptions
PIN
FUNCTION
V
CC
System power supply input (3.0V to 5.5V).
V+
Internally generated positive transmitter supply (+5.5V).
V-
Internally generated negative transmitter supply (-5.5V).
GND
Ground connection.
C1+
External capacitor (voltage doubler) is connected to this lead.
C1-
External capacitor (voltage doubler) is connected to this lead.
C2+
External capacitor (voltage inverter) is connected to this lead.
C2-
External capacitor (voltage inverter) is connected to this lead.
T
IN
TTL/CMOS compatible transmitter Inputs.
T
OUT
15kV ESD Protected
,
RS-232 level (nominally
5.5V) transmitter outputs.
R
IN
15kV ESD Protected
,
RS-232 compatible receiver inputs.
R
OUT
TTL/CMOS level receiver outputs.
R
OUTB
TTL/CMOS level, noninverting, always enabled receiver outputs.
INVALID
Active low output that indicates if no valid RS-232 levels are present on any receiver input.
READY
Active high output that indicates when the ICL32XXE is ready to transmit (i.e., V-
-4V)
FORCEOFF Active low to shut down transmitters and on-chip power supply. This overrides any automatic circuitry and FORCEON (see Table 2).
FORCEON Active high input to override automatic powerdown circuitry thereby keeping transmitters active. (FORCEOFF must be high).
Typical Operating Circuits
ICL3224E
19
V
CC
T1
OUT
T2
OUT
T1
IN
T2
IN
T
1
T
2
0.1
F
+0.1
F
+
0.1
F
13
12
17
8
2
4
3
7
V+
V-
C1+
C1-
C2+
C2-
+
0.1
F
5
6
R1
OUT
R1
IN
16
5k
R2
OUT
R2
IN
9
10
5k
15
C
1
C
2
+ C
3
C
4
READY
1
GND
+3.3V
+
0.1
F
18
TTL/CMOS
LOGIC LEVELS
RS-232
LEVELS
R
1
R
2
FORCEON
FORCEOFF
14
20
V
CC
11
INVALID
TO POWER
CONTROL LOGIC
ICL3224E, ICL3226E, ICL3244E
4
ICL3226E
ICL3244E
Typical Operating Circuits
(Continued)
15
V
CC
T1
OUT
T1
IN
T
1
0.1
F
+0.1
F
+
0.1
F
11
13
2
4
3
7
V+
V-
C1+
C1-
C2+
C2-
+
0.1
F
5
6
R1
OUT
R1
IN
R
1
8
9
5k
C
1
C
2
+ C
3
C
4
READY
1
GND
+3.3V
+
0.1
F
14
TTL/CMOS
LOGIC LEVELS
RS-232
LEVELS
FORCEON
FORCEOFF
12
16
V
CC
10
INVALID
TO POWER
CONTROL LOGIC
26
V
CC
T1
OUT
T2
OUT
T3
OUT
T1
IN
T2
IN
T3
IN
T
1
T
2
T
3
0.1
F
+
0.1
F
+
0.1
F
14
13
9
10
12
11
28
24
27
3
V+
V-
C1+
C1-
C2+
C2-
+
0.1
F
1
2
R1
OUT
R1
IN
4
5k
R2
OUT
R2
IN
5
18
5k
R3
OUT
R3
IN
6
17
5k
R4
OUT
R4
IN
7
16
5k
R5
OUT
R5
IN
R
5
8
15
5k
19
R2
OUTB
C
1
C
2
+ C
3
C
4
FORCEON
FORCEOFF
23
GND
22
+3.3V
+
0.1
F
20
25
V
CC
TTL/CMOS
LOGIC LEVELS
RS-232
LEVELS
RS-232
LEVELS
R
1
R
2
R
3
R
4
21
INVALID
TO POWER
CONTROL LOGIC
ICL3224E, ICL3226E, ICL3244E
5
Absolute Maximum Ratings
Thermal Information
V
CC
to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6V
V+ to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V
V- to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3V to -7V
V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14V
Input Voltages
T
IN
, FORCEOFF, FORCEON . . . . . . . . . . . . . . . . . . -0.3V to 6V
R
IN
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
25V
Output Voltages
T
OUT
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13.2V
R
OUT
, INVALID, READY . . . . . . . . . . . . . . . . -0.3V to V
CC
+0.3V
Short Circuit Duration
T
OUT
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . See Specification Table
Operating Conditions
Temperature Range
ICL32XXEC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0C to 70C
ICL32XXEI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40C to 85C
Thermal Resistance (Typical, Note 1)
JA
(C/W)
28 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . .
75
16 Ld SSOP Package . . . . . . . . . . . . . . . . . . . . . . .
140
20 Ld SSOP Package . . . . . . . . . . . . . . . . . . . . . . .
125
28 Ld SSOP Package . . . . . . . . . . . . . . . . . . . . . . .
100
Maximum Junction Temperature (Plastic Package) . . . . . . . 150C
Maximum Storage Temperature Range . . . . . . . . . . -65C to 150C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300C
(Lead Tips Only)
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1.
JA
is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications
Test Conditions: V
CC
= 3V to 5.5V, C
1
- C
4
= 0.1
F; Unless Otherwise Specified.
Typicals are at T
A
= 25C
PARAMETER
TEST CONDITIONS
TEMP
(C)
MIN
TYP
MAX
UNITS
DC CHARACTERISTICS
Supply Current, Automatic
Powerdown
All R
IN
Open, FORCEON = GND, FORCEOFF = V
CC
25
-
1.0
10
A
Supply Current, Powerdown
FORCEOFF = GND
25
-
1.0
10
A
Supply Current,
Automatic Powerdown Disabled
All Outputs Unloaded, FORCEON = FORCEOFF = V
CC
25
-
0.3
1.0
mA
LOGIC AND TRANSMITTER INPUTS AND RECEIVER OUTPUTS
Input Logic Threshold Low
T
IN
, FORCEON, FORCEOFF
Full
-
-
0.8
V
Input Logic Threshold High
T
IN
, FORCEON, FORCEOFF
V
CC
= 3.3V
Full
2.0
-
-
V
V
CC
= 5.0V
Full
2.4
-
-
V
Transmitter Input Hysteresis
25
-
0.5
-
V
Input Leakage Current
T
IN
, FORCEON, FORCEOFF
Full
-
0.01
1.0
A
Output Leakage Current
FORCEOFF = GND, ICL3244E Only
Full
-
0.05
10
A
Output Voltage Low
I
OUT
= 1.6mA
Full
-
-
0.4
V
Output Voltage High
I
OUT
= -1.0mA
Full
V
CC
-0.6 V
CC
-0.1
-
V
RECEIVER INPUTS
Input Voltage Range
Full
-25
-
25
V
Input Threshold Low
V
CC
= 3.3V
25
0.6
1.2
-
V
V
CC
= 5.0V
25
0.8
1.5
-
V
ICL3224E, ICL3226E, ICL3244E
6
Input Threshold High
V
CC
= 3.3V
25
-
1.5
2.4
V
V
CC
= 5.0V
25
-
1.8
2.4
V
Input Hysteresis
25
-
0.5
-
V
Input Resistance
25
3
5
7
k
TRANSMITTER OUTPUTS
Output Voltage Swing
All Transmitter Outputs Loaded with 3k
to Ground
Full
5.0
5.4
-
V
Output Resistance
V
CC
= V+ = V- = 0V, Transmitter Output =
2V
Full
300
10M
-
Output Short-Circuit Current
Full
-
35
60
mA
Output Leakage Current
V
OUT
=
12V, V
CC
= 0V or 3V to 5.5V
Automatic Powerdown or FORCEOFF = GND
Full
-
-
25
A
MOUSE DRIVEABILITY (ICL3244E Only)
Transmitter Output Voltage
(See Figure 11)
T1
IN
= T2
IN
= GND, T3
IN
= V
CC
, T3
OUT
Loaded with 3k
to GND, T1
OUT
and T2
OUT
Loaded with 2.5mA Each
Full
5
-
-
V
ENHANCED AUTOMATIC POWERDOWN (FORCEON = GND, FORCEOFF = V
CC
)
Receiver Input Thresholds to
INVALID High
See Figure 6
Full
-2.7
-
2.7
V
Receiver Input Thresholds to
INVALID Low
See Figure 6
Full
-0.3
-
0.3
V
INVALID, READY Output Voltage
Low
I
OUT
= 1.6mA
Full
-
-
0.4
V
INVALID, READY Output Voltage
High
I
OUT
= -1.0mA
Full
V
CC
-0.6
-
-
V
Receiver Positive or Negative
Threshold to INVALID High Delay
(t
INVH)
25
-
1
-
s
Receiver Positive or Negative
Threshold to INVALID Low Delay
(t
INVL)
25
-
30
-
s
Receiver or Transmitter Edge to
Transmitters Enabled Delay (t
WU
)
Note 2
25
-
100
-
s
Receiver or Transmitter Edge to
Transmitters Disabled Delay
(t
AUTOPWDN
)
Note 2
Full
15
30
60
sec
TIMING CHARACTERISTICS
Maximum Data Rate
R
L
= 3k
,
C
L
= 1000pF, One Transmitter Switching
Full
250
500
-
kbps
Receiver Propagation Delay
Receiver Input to Receiver
Output, C
L
= 150pF
t
PHL
25
-
0.15
-
s
t
PLH
25
-
0.15
-
s
Receiver Output Enable Time
Normal Operation (ICL3244E Only)
25
-
200
-
ns
Receiver Output Disable Time
Normal Operation (ICL3244E Only)
25
-
200
-
ns
Transmitter Skew
t
PHL
- t
PLH
25
-
100
-
ns
Electrical Specifications
Test Conditions: V
CC
= 3V to 5.5V, C
1
- C
4
= 0.1
F; Unless Otherwise Specified.
Typicals are at T
A
= 25C (Continued)
PARAMETER
TEST CONDITIONS
TEMP
(C)
MIN
TYP
MAX
UNITS
ICL3224E, ICL3226E, ICL3244E
7
Detailed Description
These ICL32XXE interface ICs operate from a single +3V to
+5.5V supply, guarantee a 250kbps minimum data rate,
require only four small external 0.1
F capacitors, feature low
power consumption, and meet all ElA RS-232C and V.28
specifications. The circuit is divided into three sections: The
charge pump, the transmitters, and the receivers.
Charge-Pump
Intersil's new ICL32XXE family utilizes regulated on-chip
dual charge pumps as voltage doublers, and voltage
inverters to generate
5.5V transmitter supplies from a V
CC
supply as low as 3.0V. This allows these devices to maintain
RS-232 compliant output levels over the
10% tolerance
range of 3.3V powered systems. The efficient on-chip power
supplies require only four small, external 0.1
F capacitors
for the voltage doubler and inverter functions at V
CC
= 3.3V.
See the "Capacitor Selection" section, and Table 3 for
capacitor recommendations for other operating conditions.
The charge pumps operate discontinuously (i.e., they turn off
as soon as the V+ and V- supplies are pumped up to the
nominal values), resulting in significant power savings.
Transmitters
The transmitters are proprietary, low dropout, inverting
drivers that translate TTL/CMOS inputs to EIA/TIA-232
output levels. Coupled with the on-chip
5.5V supplies,
these transmitters deliver true RS-232 levels over a wide
range of single supply system voltages.
Transmitter outputs disable and assume a high impedance
state when the device enters the powerdown mode (see
Table 2). These outputs may be driven to
12V when
disabled.
All devices guarantee a 250kbps data rate for full load
conditions (3k
and 1000pF), V
CC
3.0V, with one
transmitter operating at full speed. Under more typical
conditions of V
CC
3.3V, R
L
= 3k
, and C
L
= 250pF, one
transmitter easily operates at 1Mbps.
Transmitter inputs float if left unconnected, and may cause
I
CC
increases. Connect unused inputs to GND for the best
performance.
Receivers
All the ICL32XXE devices contain standard inverting
receivers, but only the ICL3244E receivers can three-state,
via the FORCEOFF control line. Additionally, the ICL3244E
includes a noninverting (monitor) receiver (denoted by the
R
OUTB
label) that is always active, regardless of the state of
any control lines. Both receiver types convert RS-232
signals to CMOS output levels and accept inputs up to
25V
while presenting the required 3k
to 7k
input impedance
(see Figure 1) even if the power is off (V
CC
= 0V). The
receivers' Schmitt trigger input stage uses hysteresis to
increase noise immunity and decrease errors due to slow
input signal transitions.
Receiver Skew
t
PHL
- t
PLH
25
-
50
-
ns
Transition Region Slew Rate
V
CC
= 3.3V,
R
L
= 3k
to 7k
,
Measured From 3V to -3V or -3V
to 3V
C
L
= 150pF to 1000pF
25
6
-
30
V/
s
C
L
= 150pF to 2500pF
25
4
8
30
V/
s
ESD PERFORMANCE
RS-232 Pins (T
OUT
, R
IN
)
Human Body Model
25
-
15
-
kV
IEC61000-4-2 Contact Discharge
25
-
8
-
kV
IEC61000-4-2 Air Gap Discharge
25
-
15
-
kV
All Other Pins
Human Body Model
25
-
3
-
kV
NOTE:
2. An "edge" is defined as a transition through the transmitter or receiver input thresholds.
Electrical Specifications
Test Conditions: V
CC
= 3V to 5.5V, C
1
- C
4
= 0.1
F; Unless Otherwise Specified.
Typicals are at T
A
= 25C (Continued)
PARAMETER
TEST CONDITIONS
TEMP
(C)
MIN
TYP
MAX
UNITS
R
XOUT
GND
V
ROUT
V
CC
5k
R
XIN
-25V
V
RIN
+25V
GND
V
CC
FIGURE 1. INVERTING RECEIVER CONNECTIONS
ICL3224E, ICL3226E, ICL3244E
8
The ICL3244E inverting receivers disable during forced
(manual) powerdown, but not during automatic powerdown
(see Table 2). Conversely, the monitor receiver remains
active even during manual powerdown making it extremely
useful for Ring Indicator monitoring. Standard receivers
driving powered down peripherals must be disabled to
prevent current flow through the peripheral's protection
diodes (see Figures 2 and 3). This renders them useless for
wake up functions, but the corresponding monitor receiver
can be dedicated to this task as shown in Figure 3.
TABLE 2. POWERDOWN LOGIC TRUTH TABLE
RCVR OR
XMTR
EDGE
WITHIN 30
SEC?
FORCEOFF
INPUT
FORCEON
INPUT
TRANSMITTER
OUTPUTS
RECEIVER
OUTPUTS
(NOTE 3)
R
OUTB
OUTPUTS
RS-232
LEVEL
PRESENT
AT
RECEIVER
INPUT?
INVALID
OUTPUT
MODE OF OPERATION
ICL3224E, ICL3226E
NO
H
H
Active
Active
N.A.
NO
L
Normal Operation (Enhanced
Auto Powerdown Disabled)
NO
H
H
Active
Active
N.A.
YES
H
YES
H
L
Active
Active
N.A.
NO
L
Normal Operation (Enhanced
Auto Powerdown Enabled)
YES
H
L
Active
Active
N.A.
YES
H
NO
H
L
High-Z
Active
N.A.
NO
L
Powerdown Due to Enhanced
Auto Powerdown Logic
NO
H
L
High-Z
Active
N.A.
YES
H
X
L
X
High-Z
Active
N.A.
NO
L
Manual Powerdown
X
L
X
High-Z
Active
N.A.
YES
H
ICL322XE - INVALID DRIVING FORCEON AND FORCEOFF (EMULATES AUTOMATIC POWERDOWN)
X
NOTE 4
NOTE 4
Active
Active
N.A.
YES
H
Normal Operation
X
NOTE 4
NOTE 4
High-Z
Active
N.A.
NO
L
Forced Auto Powerdown
ICL3244E
NO
H
H
Active
Active
Active
NO
L
Normal Operation (Enhanced
Auto Powerdown Disabled)
NO
H
H
Active
Active
Active
YES
H
YES
H
L
Active
Active
Active
NO
L
Normal Operation (Enhanced
Auto Powerdown Enabled)
YES
H
L
Active
Active
Active
YES
H
NO
H
L
High-Z
Active
Active
NO
L
Powerdown Due to Enhanced
Auto Powerdown Logic
NO
H
L
High-Z
Active
Active
YES
H
X
L
X
High-Z
High-Z
Active
NO
L
Manual Powerdown
X
L
X
High-Z
High-Z
Active
YES
H
ICL3244E - INVALID DRIVING FORCEON AND FORCEOFF (EMULATES AUTOMATIC POWERDOWN)
X
NOTE 4
NOTE 4
Active
Active
Active
YES
H
Normal Operation
X
NOTE 4
NOTE 4
High-Z
High-Z
Active
NO
L
Forced Auto Powerdown
NOTES:
3. Applies only to the ICL3244E.
4. Input is connected to INVALID Output.
ICL3224E, ICL3226E, ICL3244E
9
Powerdown Functionality
This 3V family of RS-232 interface devices requires a
nominal supply current of 0.3mA during normal operation
(not in powerdown mode). This is considerably less than the
5mA to 11mA current required of 5V RS-232 devices. The
already low current requirement drops significantly when the
device enters powerdown mode. In powerdown, supply
current drops to 1
A, because the on-chip charge pump
turns off (V+ collapses to V
CC
, V- collapses to GND), and
the transmitter outputs three-state. Inverting receiver outputs
may or may not disable in powerdown; refer to Table 2 for
details. This micro-power mode makes these devices ideal
for battery powered and portable applications.
Software Controlled (Manual) Powerdown
These devices allow the user to force the IC into the low
power, standby state, and utilize a two pin approach where
the FORCEON and FORCEOFF inputs determine the IC's
mode. For always enabled operation, FORCEON and
FORCEOFF are both strapped high. To switch between
active and powerdown modes, under logic or software
control, only the FORCEOFF input need be driven. The
FORCEON state isn't critical, as FORCEOFF dominates
over FORCEON. Nevertheless, if strictly manual control over
powerdown is desired, the user must strap FORCEON high
to disable the enhanced automatic powerdown circuitry.
ICL3244E inverting (standard) receiver outputs also disable
when the device is in powerdown, thereby eliminating the
possible current path through a shutdown peripheral's input
protection diode (see Figures 2 and 3).
Connecting FORCEOFF and FORCEON together disables
the enhanced automatic powerdown feature, enabling them
to function as a manual SHUTDOWN input (see Figure 4).
With any of the above control schemes, the time required to
exit powerdown, and resume transmission is only 100
s.
When using both manual and enhanced automatic
powerdown (FORCEON = 0), the ICL32XXE won't power up
from manual powerdown until both FORCEOFF and
FORCEON are driven high, or until a transition occurs on a
receiver or transmitter input. Figure 5 illustrates a circuit for
ensuring that the ICL32XXE powers up as soon as
FORCEOFF switches high. The rising edge of the Master
Powerdown signal forces the device to power up, and the
ICL32XXE returns to enhanced automatic powerdown mode
an RC time constant after this rising edge. The time constant
isn't critical, because the ICL32XXE remains powered up for
30 seconds after the FORCEON falling edge, even if there
are no signal transitions. This gives slow-to-wake systems
(e.g., a mouse) plenty of time to start transmitting, and as
long as it starts transmitting within 30 seconds both systems
remain enabled.
FIGURE 2. POWER DRAIN THROUGH POWERED DOWN
PERIPHERAL
OLD
V
CC
POWERED
GND
SHDN = GND
V
CC
Rx
Tx
V
CC
CURRENT
V
OUT
=
V
CC
FLOW
RS-232 CHIP
DOWN
UART
FIGURE 3. DISABLED RECEIVERS PREVENT POWER DRAIN
ICL3244E
TRANSITION
R
X
T
X
R2
OUTB
R2
OUT
T1
IN
FORCEOFF = GND
V
CC
V
CC
TO
R2
IN
T1
OUT
V
OUT
=
HI-Z
POWERED
DETECTOR
DOWN
UART
WAKE-UP
LOGIC
FIGURE 4. CONNECTIONS FOR MANUAL POWERDOWN
WHEN NO VALID RECEIVER SIGNALS ARE
PRESENT
PWR
FORCEOFF
INVALID
CPU
I/O
FORCEON
ICL32XXE
MGT
LOGIC
UART
ICL3224E, ICL3226E, ICL3244E
10
INVALID Output
The INVALID output always indicates (see Table 2) whether
or not 30
s have elapsed with invalid RS-232 signals (see
Figures 6 and 8) persisting on all of the receiver inputs,
giving the user an easy way to determine when the interface
block should power down. Invalid receiver levels occur
whenever the driving peripheral's outputs are shut off
(powered down) or when the RS-232 interface cable is
disconnected. In the case of a disconnected interface cable
where all the receiver inputs are floating (but pulled to GND
by the internal receiver pull down resistors), the INVALID
logic detects the invalid levels and drives the output low. The
power management logic then uses this indicator to power
down the interface block. Reconnecting the cable restores
valid levels at the receiver inputs, INVALID switches high,
and the power management logic wakes up the interface
block. INVALID can also be used to indicate the DTR or
RING INDICATOR signal, as long as the other receiver
inputs are floating, or driven to GND (as in the case of a
powered down driver).
Enhanced Automatic Powerdown
Even greater power savings is available by using these
devices which feature an enhanced automatic powerdown
function. When the enhanced powerdown logic determines
that no transitions have occurred on any of the transmitter
nor receiver inputs for 30 seconds, the charge pump and
transmitters powerdown, thereby reducing supply current to
1
A. The ICL32XXE automatically powers back up
whenever it detects a transition on one of these inputs. This
automatic powerdown feature provides additional system
power savings without changes to the existing operating
system.
Enhanced automatic powerdown operates when the
FORCEON input is low, and the FORCEOFF input is high.
Tying FORCEON high disables automatic powerdown, but
manual powerdown is always available via the overriding
FORCEOFF input. Table 2 summarizes the enhanced
automatic powerdown functionality.
Figure 7 illustrates the enhanced powerdown control logic.
Note that once the ICL32XXE enters powerdown (manually
or automatically), the 30 second timer remains timed out
(set), keeping the ICL32XXE powered down until FORCEON
transitions high, or until a transition occurs on a receiver or
transmitter input.
The INVALID output signal switches low to indicate that
invalid levels have persisted on all of the receiver inputs for
more than 30
s (see Figure 8), but this has no direct effect
on the state of the ICL32XXE (see the next sections for
methods of utilizing INVALID to power down the device).
INVALID switches high 1
s after detecting a valid RS-232
level on a receiver input. INVALID operates in all modes
(forced or automatic powerdown, or forced on), so it is also
useful for systems employing manual powerdown circuitry.
The time to recover from automatic powerdown mode is
typically 100
s.
Emulating Standard Automatic Powerdown
If enhanced automatic powerdown isn't desired, the user can
implement the standard automatic powerdown feature
(mimics the function on the ICL3221E/23E/43E) by
connecting the INVALID output to the FORCEON and
FORCEOFF inputs, as shown in Figure 9. After 30
s of
invalid receiver levels, INVALID switches low and drives the
ICL32XXE into a forced powerdown condition. INVALID
switches high as soon as a receiver input senses a valid
RS-232 level, forcing the ICL32XXE to power on. See the
"INVALID DRIVING FORCEON AND FORCEOFF" section
of Table 2 for an operational summary. This operational
mode is perfect for handheld devices that communicate with
FIGURE 5. CIRCUIT TO ENSURE IMMEDIATE POWER UP
WHEN EXITING FORCED POWERDOWN
FORCEOFF
FORCEON
POWER
MASTER POWERDOWN LINE
1M
0.1
F
MANAGEMENT
UNIT
ICL32XXE
FIGURE 6. DEFINITION OF VALID RS-232 RECEIVER LEVELS
0.3V
-0.3V
-2.7V
2.7V
INVALID LEVEL - INVALID = 0
VALID RS-232 LEVEL - INVALID = 1
VALID RS-232 LEVEL - INVALID = 1
INDETERMINATE
INDETERMINATE
FIGURE 7. ENHANCED AUTOMATIC POWERDOWN LOGIC
30s
TIMER
S
R
FORCEOFF
AUTOSHDN
FORCEON
R_IN
T_IN
EDGE
DETECT
EDGE
DETECT
ICL3224E, ICL3226E, ICL3244E
11
another computer via a detachable cable. Detaching the
cable allows the internal receiver pull-down resistors to pull
the inputs to GND (an invalid RS-232 level), causing the
30
s timer to time-out and drive the IC into powerdown.
Reconnecting the cable restores valid levels, causing the IC
to power back up.
Hybrid Automatic Powerdown Options
For devices which communicate only through a detachable
cable, connecting INVALID to FORCEOFF (with
FORCEON = 0) may be a desirable configuration. While the
cable is attached INVALID and FORCEOFF remain high, so
the enhanced automatic powerdown logic powers down the
RS-232 device whenever there is 30 seconds of inactivity on
the receiver and transmitter inputs. Detaching the cable
allows the receiver inputs to drop to an invalid level (GND),
so INVALID switches low and forces the RS-232 device to
power down. The ICL32XXE remains powered down until
the cable is reconnected (INVALID = FORCEOFF = 1) and a
transition occurs on a receiver or transmitter input (see
Figure 7). For immediate power up when the cable is
reattached, connect FORCEON to FORCEOFF through a
network similar to that shown in Figure 5.
Ready Output (ICL3224E and ICL3226E only)
The Ready output indicates that the ICL322XE is ready to
transmit. Ready switches low whenever the device enters
powerdown, and switches back high during power-up when
V- reaches -4V or lower.
Capacitor Selection
The charge pumps require 0.1
F capacitors for 3.3V
operation. For other supply voltages refer to Table 3 for
capacitor values. Do not use values smaller than those listed
in Table 3. Increasing the capacitor values (by a factor of 2)
reduces ripple on the transmitter outputs and slightly
reduces power consumption. C
2
, C
3
, and C
4
can be
increased without increasing C
1
's value, however, do not
increase C
1
without also increasing C
2
, C
3
, and C
4
to
maintain the proper ratios (C
1
to the other capacitors).
RECEIVER
INPUTS
TRANSMITTER
OUTPUTS
INVALID
OUTPUT
V+
V
CC
0
V-
t
INVL
t
INVH
FIGURE 8. ENHANCED AUTOMATIC POWERDOWN, INVALID AND READY TIMING DIAGRAMS
READY
OUTPUT
TRANSMITTER
INPUTS
t
WU
t
AUTOPWDN
t
AUTOPWDN
t
WU
INVALID
REGION
}
FIGURE 9. CONNECTIONS FOR AUTOMATIC POWERDOWN
WHEN NO VALID RECEIVER SIGNALS ARE
PRESENT
FORCEOFF
IN
VALI
D
CPU
I/O
FORCEON
ICL32XXE
UART
ICL3224E, ICL3226E, ICL3244E
12
When using minimum required capacitor values, make sure
that capacitor values do not degrade excessively with
temperature. If in doubt, use capacitors with a larger nominal
value. The capacitor's equivalent series resistance (ESR)
usually rises at low temperatures and it influences the
amount of ripple on V+ and V-.
Power Supply Decoupling
In most circumstances a 0.1
F bypass capacitor is
adequate. In applications that are particularly sensitive to
power supply noise, decouple V
CC
to ground with a
capacitor of the same value as the charge-pump capacitor C
1
.
Connect the bypass capacitor as close as possible to the IC.
Operation Down to 2.7V
ICL32XXE transmitter outputs meet RS-562 levels (
3.7V),
at full data rate, with V
CC
as low as 2.7V. RS-562 levels
typically ensure inter operability with RS-232 devices.
Transmitter Outputs when Exiting
Powerdown
Figure 10 shows the response of two transmitter outputs
when exiting powerdown mode. As they activate, the two
transmitter outputs properly go to opposite RS-232 levels,
with no glitching, ringing, nor undesirable transients. Each
transmitter is loaded with 3k
in parallel with 2500pF. Note
that the transmitters enable only when the magnitude of the
supplies exceed approximately 3V.
Mouse Driveability
The ICL3244E is specifically designed to power a serial
mouse while operating from low voltage supplies. Figure 11
shows the transmitter output voltages under increasing load
current. The on-chip switching regulator ensures the
transmitters will supply at least
5V during worst case
conditions (15mA for paralleled V+ transmitters, 7.3mA for
single V- transmitter).
High Data Rates
The ICL32XXE maintain the RS-232
5V minimum
transmitter output voltages even at high data rates. Figure
12 details a transmitter loopback test circuit, and Figure 13
illustrates the loopback test result at 120kbps. For this test,
all transmitters were simultaneously driving RS-232 loads in
parallel with 1000pF, at 120kbps. Figure 14 shows the
loopback results for a single transmitter driving 1000pF and
an RS-232 load at 250kbps. The static transmitters were
also loaded with an RS-232 receiver.
TABLE 3. REQUIRED CAPACITOR VALUES
V
CC
(V)
C
1
(
F)
C
2
, C
3
, C
4
(
F)
3.0 to 3.6
0.1
0.1
4.5 to 5.5
0.047
0.33
3.0 to 5.5
0.1
0.47
TIME (20
s/DIV.)
T1
T2
2V/DIV.
5V/DIV.
V
CC
= +3.3V
FORCEOFF
FIGURE 10. TRANSMITTER OUTPUTS WHEN EXITING
POWERDOWN
C1 - C4 = 0.1
F
5V/DIV.
READY
FIGURE 12. TRANSMITTER LOOPBACK TEST CIRCUIT
FIGURE 11. TRANSMITTER OUTPUT VOLTAGE vs LOAD
CURRENT (PER TRANSMITTER, i.e., DOUBLE
CURRENT AXIS FOR TOTAL V
OUT+
CURRENT)
TRANSMIT
T
E
R
OU
TP
U
T
VOL
T
AGE (
V
)
LOAD CURRENT PER TRANSMITTER (mA)
0
2
4
6
8
10
-6
-4
-2
0
2
4
6
-5
-3
-1
1
3
5
1
3
5
7
9
V
OUT
+
V
OUT
-
V
CC
V
OUT
+
V
OUT
-
T1
T2
T3
V
CC
= 3.0V
ICL3244E
ICL32XXE
V
CC
C
1
C
2
C
4
C
3
+
+
+
+
1000pF
V+
V-
5K
T
IN
R
OUT
C1+
C1-
C2+
C2-
R
IN
T
OUT
+
V
CC
0.1
F
V
CC
FORCEOFF
FORCEON
ICL3224E, ICL3226E, ICL3244E
13
Interconnection with 3V and 5V Logic
The ICL32XXE directly interfaces with 5V CMOS and TTL
logic families. Nevertheless, with the ICL32XX at 3.3V, and
the logic supply at 5V, AC, HC, and CD4000 outputs can
drive ICL32XX inputs, but ICL32XX outputs do not reach the
minimum V
IH
for these logic families. See Table 4 for more
information.
15kV ESD Protection
All pins on ICL32XX devices include ESD protection
structures, but the ICL32XXE family incorporates advanced
structures which allow the RS-232 pins (transmitter outputs
and receiver inputs) to survive ESD events up to
15kV. The
RS-232 pins are particularly vulnerable to ESD damage
because they typically connect to an exposed port on the
exterior of the finished product. Simply touching the port
pins, or connecting a cable, can cause an ESD event that
might destroy unprotected ICs. These new ESD structures
protect the device whether or not it is powered up, protect
without allowing any latchup mechanism to activate, and
don't interfere with RS-232 signals as large as
25V.
Human Body Model (HBM) Testing
As the name implies, this test method emulates the ESD
event delivered to an IC during human handling. The tester
delivers the charge through a 1.5k
current limiting resistor,
making the test less severe than the IEC61000 test which
utilizes a 330
limiting resistor. The HBM method
determines an ICs ability to withstand the ESD transients
typically present during handling and manufacturing. Due to
the random nature of these events, each pin is tested with
respect to all other pins. The RS-232 pins on "E" family
devices can withstand HBM ESD events to
15kV.
IEC61000-4-2 Testing
The IEC 61000 test method applies to finished equipment,
rather than to an individual IC. Therefore, the pins most likely to
suffer an ESD event are those that are exposed to the outside
world (the RS-232 pins in this case), and the IC is tested in its
typical application configuration (power applied) rather than
testing each pin-to-pin combination. The lower current limiting
resistor coupled with the larger charge storage capacitor yields
a test that is much more severe than the HBM test. The extra
ESD protection built into this device's RS-232 pins allows the
design of equipment meeting level 4 criteria without the need
for additional board level protection on the RS-232 port.
AIR-GAP DISCHARGE TEST METHOD
For this test method, a charged probe tip moves toward the IC
pin until the voltage arcs to it. The current waveform delivered
to the IC pin depends on approach speed, humidity,
temperature, etc., so it is difficult to obtain repeatable results.
The "E" device RS-232 pins withstand
15kV air-gap
discharges.
CONTACT DISCHARGE TEST METHOD
During the contact discharge test, the probe contacts the
tested pin before the probe tip is energized, thereby
eliminating the variables associated with the air-gap
discharge. The result is a more repeatable and predictable
test, but equipment limits prevent testing devices at voltages
higher than
8kV. All "E" family devices survive
8kV contact
discharges on the RS-232 pins.
FIGURE 13. LOOPBACK TEST AT 120kbps
FIGURE 14. LOOPBACK TEST AT 250kbps
TABLE 4. LOGIC FAMILY COMPATIBILITY WITH VARIOUS
SUPPLY VOLTAGES
SYSTEM
POWER-SUPPLY
VOLTAGE
(V)
V
CC
SUPPLY
VOLTAGE
(V)
COMPATIBILITY
3.3
3.3
Compatible with all CMOS
families.
5
5
Compatible with all TTL and
CMOS logic families.
5
3.3
Compatible with ACT and HCT
CMOS, and with TTL. ICL32XX
outputs are incompatible with AC,
HC, and CD4000 CMOS inputs.
T1
IN
T1
OUT
R1
OUT
5
s/DIV.
V
CC
= +3.3V
5V/DIV.
C1 - C4 = 0.1
F
T1
IN
T1
OUT
R1
OUT
2
s/DIV.
5V/DIV.
V
CC
= +3.3V
C1 - C4 = 0.1
F
ICL3224E, ICL3226E, ICL3244E
14
Typical Performance Curves
V
CC
= 3.3V, T
A
= 25C
FIGURE 15. TRANSMITTER OUTPUT VOLTAGE vs LOAD
CAPACITANCE
FIGURE 16. SLEW RATE vs LOAD CAPACITANCE
FIGURE 17. SUPPLY CURRENT vs LOAD CAPACITANCE
WHEN TRANSMITTING DATA
FIGURE 18. SUPPLY CURRENT vs LOAD CAPACITANCE
WHEN TRANSMITTING DATA
FIGURE 19. SUPPLY CURRENT vs LOAD CAPACITANCE
WHEN TRANSMITTING DATA
FIGURE 20. SUPPLY CURRENT vs SUPPLY VOLTAGE
-6
-4
-2
0
2
4
6
1000
2000
3000
4000
5000
0
LOAD CAPACITANCE (pF)
TRANSMITT
E
R
OUT
P
UT
VOLT
AGE (V)
1 TRANSMITTER AT 250kbps
V
OUT
+
V
OUT
-
OTHER TRANSMITTERS AT 30kbps
LOAD CAPACITANCE (pF)
SL
EW
R
A
T
E
(
V
/
s)
0
1000
2000
3000
4000
5000
5
10
15
20
25
+SLEW
-SLEW
5
10
15
20
25
40
30
35
0
1000
2000
3000
4000
5000
LOAD CAPACITANCE (pF)
SUPPLY CURRENT
(
m
A)
20kbps
250kbps
120kbps
ICL3224E
0
5
10
15
20
35
25
30
0
1000
2000
3000
4000
5000
LOAD CAPACITANCE (pF)
S
U
P
P
LY CURR
E
N
T
(mA)
20kbps
250kbps
120kbps
ICL3226E
10
15
20
25
30
45
35
40
0
1000
2000
3000
4000
5000
LOAD CAPACITANCE (pF)
S
U
P
P
LY CURR
E
N
T
(mA)
20kbps
250kbps
120kbps
ICL3244E
SUPPLY
CURRENT (
m
A)
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
0
0.5
1.0
1.5
2.0
SUPPLY VOLTAGE (V)
2.5
3.0
3.5
NO LOAD
ALL OUTPUTS STATIC
ICL3224E, ICL3226E, ICL3244E
15
Die Characteristics
SUBSTRATE POTENTIAL (POWERED UP)
GND
TRANSISTOR COUNT
ICL3224E: 937
ICL3226E: 825
ICL3244E: 1109
PROCESS
Si Gate CMOS
ICL3224E, ICL3226E, ICL3244E
16
ICL3224E, ICL3226E, ICL3244E
Shrink Small Outline Plastic Packages (SSOP)
NOTES:
1. Symbols are defined in the "MO Series Symbol List" in Section
2.2 of Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension "D" does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.20mm (0.0078 inch) per side.
4. Dimension "E" does not include interlead flash or protrusions. In-
terlead flash and protrusions shall not exceed 0.20mm (0.0078
inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual
index feature must be located within the crosshatched area.
6. "L" is the length of terminal for soldering to a substrate.
7. "N" is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension "B" does not include dambar protrusion. Allowable
dambar protrusion shall be 0.13mm (0.005 inch) total in excess
of "B" dimension at maximum material condition.
10. Controlling dimension: MILLIMETER. Converted inch dimen-
sions are not necessarily exact.
INDEX
AREA
E
D
N
1
2
3
-B-
0.25(0.010)
C A
M
B S
e
-A-
B
M
-C-
A1
A
SEATING PLANE
0.10(0.004)
C
H
0.25(0.010)
B
M
M
L
0.25
0.010
GAUGE
PLANE
A2
M20.209
(JEDEC MO-150-AE ISSUE B)
20 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE
SYMBOL
INCHES
MILLIMETERS
NOTES
MIN
MAX
MIN
MAX
A
0.068
0.078
1.73
1.99
A1
0.002
0.008'
0.05
0.21
A2
0.066
0.070'
1.68
1.78
B
0.010'
0.015
0.25
0.38
9
C
0.004
0.008
0.09
0.20'
D
0.278
0.289
7.07
7.33
3
E
0.205
0.212
5.20'
5.38
4
e
0.026 BSC
0.65 BSC
H
0.301
0.311
7.65
7.90'
L
0.025
0.037
0.63
0.95
6
N
20
20
7
0 deg.
8 deg.
0 deg.
8 deg.
Rev. 3 11/02
17
ICL3224E, ICL3226E, ICL3244E
Small Outline Plastic Packages (SSOP)
NOTES:
1. Symbols are defined in the "MO Series Symbol List" in Section 2.2 of
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension "D" does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.20mm (0.0078
inch) per side.
4. Dimension "E" does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.20mm (0.0078 inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. "L" is the length of terminal for soldering to a substrate.
7. "N" is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension "B" does not include dambar protrusion. Allowable dambar
protrusion shall be 0.13mm (0.005 inch) total in excess of "B" dimen-
sion at maximum material condition.
10. Controlling dimension: MILLIMETER. Converted inch dimensions are
not necessarily exact.
INDEX
AREA
E
D
N
1
2
3
-B-
0.25(0.010)
C A
M
B S
e
-A-
L
B
M
-C-
A1
A
SEATING PLANE
0.10(0.004)
C
H
0.25(0.010)
B
M
M
0.25
0.010
GAUGE
PLANE
A2
M16.209
(JEDEC MO-150-AC ISSUE B)
16 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE
SYMBOL
INCHES
MILLIMETERS
NOTES
MIN
MAX
MIN
MAX
A
-
0.078
-
2.00
-
A1
0.002
-
0.05
-
-
A2
0.065
0.072
1.65
1.85
-
B
0.009
0.014
0.22
0.38
9
C
0.004
0.009
0.09
0.25
-
D
0.233
0.255
5.90
6.50
3
E
0.197
0.220
5.00
5.60
4
e
0.026 BSC
0.65 BSC
-
H
0.292
0.322
7.40
8.20
-
L
0.022
0.037
0.55
0.95
6
N
16
16
7
0
o
8
o
0
o
8
o
-
Rev. 2 3/95
18
ICL3224E, ICL3226E, ICL3244E
Shrink Small Outline Plastic Packages (SSOP)
NOTES:
1. Symbols are defined in the "MO Series Symbol List" in Section 2.2
of Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension "D" does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.20mm (0.0078 inch) per side.
4. Dimension "E" does not include interlead flash or protrusions. Inter-
lead flash and protrusions shall not exceed 0.20mm (0.0078 inch)
per side.
5. The chamfer on the body is optional. If it is not present, a visual in-
dex feature must be located within the crosshatched area.
6. "L" is the length of terminal for soldering to a substrate.
7. "N" is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension "B" does not include dambar protrusion. Allowable dam-
bar protrusion shall be 0.13mm (0.005 inch) total in excess of "B"
dimension at maximum material condition.
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
INDEX
AREA
E
D
N
1
2
3
-B-
0.25(0.010)
C A
M
B S
e
-A-
L
B
M
-C-
A1
A
SEATING PLANE
0.10(0.004)
C
H
0.25(0.010)
B
M
M
0.25
0.010
GAUGE
PLANE
A2
M28.209
(JEDEC MO-150-AH ISSUE B)
28 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE
SYMBOL
INCHES
MILLIMETERS
NOTES
MIN
MAX
MIN
MAX
A
-
0.078
-
2.00
-
A1
0.002
-
0.05
-
-
A2
0.065
0.072
1.65
1.85
-
B
0.009
0.014
0.22
0.38
9
C
0.004
0.009
0.09
0.25
-
D
0.390
0.413
9.90
10.50
3
E
0.197
0.220
5.00
5.60
4
e
0.026 BSC
0.65 BSC
-
H
0.292
0.322
7.40
8.20
-
L
0.022
0.037
0.55
0.95
6
N
28
28
7
0
o
8
o
0
o
8
o
-
Rev. 1 3/95
19
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
ICL3224E, ICL3226E, ICL3244E
Small Outline Plastic Packages (SOIC)
NOTES:
1. Symbols are defined in the "MO Series Symbol List" in Section 2.2
of Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension "D" does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.15mm (0.006 inch) per side.
4. Dimension "E" does not include interlead flash or protrusions. In-
terlead flash and protrusions shall not exceed 0.25mm (0.010
inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual
index feature must be located within the crosshatched area.
6. "L" is the length of terminal for soldering to a substrate.
7. "N" is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width "B", as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch)
10. Controlling dimension: MILLIMETER. Converted inch dimen-
sions are not necessarily exact.
INDEX
AREA
E
D
N
1
2
3
-B-
0.25(0.010)
C A
M
B S
e
-A-
L
B
M
-C-
A1
A
SEATING PLANE
0.10(0.004)
h x 45
o
C
H
0.25(0.010)
B
M
M
M28.3
(JEDEC MS-013-AE ISSUE C)
28 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE
SYMBOL
INCHES
MILLIMETERS
NOTES
MIN
MAX
MIN
MAX
A
0.0926
0.1043
2.35
2.65
-
A1
0.0040
0.0118
0.10
0.30
-
B
0.013
0.0200
0.33
0.51
9
C
0.0091
0.0125
0.23
0.32
-
D
0.6969
0.7125
17.70
18.10
3
E
0.2914
0.2992
7.40
7.60
4
e
0.05 BSC
1.27 BSC
-
H
0.394
0.419
10.00
10.65
-
h
0.01
0.029
0.25
0.75
5
L
0.016
0.050
0.40
1.27
6
N
28
28
7
0
o
8
o
0
o
8
o
-
Rev. 0 12/93
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