1
TM
File Number
3130.3
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
|
Intersil and Design is a trademark of Intersil Corporation.
|
Copyright
Intersil Corporation 2000
IH5043
Dual SPDT CMOS Analog Switch
The IH5043 analog switch uses an improved, high voltage
CMOS monolithic technology. These devices provide ease
of use and performance advantages not previously
available from solid state switches.
Key performance advantage is TTL compatibility and ultra
low power operation. The quiescent current requirement is
less than 1mA. Also, the IH5043 guarantees Break-Before-
Make switching, accomplished by extending the t
ON
time
(300ns Typ), so that it exceeds t
OFF
time (200ns Typ). This
insures that an ON channel will be turned OFF before an
OFF channel can turn ON. The need for external logic
required to avoid channel to channel shorting during
switching is eliminated.
Schematic Diagram
FUNCTIONAL DRIVER, TYPICAL DRIVER, GATE (
1
/
2
AS SHOWN)
Features
See HI504X for Other Functions
Dual SPDT
Switches Greater than 20V
P-P
Signals with
15V Supplies
Quiescent Current Less than 1mA
Break-Before-Make Switching t
OFF
200ns, t
ON
300ns (Typ)
TTL, DTL, CMOS, PMOS Compatible
Pinout
IH5043
(PDIP, SOIC)
TOP VIEW
Functional Diagram
Part Number Information
PART NUMBER
TEMP.
RANGE (
o
C)
PACKAGE
PKG.
NO.
IH5043CPE
0 to 70
16 Ld PDIP
E16.3
IH5043CY
0 to 70
16 Ld SOIC
M16.15
V+
IN
Q
3
5K
Q
1
GND
V
L
Q
2
10K
Q
5
V-
Q
6
1K
2K
Q
4
Q
7
Q
8
400
S
3
S
1
Q
9
D
1
Q
10
Q
11
FLOATS
D
3
Q
12
FLOATS
400
TRUTH TABLE
LOGIC
SWITCH 1, 2
SWITCH 3, 4
0
Off
On
1
On
Off
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
D
1
NC
D
3
S
4
D
4
D
2
NC
S
1
V-
GND
V
L
V+
IN
2
S
2
IN
1
S
3
15
10
9
4
16
5
8
3
1
6
S
1
S
3
IN
1
IN
2
S
2
S
4
D
1
D
3
D
2
D
4
V
L
V+
GND
12
11
13
14
V-
SWITCH STATES SHOWN ARE FOR LOGIC "1" INPUT
Data Sheet
March 2000
[ /Title
(IH504
3)
/Sub-
ject
(Dual
SPDT
CMOS
Ana-
log
Switch
)
/Autho
r ()
/Key-
words
(Inter-
sil
Corpo-
ration,
semi-
con-
ductor,
Dual
SPDT
CMOS
Ana-
log
Switch
)
/Cre-
ator ()
/DOCI
NFO
pdf-
mark
[
OBSOLETE PR
ODUCT
POSSIBLE SUBSTITUTE PR
ODUCT
HI-5043
2
Absolute Maximum Ratings
Thermal Information
V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <36V
V+ to V
D
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <30V
V
D
to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <30V
V
D
to V
S
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .<
22V
V
L
to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <33V
V
L
to V
IN
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <30V
V
L
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <20V
V
IN
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <20V
Continuous Current (S-D) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30mA
Peak Current S-D (Pulsed 1ms, 10% Duty Cycle Max) . . . . . . 70mA
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . 0
o
C to 70
o
C
Thermal Resistance (Typical, Note 1)
JA
(
o
C/W)
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
90
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
115
Maximum Junction Temperature (Plastic Packages) . . . . . . .150
o
C
Maximum Storage Temperature. . . . . . . . . . . . . . . . -65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300
o
C
(SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1.
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
V+ = +15V, V- = -15V, V
L
= +5V
PER CHANNEL PARAMETER
TEST CONDITIONS
(NOTES 2, 3)
UNITS
0
o
C
25
o
C
70
o
C
DYNAMIC CHARACTERISTICS
Turn ON Time, t
ON
R
L
= 1k
, V
ANALOG
= -10V to +10V, See
Figure 6
-
1000
-
ns
Turn OFF Time, t
OFF
-
500
-
ns
Charge Injection, Q
See Figure 7
-
20 (Typ)
-
mV
OFF Isolation, OIRR
f = 1MHz, R
L
= 100
, C
L
5pF, See Figure 4
-
50 (Typ)
-
dB
Crosstalk, CCRR
One Channel Off; Any Other Channel
Switches as per Figure 3
-
-50 (Typ)
-
dB
DIGITAL INPUT CHARACTERISTICS
Input Logic Current, I
IN(ON)
V
IN
= 2.4V
1
1
10
A
Input Logic Current, I
IN(OFF)
V
IN
= 0.8V
1
1
10
A
ANALOG SWITCH CHARACTERISTICS
Drain-Source ON Resistance, r
DS(ON)
I
S
= 10mA, V
ANALOG
= -10V to +10V
80
80
130
Channel-to-Channel r
DS(ON)
Match,
r
DS(ON)
-
30 (Typ)
-
Minimum Analog Signal Handling Capability, V
ANALOG
-
10 (Typ)
-
V
Switch OFF Leakage Current, I
D(OFF)
, I
S(OFF)
V
ANALOG
= -10V to +10V
-
5
100
nA
Switch ON Leakage Current, I
D(ON)
+I
S(ON)
V
D
= V
S
= -10V to +10V
-
10
100
nA
POWER SUPPLY CHARACTERISTICS
+ Power Supply Quiescent Current, I+
10
10
100
A
- Power Supply Quiescent Current, I-
10
10
100
A
+5V Supply Quiescent Current, I
L
10
10
100
A
Ground Quiescent Current, I
GND
10
10
100
A
NOTES:
2. Typical values are for design aid only, not guaranteed and not subject to production testing.
3. Min or Max value unless otherwise specified.
IH5043
PDF 
ZIP
