1
FN8225.3
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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Intersil (and design) is a registered trademark of Intersil Americas Inc.
XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
ISL90460
Single Volatile 32-Tap XDCPTM
Digitally Controlled Potentiometer (XDCP)
The Intersil ISL90460 is a digitally controlled potentiometer
(XDCP). Configured as a variable resistor, the device
consists of a resistor array, wiper switches, a control section,
and volatile memory. The wiper position is controlled by a
2-pin Up/Down interface.
The potentiometer is implemented by a resistor array
composed of 31 resistive elements and a wiper switching
network. Between each element and at either end are tap
points accessible to the wiper terminal. The position of the
wiper element is controlled by the CS and U/D inputs.
The device can be used in a wide variety of applications
including:
LCD contrast control
Parameter and bias adjustments
Industrial and automotive control
Transducer adjustment of pressure, temperature, position,
chemical, and optical sensors
Laser Diode driver biasing
Gain control and offset adjustment
Features
Volatile Solid-State Potentiometer
2-pin UP/DN Interface
DCP Terminal Voltage, 2.7V to 5.5V
Tempco 35ppm/
C Typical
32 Wiper Tap Points
Low Power CMOS
- Active current 25A max.
- Supply current 0.3A
Available R
TOTAL
Values = 10k
, 50k, 100k
Temp Range
-40C to +85C
Packages
- 5 Ld SC-70, SOT-23
Pb-Free Plus Anneal Available (RoHS Compliant)
Pinout
ISL90460
(5 LD SOT-23, SC-70)
TOP VIEW
VDD
GND
U/D
RH
CS
Ordering Information
PART NUMBER
PART MARKING
R
TOTAL
(K)
TEMP RANGE (C) PACKAGE (Tape and Reel) PKG. DWG. #
ISL90460WIE527-TK
AJM
10
-40 to +85
5 Ld SC-70
P5.049
ISL90460WIE527Z-TK (See Note)
DDY
-40 to +85
5 Ld SC-70 (Pb-free)
P5.049
ISL90460WIH527-TK
AJV
-40 to +85
5 Ld SOT-23
P5.046
ISL90460WIH527Z -TK (See Note) DDZ
-40 to +85
5 Ld SOT-23 (Pb-free)
P5.046
ISL90460UIE527-TK
AJN
50
-40 to +85
5 Ld SC-70
P5.049
ISL90460UIE527Z-TK (See Note)
DDW
-40 to +85
5 Ld SC-70 (Pb-free)
P5.049
ISL90460UIH527-TK
AJX
-40 to +85
5 Ld SOT-23
P5.046
ISL90460UIH527Z -TK (See Note) DDX
-40 to +85
5 Ld SOT-23 (Pb-free)
P5.046
ISL90460TIE527-TK
AJO
100
-40 to +85
5 Ld SC-70
P5.049
ISL90460TIE527Z-TK (See Note)
DDU
-40 to +85
5 Ld SC-70 (Pb-free)
P5.049
ISL90460TIH527-TK
AJW
-40 to +85
5 Ld SOT-23
P5.046
ISL90460TIH527Z-TK (See Note)
DDV
-40 to +85
5 Ld SOT-23 (Pb-free)
P5.046
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are
RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J STD-020.
Data Sheet
October 7, 2005
2
FN8225.3
October 7, 2005
Block Diagram
CONTROL
AND
MEMORY
UP/DOWN
(U/D)
DEVICE SELECT
(CS)
GND (GROUND)
RH
GENERAL
V
CC
Pin Descriptions
SOT-23/SC-70
5-PIN
SYMBOL
DESCRIPTION
1
VDD
Supply voltage
2
GND
Ground
3
U/D
Up - Down
4
CS
Chip select
5
RH
High terminal/Wiper terminal
ISL90460
3
FN8225.3
October 7, 2005
Equivalent Circuit
Absolute Maximum Ratings
Recommended Operating Conditions
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65C to +150C
Voltage on CS, U/D and V
CC
with Respect to GND . . . . -1V to +7V
Lead Temperature (Soldering 10s) . . . . . . . . . . . . . . . . . . . . . 300C
I
W
(10s) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6mA
Power Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1mW
Temperature Range (Industrial) . . . . . . . . . . . . . . . . . . -40C to 85C
Supply Voltage (V
CC
) . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 5.5V
CAUTION: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only; functional operation
of the device (at these or any other conditions above those listed in the operational sections of this specification) is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
Potentiometer Specifications
Over recommended operating conditions unless otherwise stated
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
(Note 4)
MAX
UNIT
R
TOT
End to end resistance
W version
8
10
12
k
U version
40
50
60
k
T version
80
100
120
k
V
R
R
H
, R
L
terminal voltages
0
V
CC
V
Noise
Ref: 1kHz
-120
dBV
R
W
Wiper Resistance
600
I
W
Wiper Current
0.6
mA
Resolution
1
32
Taps
Absolute linearity
(Note 1)
R
H(n)(actual)
- R
H(n)(expected)
1
MI
(Note 3)
Relative linearity
(Note 2)
R
H(n+1)
- [R
H(n)+MI
]
0.5
MI
(Note 3)
R
TOTAL
temperature coefficient
35
ppm/C
C
H
/C
L
/C
W
Potentiometer capacitances
See equivalent circuit
10/10/25
pF
NOTES:
1. Absolute linearity is utilized to determine actual wiper voltage versus expected voltage = (R
H
(n)
(actual) - R
H
(n)
(expected)) = 1 Ml Maximum.
n = 1 .. 29 only.
2. Relative linearity is a measure of the error in step size between taps = R
H
(n+1)
- [R
H
(n)
+ Ml] = 0.5 Ml, n = 1 .. 29 only.
3. 1 Ml = Minimum Increment = R
TOT
/31.
4. Typical values are for T
A
= 25C and nominal supply voltage.
C
H
C
L
R
W
R
TOTAL
C
W
R
H
R
L
ISL90460
FN8225.2
June 6, 2005
4
FN8225.3
October 7, 2005
DC Electrical Specifications
Over recommended operating conditions unless otherwise specified.
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
TYP
(Note 4)
MAX
UNIT
I
CC
VCC active current (Increment)
CS = 0V, U/D = f
clock
= 1MHz and
V
CC
= 3V
25
A
I
SB
Standby supply current
CS = V
CC
, U/D = V
SS
or V
CC
= 3V
0.3
1
A
I
LI
CS input leakage current
V
IN
= V
SS
to V
CC
1
A
I
LI
U/D input leakage current
V
IN
= V
SS
to V
CC
1
A
V
IH
CS, U/D input HIGH voltage
V
CC
x 0.7
V
V
IL
CS, U/D input LOW voltage
V
CC
x 0.3
V
C
IN
CS, U/D input capacitance
V
CC
= 3V, V
IN
= V
SS
, T
A
= 25C,
f = 1MHz
10
pF
Timing Specifications
Over recommended operating conditions unless otherwise specified) (Figures 1 and 2)
SYMBOL
PARAMETER
MIN
TYP (Note 4)
MAX
UNIT
t
CU
U/D to CS setup
25
ns
t
CI
CS to U/D setup
50
ns
t
IC
CS to U/D hold
25
ns
t
lL
U/D LOW period
300
ns
t
lH
U/D HIGH period
300
ns
f
TOGGLE
Up/Down toggle rate
1
MHz
t
SETTLE
Output settling time
1
s
CS
U/D
RH
t
CU
t
CI
t
IL
t
IH
t
IC
t
SETTLE
FIGURE 1. SERIAL INTERFACE TIMING DIAGRAM, INCREMENT
ISL90460
5
FN8225.3
October 7, 2005
Pin Descriptions
RH
The ISL90460 contains a digital potentiometer connected as
a rheostat or variable resistor. The wiper and one terminal of
the digital potentiometer is tied to the RH pin, and the other
terminal of the potentiometer is tied to the ground pin (GND).
The resistance from the RH pin to ground will vary with the
potentiometer setting; at the highest setting, the resistance
will be the maximum (Rtot), at the lowest setting it will be a
minimum.
Up/Down (U/D)
The U/D input controls the direction of the wiper movement
and whether the counter is incremented or decremented.
Chip Select (CS)
The device is selected when the CS input is LOW. The
current counter value is stored in volatile memory when CS
is returned HIGH. When CS is high, the device is placed in
low power standby mode.
Principles of Operation
There are two sections of the ISL90460: the input control,
counter and decode section; and the resistor array. The input
control section operates just like an up/down counter. The
output of this counter is decoded to turn on a single
electronic switch connecting a point on the resistor array to
the wiper output. The resistor array is comprised of 31
individual resistors connected in series. At either end of the
array and between each resistor is an electronic switch that
transfers the connection at that point to the wiper. The wiper
is connected to the RH terminal, forming a variable resistor
from RH to GND.
The direction of the wiper movement is defined when the
device is selected. If during CS transition from High to Low
the U/D input is LOW, the wiper will move down on each
rising edge of U/D toggling. Similarly, the wiper will move up
on each rising edge of U/D toggling if, during CS transition
from High to Low, the U/D input is High.
The wiper, when at either fixed terminal, acts like its
mechanical equivalent and does not move beyond the last
position. That is, the counter does not wrap around when
clocked to either extreme.
If the wiper is moved several positions, multiple taps are
connected to the wiper for t
SETTLE
(U/D to RH change). The
2-terminal resistance value for the device can temporarily
change by a significant amount if the wiper is moved several
positions.
CS
U/D
RH
t
CU
t
CI
t
IL
t
IH
t
IC
t
SETTLE
FIGURE 2. SERIAL INTERFACE TIMING DIAGRAM, DECREMENT
ISL90460
FN8225.2
June 6, 2005
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