6-229
File Number
1558.3
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
http://www.intersil.com or 407-727-9207
|
Copyright
Intersil Corporation 1999
RFP15N05L, RFP15N06L
15A, 50V and 60V, 0.140 Ohm, Logic Level
N-Channel Power MOSFETs
These are N-Channel enhancement mode silicon gate
power field effect transistors designed for applications such
as switching regulators, switching converters, motor drivers,
relay drivers and drivers for high power bipolar switching
transistors requiring high speed and low gate drive power.
These types can be operated directly from integrated
circuits.
Formerly developmental type TA0522.
Features
15A, 50V and 60V
r
DS(ON)
= 0.140
Design Optimized for 5V Gate Drives
Can be Driven from QMOS, NMOS, TTL Circuits
Compatible with Automotive Drive Requirements
SOA is Power Dissipation Limited
Nanosecond Switching Speeds
Linear Transfer Characteristics
High Input Impedance
Majority Carrier Device
Related Literature
- TB334 "Guidelines for Soldering Surface Mount
Components to PC Boards"
Symbol
Packaging
JEDEC TO-220AB
Ordering Information
PART NUMBER
PACKAGE
BRAND
RFP15N05L
TO-220AB
RFP15N05L
RFP15N06L
TO-220AB
RFP15N06L
NOTE:
When ordering, use the entire part number.
D
G
S
SOURCE
DRAIN
GATE
DRAIN
(TAB)
Data Sheet
July 1999
6-230
Absolute Maximum Ratings
T
C
= 25
o
C, Unless Otherwise Specified
RFP15N05L
RFP15N06L
UNITS
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DSS
50
60
V
Drain to Gate Voltage (R
GS
= 20k
)
(Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DGR
50
60
V
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
D
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
DM
15
40
15
40
A
A
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
GS
10
10
V
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
D
Above T
C
= 25
o
C, Derate Linearly . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
60
0.48
60
0.48
W
W/
o
C
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T
J,
T
STG
-55 to 150
-55 to 150
o
C
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
L
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
pkg
300
260
300
260
o
C
o
C
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. T
J
= 25
o
C to 125
o
C.
Electrical Specifications
T
C
= 25
o
C, Unless Otherwise Specified
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Drain to Source Breakdown Voltage
BV
DSS
I
D
= 250
A, V
GS
= 0V
RFP15N05L
50
-
-
V
RFP15N06L
60
-
-
V
Gate Threshold Voltage
V
GS(TH)
V
GS
= V
DS
, I
D
= 250
A (Figure 7)
1
-
2
V
Zero Gate Voltage Drain Current
I
DSS
V
DS
= 48V, V
DS
= 50V
-
-
1
A
V
DS
= 48V, V
DS
= 50V
TC = 125
o
C
-
-
50
A
Gate to Source Leakage Current
I
GSS
V
GS
=
10V, V
DS
= 0V
-
-
100
nA
Drain to Source On Resistance (Note 2)
r
DS(ON)
I
D
= 15A, V
GS
= 5V (Figures 5, 6)
-
-
0.140
Input Capacitance
C
ISS
V
DS
= 25V, V
GS
= 0V, f = 1MHz
(Figure 8)
-
-
900
pF
Output Capacitance
C
OSS
-
-
450
pF
Reverse-Transfer Capacitance
C
RSS
-
-
200
pF
Turn-On Delay Time
t
d(ON)
V
DD
= 30V, I
D
= 7.5A, R
G
= 6.25
(Figures 10, 11)
-
16
40
ns
Rise Time
t
r
-
250
325
ns
Turn-Off Delay Time
t
d(OFF)
-
200
325
ns
Fall Time
t
f
V
GS
= 5V
-
225
325
ns
R
JC
RFP15N05L, RFP15N06L
-
-
2.083
o
C/W
Source to Drain Diode Specifications
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Source to Drain Diode Voltage (Note 2)
V
SD
I
SD
= 7.5A
-
-
1.4
V
Diode Reverse Recovery Time
t
rr
I
SD
= 4A, dI
SD
/dt = 100A/
s
-
225
-
ns
NOTE:
2. Pulsed: pulse duration =
300
s maximum, duty cycle =
2%.
3. Repititive rating: pulse width limited by maximum junction temperature.
RFP15N05L, RFP15N06L
6-231
Typical Performance Curves
Unless Otherwise Specified
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE
FIGURE 2. FORWARD BIAS SAFE OPERATING AREA
FIGURE 3. SATURATION CHARACTERISTICS
FIGURE 4. TRANSFER CHARACTERISTICS
FIGURE 5. DRAIN TO SOURCE ON RESISTANCE vs DRAIN
CURRENT
FIGURE 6. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
0
50
100
150
0
T
C
, CASE TEMPERATURE (
o
C)
PO
WER DISSIP
A
TION MUL
TIPLIER
0.2
0.4
0.6
0.8
1.0
1.2
1
10
100
1000
V
DS
, DRAIN SOURCE VOLTAGE (V)
100
10
1
0
I
D
, DRAIN CURRENT (A)
OPERATION IN
THIS AREA IS
LIMITED BY r
DS(ON)
I
D
MAX CONTINUOUS
RFP15N06L
RFP15N05L
DC OPERA
TION
CURVES MUST BE
DERATED LINEARLY
WITH INCREASE IN
TEMPERATURE
T
C
= 25
o
C
V
GS
= 10V
0
1
2
3
4
5
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
40
30
20
10
0
I
DS
, DRAIN T
O
SOURCE CURRENT (A)
PULSE DURATION = 80
s
DUTY CYCLE
0.5% MAX
T
C
= 25
o
C
V
GS
= 7.5V
V
GS
= 3.5V
V
GS
= 3V
V
GS
= 5V
V
GS
= 4.5V
V
GS
= 4V
V
GS
= 2V
V
GS
= 2.5V
0
1
2
3
4
5
V
GS
, GATE TO SOURCE VOLTAGE (V)
16
14
12
10
8
6
4
2
0
I
DS
, DRAIN T
O
SOURCE CURRENT
-40
o
C
125
o
C
25
o
C
V
DS
= 10V
PULSE DURATION = 80
s
DUTY CYCLE
0.5% MAX
125
o
C
-40
o
C
0
2
4
6
8
10
12
14
16
I
D
, DRAIN TO SOURCE CURRENT (A)
0
r
DS(ON)
, DRAIN T
O
SOURCE
ON RESIST
ANCE (
)
V
GS
= 5V
PULSE DURATION = 80
s
DUTY CYCLE
0.5% MAX
0.3
0.2
0.1
T
C
= 125
o
C
25
o
C
-40
o
C
V
GS
= 10V, I
D
= 15A
2.0
1.5
1
0.5
0
-50
0
50
100
150
200
T
J
, JUNCTION TEMPERATURE (
o
C)
NORMALIZED DRAIN T
O
SOURCE
ON RESIST
ANCE
PULSE DURATION = 80
s
DUTY CYCLE = 0.5% MAX
RFP15N05L, RFP15N06L
6-232
FIGURE 7. NORMALIZED GATE THRESHOLD VOLTAGE vs
JUNCTION TEMPERATURE
FIGURE 8. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
NOTE: Refer to Intersil Application Notes AN7254 and AN7260.
FIGURE 9. NORMALIZED SWITCHING WAVEFORMS FOR CONSTANT GATE CURRENT
Test Circuits and Waveforms
FIGURE 10. SWITCHING TIME TEST CIRCUIT
FIGURE 11. RESISTIVE SWITCHING WAVEFORMS
Typical Performance Curves
Unless Otherwise Specified (Continued)
V
GS
= V
DS
I
D
= 250
A
1.4
1.2
1
0.8
0.6
-50
0
50
100
150
200
T
J
, JUNCTION TEMPERATURE (
o
C)
NORMALIZED GA
TE THRESHOLD
VO
L
T
AG
E
1600
1400
1200
1000
800
600
400
200
0
0
10
20
30
40
50
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
C, CAP
A
CIT
ANCE (pF)
C
RSS
C
OSS
C
ISS
V
GS
= 0V, f = 1MHz
C
ISS
= C
GS
+ C
GD
C
RSS
= C
GD
C
OSS
C
DS
+ C
GD
60
45
30
15
0
10
8
6
4
2
0
GATE SOURCE
VOLTAGE
R
L
= 4
I
G
(REF) = 0.5mA
V
GS
= 5V
DRAIN SOURCE VOLTAGE
DRAIN T
O
SOURCE V
O
L
T
A
GE (V)
GA
TE T
O
SOURCE V
O
L
T
A
GE (V)
I
G
(REF)
I
G
(ACT)
20
I
G
(REF)
I
G
(ACT)
80
t, TIME (
s)
BV
DSS
V
DD
= BV
DSS
V
DD
= BV
DSS
0.75BV
DSS
0.50BV
DSS
0.25BV
DSS
V
GS
R
L
R
G
DUT
+
-
V
DD
t
ON
t
d(ON)
t
r
90%
10%
V
DS
90%
10%
t
f
t
d(OFF)
t
OFF
90%
50%
50%
10%
PULSE WIDTH
V
GS
0
0
RFP15N05L, RFP15N06L
6-233
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
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NORTH AMERICA
Intersil Corporation
P. O. Box 883, Mail Stop 53-204
Melbourne, FL 32902
TEL: (407) 724-7000
FAX: (407) 724-7240
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100, Rue de la Fusee
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Taipei, Taiwan
Republic of China
TEL: (886) 2 2716 9310
FAX: (886) 2 2715 3029
FIGURE 12. GATE CHARGE TEST CIRCUIT
FIGURE 13. GATE CHARGE WAVEFORMS
Test Circuits and Waveforms
(Continued)
R
L
V
GS
+
-
V
DS
V
DD
DUT
I
G(REF)
V
DD
Q
g(TH)
V
GS
= 1V
Q
g(5)
V
GS
= 5V
Q
g(TOT)
V
GS
= 10V
V
DS
V
GS
I
G(REF)
0
0
RFP15N05L, RFP15N06L
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