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Электронный компонент: X9015WS8-2.7

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1
FN8157.1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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Intersil (and design) is a registered trademark of Intersil Americas Inc.
XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
X9015
Low Noise, Low Power, Volatile
Single Digitally Controlled (XDCPTM)
Potentiometer
The Intersil X9015 is a 32 tap potentiometer that is volatile.
The device consists of a string of 31 resistors that can be
programmed to connect the R
W
/V
W
wiper output with any of
the nodes between the connecting resistors. The connection
point of the wiper is determined by information
communicated to the device on the 3-wire port. The 3-wire
port changes the tap position by a falling edge on the
increment pin. The direction the wiper moves is determined by
the state of the up/down pin. The wiper position at power up is
Tap #15.
The X9015 can be used in a wide variety of applications that
require a digitally controlled variable resistor to set analog
values.
Features
32 taps
Three-wire up/down serial interface
V
CC
= 2.7V5V
Operating I
CC
= 50A max.
Standby current = 1A max.
R
TOTAL
= 10k
, 50k, 100k
Packages SOIC-8, MSOP-8
Pb-free plus anneal available (RoHS compliant)
Pinout
Block Diagram
V
CC
CS
INC
U/D
R
H
/V
H
V
SS
1
2
3
4
8
7
6
5
X9015
SOIC/MSOP
R
L
/V
L
R
W
/V
W
5-Bit
Up/Down
Counter
Control
Circuitry
One
of
Decoder
Resistor
Array
R
H
/V
H
U/D
INC
CS
Transfer
Gates
Thirty
V
CC
V
SS
R
L
/V
L
R
W
/V
W
Control
Up/Down
(U/D)
Increment
(INC)
Device Select
(CS)
V
CC
(Supply Voltage)
V
SS
(Ground)
R
H
/V
H
R
W
/V
W
R
L
/V
L
General
Detailed
0
1
2
28
29
30
31
Two
Data Sheet
September 15, 2005
2
FN8157.1
September 15, 2005
Ordering Information
PART NUMBER
PART MARKING
V
CC
LIMITS (V)
R
TOTAL
(k
)
TEMPERATURE
RANGE (C)
PACKAGE
X9015WS8*
5 10
10
0 to 70
8 Ld SOIC
X9015WS8Z* (Note)
X9015W Z
0 to 70
8 Ld SOIC (Pb-free)
X9015UM8*
ABB
50
0 to 70
8 Ld MSOP
X9015UM8Z* (Note)
DCF
0 to 70
8 Ld MSOP (Pb-free)
X9015UM8I*
ABD
-40 to 85
8 Ld MSOP
X9015UM8IZ* (Note)
DCD
-40 to 85
8 Ld MSOP (Pb-Free)
X9015US8*
X9015U
0 to 70
8 Ld SOIC
X9015US8Z* (Note)
X9015U Z
0 to 70
8 Ld SOIC (Pb-free)
X9015US8I*
X9015U I
-40 to 85
8 Ld SOIC
X9015US8IZ* (Note)
X9015U Z I
-40 to 85
8 Ld SOIC (Pb-free)
X9015WS8-2.7*
X9015W F
2.7-5.5
10
0 to 70
8 Ld SOIC
X9015WS8Z-2.7* (Note) X9015W Z F
0 to 70
8 Ld SOIC (Pb-free)
X9015TS8-2.7
X9015T F
50
0 to 70
8 Ld SOIC
X9015UM8-2.7*
ABC
0 to 70
8 Ld MSOP
X9015UM8Z-2.7* (Note)
0 to 70
8 Ld MSOP (Pb-free)
X9015UM8I-2.7*
ABE
-40 to 85
8 Ld MSOP
X9015UM8IZ-2.7* (Note) DCE
-40 to 85
8 Ld MSOP (Pb-free)
X9015US8-2.7*
X9015U F
0 to 70
8 Ld SOIC
X9015US8Z-2.7* (Note)
X9015U Z F
0 to 70
8 Ld SOIC (Pb-free)
X9015US8I-2.7*
X9015U G
-40 to 85
8 Ld SOIC
X9015US8IZ-2.7* (Note) X9015U Z G
-40 to 85
8 Ld SOIC (Pb-free)
* Add "T1" suffix for tape and reel.
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte
tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free
products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
X9015
3
FN8157.1
September 15, 2005
Pin Descriptions
R
H
/V
H
and R
L
/V
L
The high (R
H
/V
H
) and low (R
L
/V
L
) terminals of the X9015 are
equivalent to the fixed terminals of a mechanical
potentiometer. The minimum voltage is V
SS
and the
maximum is V
CC
. The terminology of R
L
/V
L
and R
H
/V
H
references the relative position of the terminal in relation to
wiper movement direction selected by the U/D input, and not
the voltage potential on the terminal.
R
W
/V
W
R
W
/V
w
is the wiper terminal and is equivalent to the movable
terminal of a mechanical potentiometer. The position of the
wiper within the array is determined by the control inputs.
The wiper terminal series resistance is typically 200
at
V
CC
=5V. At power up the wiper position is at Tap #15.
(V
L
/R
L
=Tap #0).
Up/Down (U/D)
The U/D input controls the direction of the wiper movement
and whether the tap position is incremented or decremented.
Increment (INC)
The INC input is negative-edge triggered. Toggling INC will
move the wiper and either increment or decrement the
counter in the direction indicated by the logic level on the U/D
input.
Chip Select (CS)
The device is selected when the CS input is LOW. When CS
is returned HIGH while the INC input is also HIGH the X9015
will be placed in the low power standby mode until the device
is selected once again.
Principles Of Operation
There are two sections of the X9015: the input control,
counter and decode section; and the resistor array. The input
control section operates just like an up/down counter. The
output of this counter is decoded to turn on a single electronic
switch connecting a point on the resistor array to the wiper
output. The resistor array is comprised of 31 individual
resistors connected in series.
The wiper, when at either fixed terminal, acts like its
mechanical equivalent and does not move beyond the last
position. That is, the counter does not wrap around when
clocked to either extreme.
The electronic switches on the device operate in a "make
before break" mode when the wiper changes tap positions. If
the wiper is moved several positions, multiple taps are
connected to the wiper for t
IW
(INC to V
W
change). The
R
TOTAL
value for the device can temporarily be reduced by a
significant amount if the wiper is moved several positions.
When the device is powered-down, the wiper position is lost.
When power is restored, the wiper is set to Tap #15.
Instructions and Programming
The INC, U/D and CS inputs control the movement of the
wiper along the resistor array. With CS set LOW the device is
selected and enabled to respond to the U/D and INC inputs.
HIGH to LOW transitions on INC will increment or decrement
(depending on the state of the U/D input) a five bit counter.
The output of this counter is decoded to select one of thirty
two wiper positions along the resistive array.
The system may select the X9015, move the wiper and
deselect the device. The new wiper position will be maintained
until changed by the system or until a power-up/down cycle.
The state of U/D may be changed while CS remains LOW.
This allows the host system to enable the device and then
move the wiper up and down until the proper trim is attained.
Symbol Table
Pin Names
SYMBOL
DESCRIPTION
RH/VH
High terminal
RW/VW
Wiper terminal
RL/VL
Low terminal
VSS
Ground
VCC
Supply voltage
U/D
Up/Down control input
INC
Increment control input
CS
Chip select control input
Mode Selection
CS
INC
U/D
MODE
L
H
Wiper up
L
L
Wiper down
*
H
X
Standby mode
L
L
X
Normal mode
WAVEFORM
INPUTS
OUTPUTS
Must be
steady
Will be
steady
May change
from Low to
High
Will change
from Low to
High
May change
from High to
Low
Will change
from High to
Low
Don't Care:
Changes
Allowed
Changing:
State Not
Known
N/A
Center Line
is High
Impedance
X9015
4
FN8157.1
September 15, 2005
)
Power Up and Down Requirements
The are no restrictions on the power-up or power-down conditions of V
CC
and the voltages applied to the potentiometer pins
provided that V
CC
is always more positive than or equal to V
H
, V
L
, and V
W
, i.e., V
CC
V
H
, V
L
, V
W
. The V
CC
ramp rate spec is
always in effect.
NOTES:
1. Absolute Linearity is utilized to determine actual wiper voltage versus expected voltage = (V
w(n)
(actual)V
w(n)
(expected)) = 1 Ml Maximum.
2. Relative Linearity is a measure of the error in step size between
taps = V
W
(n+1)
[V
w(n)
+ Ml] = 0.2 Ml.
3. 1 Ml = Minimum Increment = R
TOT
/31.
4. Typical values are for T
A
= 25C and nominal supply voltage.
5. This parameter is periodically sampled and not 100% tested.
Absolute Maximum Ratings
Operating Conditions
Temperature under bias . . . . . . . . . . . . . . . . . . . . . .-65C to +135C
Storage temperature . . . . . . . . . . . . . . . . . . . . . . . .-65C to +150C
Voltage on CS, INC, U/D, V
H
, V
L
and
V
CC
with respect to V
SS
. . . . . . . . . . . . . . . . . . . . . . . . -1V to +7V
V = |V
H
V
L
| . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5V
Lead temperature (soldering 10s) . . . . . . . . . . . . . . . . . . . . . . 300C
I
W
(10s) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7.5mA
Temperature Range
Commercial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0C to +70C
Industrial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40C to +85C
Supply Voltage (V
CC
)
X9015. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5V10%
X9015-2.7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 5.5V
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Potentiometer Specifications
Over recommended operating conditions unless otherwise stated
SYMBOL
PARAMETER
TEST CONDITIONS/NOTES
MIN.
TYP.
MAX.
UNIT
R
TOTAL
End to End Resistance Variation
20
+20
%
V
VH
V
H
/R
H
Terminal Voltage
0
V
CC
V
V
VL
V
L
/R
L
Terminal Voltage
0
V
CC
V
Power Rating
R
TOTAL
1k
10
mW
R
W
Wiper Resistance
I
W
= 1mA, V
CC
= 5V
200
400
R
W
Wiper Resistance
I
W
= 1mA, V
CC
= 2.7V
400
1000
I
W
Wiper Current
-3.75
3.75
mA
Noise
Ref: 1kHz
-120
dBV
Resolution
3
%
Absolute Linearity (Note 1)
V
w(n)(actual)
V
w(n)(expected)
-1
+1
MI (Note 3)
Relative Linearity (Note 2)
V
w(n+1)
[V
w(n)+MI
]
-0.2
+0.2
MI (Note 3)
R
TOTAL
Temperature Coefficient
300
ppm/C
Ratiometric Temperature Coefficient
20
ppm/C
C
H
/C
L
/C
W
Potentiometer Capacitances
See circuit #3
10/10/25
pF
X9015
5
FN8157.1
September 15, 2005
)
D.C. Operating Specifications
Over recommended operating conditions unless otherwise specified
SYMBOL
PARAMETER
TEST CONDITIONS
MIN.
TYP.
(Note 4)
MAX.
UNITS
I
CC1
VCC active current (increment)
CS = V
IL
, U/D = V
IL
or V
IH
and
INC = 0.4V @ max. t
CYC
50
A
I
CC2
VCC active current (Store) (EEPROM
Store)
CS = V
IH
, U/D = V
IL
or V
IH
and
INC = V
IH
@ max. t
WR
400
A
I
SB
Standby supply current
CS = V
CC
0.3V, U/D and
INC = V
SS
or V
CC
0.3V
1
A
I
LI
CS, INC, U/D input leakage current
V
IN
= V
SS
to V
CC
10
A
V
IH
CS, INC, U/D input HIGH voltage
V
CC
x 0.7
V
CC
+ 0.5
V
V
IL
CS, INC, U/D input LOW voltage
-0.5
V
CC
x 0.1
V
C
IN
(Note 5)
CS, INC, U/D input capacitance
V
CC
= 5V, V
IN
= V
SS
, T
A
= 25C,
f = 1MHz
10
pF
TEST CIRCUIT #1
TEST CIRCUIT #2
CIRCUIT #3 SPICE MACRO MODEL
Test Point
V
W
/R
W
V
H
/R
H
V
L
/R
L
V
S
Force
Current
V
L
VW
Test Point
V
H
/R
H
V
W
/R
W
V
L
/R
L
C
H
C
L
R
W
10pF
10pF
R
H
R
L
R
TOTAL
C
W
25pF
A.C. Conditions of Test
Input pulse levels
0V to 3V
Input rise and fall times
10ns
Input reference levels
1.5V
X9015
6
FN8157.1
September 15, 2005
A.C. Timing
A.C. Operating Specifications
Over recommended operating conditions unless otherwise specified
SYMBOL
PARAMETER
MIN.
TYP. (Note 6)
MAX.
UNIT
t
Cl
CS to INC setup
100
ns
t
lD
INC HIGH to U/D change
100
ns
t
DI
U/D to INC setup
2.9
s
t
lL
INC LOW period
1
s
t
lH
INC HIGH period
1
s
t
lC
INC inactive to CS inactive
1
s
t
CPH
CS deselect time (NO STORE)
100
ns
t
CPH
CS deselect time (STORE)
10
ms
t
IW
INC to Vw change
1
5
s
t
CYC
INC cycle time
4
s
t
R
, t
F
(Note 7) INC input rise and fall time
500
s
t
PU
(Note 7)
Power up to wiper stable
5
s
t
R
V
CC
(Note 7) VCC power-up rate
0.2
50
V/ms
t
WR
Store cycle
5
10
ms
CS
INC
U/D
V
W
t
CI
t
IL
t
IH
t
CYC
t
ID
t
DI
t
IW
MI
(8)
t
IC
t
CPH
t
F
t
R
10%
90%
90%
(store)
NOTES:
6. Typical values are for T
A
= 25C and nominal supply voltage.
7. This parameter is periodically sampled and not 100% tested.
8. MI in the A.C. timing diagram refers to the minimum incremental change in the V
W
output due to a change in the wiper position.
X9015
7
FN8157.1
September 15, 2005
Performance Characteristics (Typical)
FIGURE 1. TYPICAL NOISE
FIGURE 2. TYPICAL RTOTAL VS. TEMPERATURE
FIGURE 3. TYPICAL TOTAL RESISTANCE TEMPERATURE COEFFICIENT
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
-110
-120
-130
-140
-150
0
10
20
30
40
50
60
70
80
90
100
FREQUENCY (kHz)
NOI
S
E (
d
B)
110 120 130 140 150 160 170 180 190 200
10000
9800
9600
9400
9200
9000
8800
8600
8400
8200
8000
RTOT
AL
-55
-45
-35 -25
-15
-5
5
15
25
35
45
55
65
75
TEMPERATURE
85
95
105 115 125 C
-55
-350
-300
-250
-200
-150
-100
-50
0
-45
-35
-25
-15
-5
5
15
25
35
TEMPERATURE
PPM
45
55
65
75
85
95
105 115
125 C
X9015
8
FN8157.1
September 15, 2005
FIGURE 4. TYPICAL WIPER RESISTANCE
FIGURE 5. TYPICAL ABSOLUTE% ERROR PER TAP POSITION
FIGURE 6. TYPICAL RELATIVE% ERROR PER TAP POSITION
Performance Characteristics (Typical)
(Continued)
0
0
100
200
300
400
RW (
)
500
600
700
800
2
4
6
8
10
12
14
16
TAP
18
20
22
24
26
28
30
32
V
CC
= 2.7V
40.0%
30.0%
20.0%
10.0%
0.0%
-10.0%
-20.0%
-30.0%
-40.0%
0
3
6
9
12
15
Tap
AB
SO
LU
TE
% ER
R
O
R
18
21
24
27
30
20.0%
15.0%
10.0%
5.0%
0.0%
-5.0%
-10.0%
-15.0%
-20.0%
0
3
6
9
12
15
RELAT
I
VE% ERROR
18
21
24
27
30
TAP
X9015
9
FN8157.1
September 15, 2005
Applications Information
Electronic digitally controlled potentiometers provide two powerful application advantages: (1) the variability and reliability of a
solid-state potentiometer, and (2) the flexibility of computer-based digital controls.
Basic Configurations of Electronic Potentiometers
Basic Circuits
V
R
V
W
/R
W
V
R
I
Three terminal potentiometer;
variable voltage divider
Two terminal variable resistor;
variable current
V
H
/R
H
V
L
/R
L
Cascading Techniques
Buffered Reference Voltage
+
+5V
R
1
+V
5V
V
W
/R
W
V
REF
V
OUT
OP-07
V
W
/R
W
V
W
/R
W
+V
+V
+V
X
(a)
(b)
V
OUT
= V
W
Noninverting Amplifier
+
V
S
V
O
R
2
R
1
V
O
= (1+R
2
/R
1
)V
S
LM308A
Voltage Regulator
R
1
R
2
I
adj
V
O
(REG) = 1.25V (1+R
2
/R
1
)+I
adj
R
2
V
O
(REG)
V
IN
317
Offset Voltage Adjustment
+
V
S
V
O
R
2
R
1
100k
10k
10k
10k
-12V
+12V
TL072
Comparator with Hysteresis
V
UL
= {R
1
/(R
1
+R
2
)} V
O
(max)
V
LL
= {R
1
/(R
1
+R
2
)} V
O
(min)
+
V
S
V
O
R
2
R
1
}
}
LT311A
+5V
5V
(for additional circuits see AN115)
X9015
10
FN8157.1
September 15, 2005
MSOP Packaging Information
0.118 0.002
(3.00 0.05)
0.040 0.002
(1.02 0.05)
0.150 (3.81)
Ref.
0.193 (4.90)
0.030 (0.76)
0.036 (0.91)
0.032 (0.81)
0.007 (0.18)
0.005 (0.13)
0.008 (0.20)
0.004 (0.10)
0.0216 (0.55)
7 Typ.
R 0.014 (0.36)
0.118 0.002
(3.00 0.05)
0.012 + 0.006 / -0.002
(0.30 + 0.15 / -0.05)
0.0256 (0.65) Typ.
8-Lead Miniature Small Outline Gull Wing Package Type M
0.220"
0.0256" Typical
0.025"
Typical
0.020"
Typical
8 Places
FOOTPRINT
Ref.
NOTE:
ALL DIMENSIONS IN INCHES AND (MILLIMETERS)
X9015
11
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN8157.1
September 15, 2005
SOIC Packaging Information
0.150 (3.80)
0.158 (4.00)
0.228 (5.80)
0.244 (6.20)
0.014 (0.35)
0.019 (0.49)
Pin 1
Pin 1 Index
0.010 (0.25)
0.020 (0.50)
0.050 (1.27)
0.188 (4.78)
0.197 (5.00)
0.004 (0.19)
0.010 (0.25)
0.053 (1.35)
0.069 (1.75)
(4X) 7
0.016 (0.410)
0.037 (0.937)
0.0075 (0.19)
0.010 (0.25)
0 - 8
X 45
8-Lead Plastic Small Outline Gull Wing Package Type S
NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS)
0.250"
0.050" Typical
0.050"
Typical
0.030"
Typical
8 Places
FOOTPRINT
X9015