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Электронный компонент: X93254UV14I-3

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1
FN8186.0
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-352-6832
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Intersil (and design) is a registered trademark of Intersil Americas Inc.
XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
X93254
Dual Digitally Controlled Potentiometers
(XDCPsTM)
FEATURES
Dual solid-state potentiometers
Independent Up/Down interfaces
32 wiper tap points per potentiometer
--Wiper position stored in nonvolatile memory
and recalled on power-up
31 resistive elements per potentiometer
--Temperature compensated
--Maximum resistance tolerance of 30%
--Terminal voltage, 0 to V
CC
Low power CMOS
--V
CC
= 3V10%
--Active current, 250A max
--Standby current, 1A max
High reliability
--Endurance 200,000 data changes per bit
--Register data retention, 100 years
R
TOTAL
value = 50k
14-lead TSSOP package
DESCRIPTION
The Intersil X93254 is a dual digitally controlled poten-
tiometer (XDCP). The device consists of two resistor
arrays, wiper switches, a control section, and nonvola-
tile memory. The wiper positions are controlled by indi-
vidual Up/Down interfaces.
A potentiometer is implemented by a resistor array
composed of 31 resistive elements and a wiper switch-
ing network. The position of each wiper element is
controlled by a set of independent CS, U/D, and INC
inputs. The position of the wiper can be stored in non-
volatile memory and then be recalled upon a subse-
quent power-up operation.
Each potentiometer is connected as a two-terminal
variable resistor and can be used in a wide variety of
applications including:
Bias and Gain control
LCD Contrast Adjustment
BLOCK DIAGRAM
Control
and
Memory
Up/Down
(U/D
1
)
Increment
(INC
1
)
Device Select
(CS
1
)
V
CC
(Supply Voltage)
V
SS
(Ground)
R
H1
R
L1
30K
R
H2
R
L2
Control
and
Memory
Up/Down
(U/D
2
)
Increment
(INC
2
)
Device Select
(CS
2
)
30K
Data Sheet
March 1, 2005
2
FN8186.0
March 1, 2005
PIN CONFIGURATION
X93254 ORDERING CODES
PIN DESCRIPTIONS
Ordering Number
RTOTAL
Package
Temperature Range
X93254UV14I-3
50
k
14-lead TSSOP package
-40C to +85C
TSSOP Symbol
Description
1
DNC
Do Not Connect.
2
R
L1
Low Terminal 1.
3
CS
1
Chip Select 1.
4
INC
2
Increment 2.
5
U/D
2
Up/Down 2.
6
R
H2
High Terminal 2.
7
V
SS
Ground.
8
DNC
Do Not Connect.
9
R
L2
Low Terminal 2.
10
CS
2
Chip Select 2.
11
V
CC
Supply Voltage.
12
INC
1
Increment 1.
13
U/D
1
Up/Down 1.
14
R
H1
High Terminal 1.
V
CC
CS
1
INC
2
U/D
2
R
H2
V
SS
1
2
3
4
8
7
6
5
X93254
TSSOP
R
L1
DNC
*
*
Do not connect.
CS
2
INC
1
U/D
1
R
H1
R
L2
DNC
*
14
13
12
11
9
10
X93254
3
FN8186.0
March 1, 2005
ABSOLUTE MAXIMUM RATINGS
Temperature under bias .................... -65
C to +135
C
Storage temperature ......................... -65C to +150C
Voltage on CS, INC, U/D, R
H
, R
L
and V
CC
with respect to V
SS
.............................. -1V to +6.5V
Lead temperature (soldering 10 seconds)......... 300C
Maximum reflow temperature (40 seconds) ...... 240C
Maximum resistor current..................................... 2mA
COMMENT
Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to the device.
This is a stress rating only; the functional operation of
the device (at these or any other conditions above
those listed in the operational sections of this specifi-
cation) is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect
device reliability.
POTENTIOMETER CHARACTERISTICS (Over recommended operating conditions unless otherwise stated.)
Notes: (1) Absolute linearity is utilized to determine actual wiper voltage versus expected voltage = (V
H(n)
(actual) - V
H(n)
(expected)) = 1 Ml
Maximum. n = 1 .. 29 only
(2) Relative linearity is a measure of the error in step size between taps = V
H(n+1)
- [V
H(n)
+ Ml] = 0.5 Ml, n = 1 .. 29 only.
(3) 1 Ml = Minimum Increment = R
TOT
/31.
(4) Typical values are for T
A
= 25C and nominal supply voltage.
(5) This parameter only applies to a single potentiometer.
(6) This parameter is guaranteed by characterization.
(7) When performing multiple write operations, V
CC
must not decrease by more than 150mV from its initial value.
Symbol
Parameter
Limits
Test Conditions/Notes
Min.
Typ.
Max.
Unit
R
TOT
End to end resistance
37.5
50
62.5
k
(5)
V
R
R
H
, R
L
terminal voltages
0
V
CC
V
(5)
Power rating
1
mW
(6)
R
TOTAL
=
50k
(5)
Noise
-120
dBV
(6)
Ref: 1kHz
(5)
R
W
Wiper Resistance
1000
(5) (6)
I
W
Wiper Current
0.6
mA
(5) (6)
Resolution
3
%
(5)
Absolute linearity
(1)
1
MI
(3)
V
H(n)(actual)
- V
H(n)(expected)(5)
Relative linearity
(2)
0.5
MI
(3)
V
H(n+1)
- [V
H(n)+MI(5)
R
TOTAL
temperature coefficient
35
ppm/C (5) (6)
C
H
/C
L
/C
W
Potentiometer capacitances
10/10/25
pF
See circuit #2
(5)
RECOMMENDED OPERATING CONDITIONS
Temperature
Min.
Max.
Industrial
-40
C
+85
C
Supply Voltage (V
CC
)
Limits
X93254
3V
10%
(7)
X93254
4
FN8186.0
March 1, 2005
D.C. OPERATING CHARACTERISTICS (Over recommended operating conditions unless otherwise specified.)
ENDURANCE AND DATA RETENTION
A.C. CONDITIONS OF TEST
Symbol
Parameter
Limits
Unit
Test Conditions
Min.
Typ.
(4)
Max.
I
CC1
V
CC
active current (Increment) per
DCP
50
250
A
CS = V
IL
, U/D = V
IL
or V
IH
and
INC = 0.4V @ max. t
CY(5)
I
CC2
V
CC
active current (Store)
(EEPROM Store) per DCP
600
A
CS = V
IH
, U/D = V
IL
or V
IH
and
INC = V
IH
@ max. t
WR(5)
I
SB
Standby supply current
1
A
CS = V
CC
0.3V, U/D and
INC = V
SS
or V
CC
- 0.3V
I
LI
CS
1
or CS
2
1
A
V
IN
= V
CC (5)
I
LI
CS
1
or CS
2
60
100
150
A
V
CC
= 3V, CS = 0
(5)
I
LI
INC
1
, INC
2
, U/D
1
, U/D
2
input
leakage current
1
A
V
IN
= V
SS
to V
CC(5)
V
IH
CS
1
, CS
2
, INC
1
, INC
2
, U/D
1
,
U/D
2
input HIGH voltage
V
CC
x 0.7
V
CC
+ 0.5
V
(5)
V
IL
CS
1
, CS
2
, INC
1
, INC
2
, U/D
1
,
U/D
2
input HIGH voltage
-0.5
V
CC
x 0.1
V
(5)
C
IN
CS
1
, CS
2
, INC
1
, INC
2
, U/D
1
,
U/D
2
input capacitance
10
pF
V
CC
= 3V, V
IN
= V
SS
,
T
A
= 25C, f = 1MHz
(6)
Parameter
Min.
Unit
Minimum endurance
200,000
Data changes per bit
Data retention
100
Years
Input pulse levels
0V to 3V
Input rise and fall times
10ns
Input reference levels
1.5V
Test Circuit #1
Circuit #2 SPICE Macro Model
V
L
Test Point
V
H
/R
H
C
H
C
L
10pF
10pF
R
H
R
TOTAL
C
W
25pF
R
L
X93254
5
FN8186.0
March 1, 2005
A.C. OPERATING CHARACTERISTICS (Over recommended operating conditions unless otherwise specified. In the
table, CS, INC, U/D, R
H
and R
L
are used to refer to either CS
1
or CS
2
, etc.)
POWER-UP AND DOWN REQUIREMENTS
There are no restrictions on the power-up or power-down conditions of V
CC
and the voltages applied to the potenti-
ometer pins provided that V
CC
is always more positive than or equal to V
H
and V
L
, i.e., V
CC
V
H,
V
L
. The V
CC
ramp
rate spec is always in effect.
A.C. TIMING (In the diagram, CS, INC, U/D, R
H
and R
L
are used to refer to either CS
1
or CS
2
, etc.)
Symbol
Parameter
Limits
Unit
Min.
Typ.
(6)
Max.
t
Cl
CS to INC setup
100
ns
t
lD
INC HIGH to U/D change
100
ns
t
DI
U/D to INC setup
100
ns
t
lL
INC LOW period
1
s
t
lH
INC HIGH period
1
s
t
lC
INC Inactive to CS inactive
1
s
t
CPH
CS Deselect time (NO STORE)
250
ns
t
CPH
CS Deselect time (STORE)
10
ms
t
CYC
INC cycle time
2
s
t
R
,
t
F(6)
INC input rise and fall time
500
s
t
R
V
CC(6)
V
CC
power-up rate
1
10,000
V/ms
t
WR
Store cycle
5
10
ms
CS
INC
U/D
t
CI
t
IL
t
IH
t
CYC
t
ID
t
DI
t
IC
t
CPH
t
F
t
R
10%
90%
90%
(Store)
X93254