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IRF530NS
IRF530NL
HEXFET
Power MOSFET
09/04/02
Parameter
Typ.
Max.
Units
R
JC
Junction-to-Case
2.15
R
JA
Junction-to-Ambient (PCB Mounted,steady-state)**
40
Thermal Resistance
www.irf.com
1
V
DSS
= 100V
R
DS(on)
= 90m
I
D
= 17A
S
D
G
Advanced HEXFET
Power MOSFETs from International Rectifier
utilize advanced processing techniques to achieve extremely low on-
resistance per silicon area. This benefit, combined with the fast
switching speed and ruggedized device design that HEXFET power
MOSFETs are well known for, provides the designer with an extremely
efficient and reliable device for use in a wide variety of applications.
The D
2
Pak is a surface mount power package capable of accommodating
die sizes up to HEX-4. It provides the highest power capability and the
lowest possible on-resistance in any existing surface mount package. The
D
2
Pak is suitable for high current applications because of its low internal
connection resistance and can dissipate up to 2.0W in a typical surface
mount application.
The through-hole version (IRF530NL) is available for low-profile applications.
l
Advanced Process Technology
l
Ultra Low On-Resistance
l
Dynamic dv/dt Rating
l
175C Operating Temperature
l
Fast Switching
l
Fully Avalanche Rated
Description
Absolute Maximum Ratings
Parameter
Max.
Units
I
D
@ T
C
= 25C
Continuous Drain Current, V
GS
@ 10V
17
I
D
@ T
C
= 100C
Continuous Drain Current, V
GS
@ 10V
12
A
I
DM
Pulsed Drain Current
60
P
D
@T
A
= 25C
Power Dissipation
3.8
W
P
D
@T
C
= 25C
Power Dissipation
70
W
Linear Derating Factor
0.47
W/C
V
GS
Gate-to-Source Voltage
20
V
I
AR
Avalanche Current
9.0
A
E
AR
Repetitive Avalanche Energy
7.0
mJ
dv/dt
Peak Diode Recovery dv/dt
7.4
V/ns
T
J
Operating Junction and
-55 to + 175
T
STG
Storage Temperature Range
C
Soldering Temperature, for 10 seconds
300 (1.6mm from case )
D
2
Pak
IRF530NS
TO-262
IRF530NL
C/W
PD - 91352B
IRF530NS/IRF530NL
2
www.irf.com
S
D
G
Parameter
Min. Typ. Max. Units
Conditions
I
S
Continuous Source Current
MOSFET symbol
(Body Diode)
showing the
I
SM
Pulsed Source Current
integral reverse
(Body Diode)
p-n junction diode.
V
SD
Diode Forward Voltage
1.3
V
T
J
= 25C, I
S
= 9.0A, V
GS
= 0V
t
rr
Reverse Recovery Time
93
140
ns
T
J
= 25C, I
F
= 9.0A
Q
rr
Reverse Recovery Charge
320
480
nC
di/dt = 100A/s
t
on
Forward Turn-On Time
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
+L
D
)
Source-Drain Ratings and Characteristics
17
60
A
Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11)
Starting T
J
= 25C, L = 2.3mH
R
G
= 25
, I
AS
= 9.0A, V
GS
=10V (See Figure 12)
I
SD
9.0A, di/dt 410A/s, V
DD
V
(BR)DSS
,
T
J
175C
Pulse width
400s; duty cycle 2%.
Notes:
This is a typical value at device destruction and represents
operation outside rated limits.
This is a calculated value limited to T
J
= 175C .
Uses IRF530N data and test conditions.
**When mounted on 1" square PCB (FR-4 or G-10 Material). For
recommended footprint and soldering techniques refer to
application note #AN-994
Parameter
Min. Typ. Max. Units
Conditions
V
(BR)DSS
Drain-to-Source Breakdown Voltage
100
V
V
GS
= 0V, I
D
= 250A
V
(BR)DSS
/
T
J
Breakdown Voltage Temp. Coefficient
0.11
V/C
Reference to 25C, I
D
= 1mA
R
DS(on)
Static Drain-to-Source On-Resistance
90
m
V
GS
= 10V, I
D
= 9.0A
V
GS(th)
Gate Threshold Voltage
2.0
4.0
V
V
DS
= V
GS
, I
D
= 250A
g
fs
Forward Transconductance
12
S
V
DS
= 50V, I
D
= 9.0A
25
A
V
DS
= 100V, V
GS
= 0V
250
V
DS
= 80V, V
GS
= 0V, T
J
= 150C
Gate-to-Source Forward Leakage
100
V
GS
= 20V
Gate-to-Source Reverse Leakage
-100
nA
V
GS
= -20V
Q
g
Total Gate Charge
37
I
D
= 9.0A
Q
gs
Gate-to-Source Charge
7.2
nC
V
DS
= 80V
Q
gd
Gate-to-Drain ("Miller") Charge
11
V
GS
= 10V, See Fig. 6 and 13
t
d(on)
Turn-On Delay Time
9.2
V
DD
= 50V
t
r
Rise Time
22
I
D
= 9.0A
t
d(off)
Turn-Off Delay Time
35
R
G
= 12
t
f
Fall Time
25
V
GS
= 10V, See Fig. 10
Between lead,
6mm (0.25in.)
from package
and center of die contact
C
iss
Input Capacitance
920
V
GS
= 0V
C
oss
Output Capacitance
130
V
DS
= 25V
C
rss
Reverse Transfer Capacitance
19
pF
= 1.0MHz, See Fig. 5
E
AS
Single Pulse Avalanche Energy
340
93
mJ
I
AS
= 9.0A, L = 2.3mH
nH
Electrical Characteristics @ T
J
= 25C (unless otherwise specified)
L
D
Internal Drain Inductance
L
S
Internal Source Inductance
S
D
G
I
GSS
ns
4.5
7.5
I
DSS
Drain-to-Source Leakage Current
IRF530NS/IRF530NL
www.irf.com
3
Fig 4. Normalized On-Resistance
Vs. Temperature
Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics
1
10
100
0.1
1
10
100
20s PULSE WIDTH
T = 25 C
J
TOP
BOTTOM
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
V , Drain-to-Source Voltage (V)
I , D
r
ain-to-Source C
u
rrent (A)
DS
D
4.5V
1
10
100
0.1
1
10
100
20s PULSE WIDTH
T = 175 C
J
TOP
BOTTOM
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
V , Drain-to-Source Voltage (V)
I , Drain-to-Source Current (A)
DS
D
4.5V
10
100
4.0
5.0
6.0
7.0
8.0
V = 50V
20s PULSE WIDTH
DS
V , Gate-to-Source Voltage (V)
I , D
r
ain-to-Source C
u
rrent (A)
GS
D
T = 25 C
J
T = 175 C
J
-60 -40 -20
0
20 40 60 80 100 120 140 160 180
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
T , Junction Temperature ( C)
R , Drain-to-Source On Resistance
(Normalized)
J
D
S
(
on)
V
=
I =
GS
D
10V
15A
IRF530NS/IRF530NL
4
www.irf.com
Fig 8. Maximum Safe Operating Area
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 7. Typical Source-Drain Diode
Forward Voltage
1
10
100
0
400
800
1200
1600
V , Drain-to-Source Voltage (V)
C, Capacitance (pF)
DS
V
C
C
C
=
=
=
=
0V,
C
C
C
f = 1MHz
+ C
+ C
C SHORTED
GS
iss
gs
gd ,
ds
rss
gd
oss
ds
gd
C
iss
C
oss
C
rss
0
10
20
30
40
0
4
8
12
16
20
Q , Total Gate Charge (nC)
V , Gate-to-Source Vol
t
age (V)
G
GS
FOR TEST CIRCUIT
SEE FIGURE
I =
D
13
9.0A
V
= 20V
DS
V
= 50V
DS
V
= 80V
DS
0.1
1
10
100
0.2
0.4
0.6
0.8
1.0
1.2
1.4
V ,Source-to-Drain Voltage (V)
I , Reverse Drain Current (A)
SD
SD
V = 0 V
GS
T = 25 C
J
T = 175 C
J
1
10
100
1000
VDS , Drain-toSource Voltage (V)
0.1
1
10
100
1000
I D
,
D
r
a
i
n
-
t
o
-
S
o
u
r
c
e
C
u
r
r
e
n
t
(
A
)
Tc = 25C
Tj = 175C
Single Pulse
1msec
10msec
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100sec
IRF530NS/IRF530NL
www.irf.com
5
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig 9. Maximum Drain Current Vs.
Case Temperature
0.01
0.1
1
10
0.00001
0.0001
0.001
0.01
0.1
Notes:
1. Duty factor D =
t / t
2. Peak T = P
x Z
+ T
1
2
J
DM
thJC
C
P
t
t
DM
1
2
t , Rectangular Pulse Duration (sec)
Ther
m
a
l
R
e
sponse
(Z
)
1
thJC
0.01
0.02
0.05
0.10
0.20
D = 0.50
SINGLE PULSE
(THERMAL RESPONSE)
25
50
75
100
125
150
175
0
4
8
12
16
20
T , Case Temperature
( C)
I , Drain Current (A)
C
D
V
DS
90%
10%
V
GS
t
d(on)
t
r
t
d(off)
t
f
V
DS
Pulse Width 1 s
Duty Factor 0.1 %
R
D
V
GS
R
G
D.U.T.
V
GS
+
-
V
DD
Fig 10a. Switching Time Test Circuit
Fig 10b. Switching Time Waveforms
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