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Электронный компонент: IRF9Z34NS

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IRF9Z34NS/L
HEXFET
Power MOSFET
PD - 9.1525
l
Advanced Process Technology
l
Surface Mount (IRF9Z34NS)
l
Low-profile through-hole (IRF9Z34NL)
l
175C Operating Temperature
l
Fast Switching
l
P-Channel
l
Fully Avalanche Rated
8/25/97
S
D
G
Parameter
Typ.
Max.
Units
R
JC
Junction-to-Case
2.2
R
JA
Junction-to-Ambient ( PCB Mounted,steady-state)**
40
Thermal Resistance
C/W
Parameter
Max.
Units
I
D
@ T
C
= 25C
Continuous Drain Current, V
GS
@ -10V
-19
I
D
@ T
C
= 100C
Continuous Drain Current, V
GS
@ -10V
-14
A
I
DM
Pulsed Drain Current
-68
P
D
@T
A
= 25C
Power Dissipation
3.8
W
P
D
@T
C
= 25C
Power Dissipation
68
W
Linear Derating Factor
0.45
W/C
V
GS
Gate-to-Source Voltage
20
V
E
AS
Single Pulse Avalanche Energy
180
mJ
I
AR
Avalanche Current
-10
A
E
AR
Repetitive Avalanche Energy
6.8
mJ
dv/dt
Peak Diode Recovery dv/dt
-5.0
V/ns
T
J
Operating Junction and
-55 to + 175
T
STG
Storage Temperature Range
Soldering Temperature, for 10 seconds
300 (1.6mm from case )
C
Absolute Maximum Ratings
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This
benefit, combined with the fast switching speed and
ruggedized device design that HEXFET Power MOSFETs
are well known for, provides the designer with an extremely
efficient and reliable device for use in a wide variety of
applications.
The D
2
Pak is a surface mount power package capable of
accommodating die sizes up to HEX-4. It provides the
highest power capability and the lowest possible on-
resistance in any existing surface mount package. The
D
2
Pak is suitable for high current applications because of
its low internal connection resistance and can dissipate
up to 2.0W in a typical surface mount application.
The through-hole version (IRF9Z34NL) is available for low-
profile applications.
Description
V
DSS
= -55V
R
DS(on)
= 0.10
I
D
= -19A
2
D P a k

T O - 2 6 2
IRF9Z34NS/L
Starting T
J
= 25C, L = 3.6mH
R
G
= 25
, I
AS
= -10A. (See Figure 12)
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
Notes:
** When mounted on 1" square PCB (FR-4 or G-10 Material ).
For recommended footprint and soldering techniques refer to application note #AN-994.
I
SD
-10A, di/dt
-290A/s, V
DD
V
(BR)DSS
,
T
J
175C
Pulse width
300s; duty cycle
2%.
Uses IRF9Z34N data and test conditions
Parameter
Min. Typ. Max. Units
Conditions
I
S
Continuous Source Current
MOSFET symbol
(Body Diode)
showing the
I
SM
Pulsed Source Current
integral reverse
(Body Diode)
p-n junction diode.
V
SD
Diode Forward Voltage
-1.6
V
T
J
= 25C, I
S
= -10A, V
GS
= 0V
t
rr
Reverse Recovery Time
54
82
ns
T
J
= 25C, I
F
= -10A
Q
rr
Reverse Recovery Charge
110
160
nC
di/dt = -100A/s
t
on
Forward Turn-On Time
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
+L
D
)
Source-Drain Ratings and Characteristics
A
S
D
G
Parameter
Min. Typ. Max. Units
Conditions
V
(BR)DSS
Drain-to-Source Breakdown Voltage
-55
V
V
GS
= 0V, I
D
= -250A
V
(BR)DSS
/
T
J
Breakdown Voltage Temp. Coefficient
-0.05
V/C
Reference to 25C, I
D
= -1mA
R
DS(on)
Static Drain-to-Source On-Resistance
0.10
V
GS
= -10V, I
D
= -10A
V
GS(th)
Gate Threshold Voltage
-2.0
-4.0
V
V
DS
= V
GS
, I
D
= -250A
g
fs
Forward Transconductance
4.2
S
V
DS
= -25V, I
D
= -10A
-25
A
V
DS
= -55V, V
GS
= 0V
-250
V
DS
= -44V, V
GS
= 0V, T
J
= 150C
Gate-to-Source Forward Leakage
100
V
GS
= 20V
Gate-to-Source Reverse Leakage
-100
nA
V
GS
= -20V
Q
g
Total Gate Charge
35
I
D
= -10A
Q
gs
Gate-to-Source Charge
7.9
nC
V
DS
= -44V
Q
gd
Gate-to-Drain ("Miller") Charge
16
V
GS
= -10V, See Fig. 6 and 13
t
d(on)
Turn-On Delay Time
13
V
DD
= -28V
t
r
Rise Time
55
I
D
= -10A
t
d(off)
Turn-Off Delay Time
30
R
G
= 13
t
f
Fall Time
41
R
D
= 2.6
,
See Fig. 10
Between lead,
and center of die contact
C
iss
Input Capacitance
620
V
GS
= 0V
C
oss
Output Capacitance
280
pF
V
DS
= -25V
C
rss
Reverse Transfer Capacitance
140
= 1.0MHz, See Fig. 5
Electrical Characteristics @ T
J
= 25C (unless otherwise specified)
I
GSS
ns
I
DSS
Drain-to-Source Leakage Current
nH
7.5
L
S
Internal Source Inductance
-19
-68
IRF9Z34NS/L
Fig 4. Normalized On-Resistance
Vs. Temperature
Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics
1
1 0
1 0 0
0 . 1
1
1 0
1 0 0
D
D S
2 0 s PU LS E W ID TH
T = 2 5C
c
A
-
I
,
D
r
a
i
n-
t
o
-
S
ou
r
c
e C
u
r
r
e
n
t
(
A
)
-V , Drain -to -So urce Vo ltag e (V)
VGS
TOP - 15V
- 10V
- 8.0V
- 7.0V
- 6.0V
- 5.5V
- 5.0V
BOTT OM - 4. 5V
-4 .5V
1
10
100
0.1
1
10
100
D
D S
A
-
I
,
D
r
ai
n-
t
o
-
S
o
u
r
c
e
C
u
r
r
en
t

(
A
)
-V , Dra in -to-So urce V oltag e (V )
VGS
TOP - 15V
- 10V
- 8.0V
- 7.0V
- 6.0V
- 5.5V
- 5.0V
BOTT OM - 4. 5V
-4 .5V
20 s PU LSE W ID TH
T = 1 75C
C
1
1 0
1 0 0
4
5
6
7
8
9
1 0
T = 2 5 C
J
G S
D
A
-
I
, D
r
a
i
n
-
to
-
S
o
u
r
c
e
C
u
r
r
e
n
t
(
A
)
-V , Ga te -to -S o u rce V o ltag e (V )
V = -2 5 V
2 0 s P U L S E W ID T H
DS
T = 1 7 5 C
J
0 . 0
0 . 5
1 . 0
1 . 5
2 . 0
- 6 0
- 4 0
- 2 0
0
2 0
4 0
6 0
8 0
1 0 0 1 2 0 1 4 0 1 6 0 1 8 0
J
T , Ju nctio n T emp eratu re (C)
R
,
D
r
a
i
n
-
to
-
S
o
u
r
c
e
O
n
R
e
s
i
s
t
a
n
c
e
D
S
(
on)
(
N
o
r
m
a
l
i
z
ed)
A
V = -10 V
G S
I = -17 A
D
T
J
= 25C
T
J
= 175C
IRF9Z34NS/L
Fig 8. Maximum Safe Operating Area
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 7. Typical Source-Drain Diode
Forward Voltage
0
4
8
12
16
20
0
10
20
30
40
G
GS
A
-
V
,
G
a
t
e
-
t
o
-
S
our
c
e
V
o
l
t
age (
V
)
Q , Tota l Gate Ch arge (n C)
FO R TEST C IR C U IT
SEE F IGU R E 1 3
I = -10 A
V = -44 V
V = -28 V
D
DS
DS
0 . 1
1
1 0
1 0 0
0 . 2
0 . 4
0 . 6
0 . 8
1 . 0
1 . 2
1 . 4
1 . 6
T = 25 C
J
V = 0 V
G S
S D
SD
A
-I
,

R
e
v
e
rs
e

D
r
a
i
n
C
u
rre
n
t
(A
)
-V , S ou rce -to -Drain V olta ge (V )
T = 1 75 C
J
1
10
100
1000
1
10
100
OPE R ATIO N IN TH IS A RE A LI MI TE D
BY R
D S(o n)
10m s
A
-I

,
D
r
a
i
n
C
u
rre
n
t
(A
)
-V , Dra in-to-So urce V olta ge (V )
D S
D
1 0s
100 s
1m s
T = 2 5C
T = 1 75C
Sin gle Pu ls e
C
J
0
200
400
600
800
1000
1200
1
10
100
C
,
C
a
pac
i
t
anc
e (
p
F
)
A
D S
-V , Drain -to -So urce V oltag e (V)
V = 0V , f = 1MH z
C = C + C , C SH OR TED
C = C
C = C + C
G S
is s gs g d ds
rs s g d
os s ds gd
C
i s s
C
o s s
C
rs s
T
C
= 25C
IRF9Z34NS/L
Fig 10a. Switching Time Test Circuit
Fig 10b. Switching Time Waveforms
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig 9. Maximum Drain Current Vs.
Case Temperature
V
DS
-10V
Pulse Width
1
s
Duty Factor
0.1 %
R
D
V
GS
V
DD
R
G
D.U.T.
+
-
V
DS
90%
10%
V
GS
t
d(on)
t
r
t
d(off)
t
f
0.01
0.1
1
10
0.00001
0.0001
0.001
0.01
0.1
Notes:
1. Duty factor D =
t / t
2. Peak T
= P
x Z
+ T
1
2
J
DM
thJC
C
P
t
t
DM
1
2
t , Rectangular Pulse Duration (sec)
Thermal Response
(Z )
1
thJC
0.01
0.02
0.05
0.10
0.20
D = 0.50
SINGLE PULSE
(THERMAL RESPONSE)
25
50
75
100
125
150
175
0
5
10
15
20
T , Case Temperature
( C)
I , Drain Current (A)
C
D
IRF9Z34NS/L
Fig 13b. Gate Charge Test Circuit
Fig 13a. Basic Gate Charge Waveform
Fig 12b. Unclamped Inductive Waveforms
Fig 12a. Unclamped Inductive Test Circuit
Q
G
Q
GS
Q
GD
V
G
Charge
-10V
D.U.T.
V
DS
I
D
I
G
-3mA
V
GS
.3
F
50K
.2
F
12V
Current Regulator
Same Type as D.U.T.
Current Sampling Resistors
+
-
tp
V
( B R ) D S S
I
AS
R G
IA S
0.0 1
tp
D .U .T
L
V D S
V D D
D R IV E R
A
15V
-2 0V
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
0
100
200
300
400
500
25
50
75
100
125
150
175
J
E
,

S
i
n
g
l
e
P
u
l
s
e A
v
a
l
anc
he

E
ner
g
y
(
m
J
)
AS
A
Startin g T , Jun ctio n T emp era tu re (C)
I
TOP -4 .2A
-7.2 A
BO TTOM -10 A
D
IRF9Z34NS/L
Peak Diode Recovery dv/dt Test Circuit
P.W.
Period
di/dt
Diode Recovery
dv/dt
Ripple
5%
Body Diode
Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current
Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D =
P.W.
Period
+
-
+
+
+
-
-
-
R
G
V
DD
dv/dt controlled by R
G
I
SD
controlled by Duty Factor "D"
D.U.T. - Device Under Test
D.U.T
*
Circuit Layout Considerations
Low Stray Inductance
Ground Plane
Low Leakage Inductance
Current Transformer
*
Reverse Polarity of D.U.T for P-Channel
V
GS
[ ]
[ ]
***
V
GS
= 5.0V for Logic Level and 3V Drive Devices
[ ] ***
Fig 14. For P-Channel HEXFETS
IRF9Z34NS/L
D
2
Pak Package Outline
D
2
Pak
Part Marking Information
10.16 (.400)
RE F .
6.47 (.255)
6.18 (.243)
2.61 (.103)
2.32 (.091)
8.89 (.350)
RE F.
- B -
1.32 (.052)
1.22 (.048)
2.79 (.110)
2.29 (.090)
1.39 (.055)
1.14 (.045)
5.28 (.208)
4.78 (.188)
4.69 (.185)
4.20 (.165)
10.54 ( .415)
10.29 ( .405)
- A -
2
1 3
15.49 (.610)
14.73 (.580)
3X
0.93 (.037)
0.69 (.027)
5.08 ( .200)
3X
1.40 (.055)
1.14 (.045)
1.78 (.070)
1.27 (.050)
1.40 (.055)
MAX.
NO TE S:
1 DIM ENS IO NS AF T ER S OLDE R DIP .
2 DIM ENS IO NING & TO LERA NCING PE R ANS I Y 14.5M, 1982.
3 CO NT RO LLING DIME NSIO N : INCH.
4 HE AT SINK & LEAD DIMEN SION S DO NO T INCLUDE BURRS.
0.55 (.022)
0.46 (.018)
0.25 (.010) M B A M
MINIMUM RECO MM ENDED F OO TP RINT
11.43 (.450)
8.89 (.350)
17.78 (.700)
3.81 (.150)
2.08 (.082)
2X
LE AD ASS IG NM ENT S
1 - G AT E
2 - DRA IN
3 - S OU RC E
2.54 (.100)
2X
PART NU MBER
IN TER NATION AL
REC TIFIER
L OGO
DATE CODE
(YYW W )
YY = YEAR
W W = W EE K
AS SEMBLY
LOT CODE
F53 0S
9B 1M
9246
A
IRF9Z34NS/L
Package Outline
TO-262 Outline
TO-262
Part Marking Information
IRF9Z34NS/L
Tape & Reel Information
D
2
Pak
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020
IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 2Z8, Tel: (905) 475 1897
IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590
IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111
IR FAR EAST: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo Japan 171 Tel: 81 3 3983 0086
IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 0316 Tel: 65 221 8371
http://www.irf.com/
Data and specifications subject to change without notice.
8/97
3
4
4
TR R
FE E D D IR E C TIO N
1 .8 5 (.0 7 3 )
1 .6 5 (.0 6 5 )
1 .6 0 (.0 6 3 )
1 .5 0 (.0 5 9 )
4 .1 0 (.1 6 1)
3 .9 0 (.1 5 3)
TR L
F E E D D IR E C TIO N
1 0. 90 (.4 29 )
1 0. 70 (.4 21 )
1 6. 10 (.6 34 )
1 5. 90 (.6 26 )
1. 75 (.0 69 )
1. 25 (.0 49 )
11 .6 0 (. 45 7 )
11 .4 0 (. 44 9 )
15 .4 2 (.60 9 )
15 .2 2 (.60 1 )
4 .7 2 (.1 3 6)
4 .5 2 (.1 7 8)
2 4 .30 (.9 5 7)
2 3 .90 (.9 4 1)
0 .3 68 (.0 14 5 )
0 .3 42 (.0 13 5 )
1 .6 0 (.0 6 3)
1 .5 0 (.0 5 9)
1 3.5 0 (. 532 )
1 2.8 0 (. 504 )
33 0.0 0
(14. 17 3)
M AX .
2 7.4 0 (1 .079 )
2 3.9 0 (.9 41)
6 0.0 0 (2 .36 2)
M IN .
3 0.4 0 (1 .19 7)
M A X .
26 .40 (1. 03 9)
24 .40 (.9 61 )
N O T ES :
1. C O M F O R M S T O EIA -418 .
2. C O N T R O LLIN G D IM EN SIO N : M ILLIM E T ER .
3. D IM E N S IO N M EA S U R E D @ H U B .
4. IN C LU D E S F L AN G E D IS T O R T IO N @ O U T E R ED G E.