IRFP15N60L
PD - 94415
SMPS MOSFET
HEXFET
Power MOSFET
Features and Benefits
SuperFast body diode eliminates the need for external
diodes in ZVS applications.
Lower Gate charge results in simpler drive requirements.
Enhanced dv/dt capabilities offer improved ruggedness.
Higher Gate voltage threshold offers improved noise immunity
.
TO-247AC
02/14/03
www.irf.com
1
S
D
G
Applications
Zero Voltage Switching SMPS
Telecom and Server Power Supplies
Uninterruptible Power Supplies
Motor Control applications
V
DSS
R
DS(on)
typ.
Trr
typ.
I
D
600V
385m
130ns 15A
Absolute Maximum Ratings
Parameter
Max.
Units
I
D
@ T
C
= 25C Continuous Drain Current, V
GS
@ 10V
15
I
D
@ T
C
= 100C Continuous Drain Current, V
GS
@ 10V
9.7
A
I
DM
Pulsed Drain Current
c
60
P
D
@T
C
= 25C Power Dissipation
280
W
Linear Derating Factor
2.3
W/C
V
GS
Gate-to-Source Voltage
30
V
dv/dt
Peak Diode Recovery dv/dt
d
10
V/ns
T
J
Operating Junction and
-55 to + 150
T
STG
Storage Temperature Range
C
Soldering Temperature, for 10 seconds
300 (1.6mm from case )
Mounting torque, 6-32 or M3 screw
1.1(10)
Nm (lbfin)
Diode Characteristics
Symbol
Parameter
Min. Typ. Max. Units
Conditions
I
S
Continuous Source Current
15
MOSFET symbol
(Body Diode)
A
showing the
I
SM
Pulsed Source Current
60
integral reverse
(Body Diode)
c
p-n junction diode.
V
SD
Diode Forward Voltage
1.5
V
T
J
= 25C, I
S
= 15A, V
GS
= 0V
f
t
rr
Reverse Recovery Time
130
200
ns T
J
= 25C, I
F
= 15A
240
360
T
J
= 125C, di/dt = 100A/s
f
Q
rr
Reverse Recovery Charge
450
670
nC T
J
= 25C, I
S
= 15A, V
GS
= 0V
f
1080 1620
T
J
= 125C, di/dt = 100A/s
f
I
RRM
Reverse Recovery Current
5.8
8.7
A
T
J
= 25C
t
on
Forward Turn-On Time
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
IRFP15N60L
2
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Notes:
Repetitive rating; pulse width limited by
max. junction temperature. (See Fig. 11)
Starting T
J
= 25C, L = 2.9mH, R
G
= 25
,
I
AS
= 15A, dv/dt = 10V/ns. (See Figure 12a)
I
SD
15A, di/dt
340A/s, V
DD
V
(BR)DSS
,
T
J
150C.
Pulse width
300s; duty cycle
2%.
C
oss
eff. is a fixed capacitance that gives the same charging time
as C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
C
oss
eff.(ER) is a fixed capacitance that stores the same energy
as C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
Static @ T
J
= 25C (unless otherwise specified)
Symbol
Parameter
Min. Typ. Max. Units
V
(BR)DSS
Drain-to-Source Breakdown Voltage
600
V
V
(BR)DSS
/
T
J
Breakdown Voltage Temp. Coefficient
0.39
V/C
R
DS(on)
Static Drain-to-Source On-Resistance
385
460
m
V
GS(th)
Gate Threshold Voltage
3.0
5.0
V
I
DSS
Drain-to-Source Leakage Current
50
A
2.0
mA
I
GSS
Gate-to-Source Forward Leakage
100
nA
Gate-to-Source Reverse Leakage
-100
R
G
Internal Gate Resistance
0.79
Dynamic @ T
J
= 25C (unless otherwise specified)
Symbol
Parameter
Min. Typ. Max. Units
gfs
Forward Transconductance
8.3
S
Q
g
Total Gate Charge
100
Q
gs
Gate-to-Source Charge
30
nC
Q
gd
Gate-to-Drain ("Miller") Charge
46
t
d(on)
Turn-On Delay Time
20
t
r
Rise Time
44
ns
t
d(off)
Turn-Off Delay Time
28
t
f
Fall Time
5.5
C
iss
Input Capacitance
2720
C
oss
Output Capacitance
260
C
rss
Reverse Transfer Capacitance
20
pF
C
oss
eff.
Effective Output Capacitance
120
C
oss
eff. (ER)
Effective Output Capacitance
100
(Energy Related)
Avalanche Characteristics
Symbol
Parameter
Typ.
Units
E
AS
Single Pulse Avalanche Energy
d
mJ
I
AR
Avalanche Current
A
E
AR
Repetitive Avalanche Energy
mJ
Thermal Resistance
Symbol
Parameter
Typ.
Units
R
JC
Junction-to-Case
R
CS
Case-to-Sink, Flat, Greased Surface
0.24
C/W
R
JA
Junction-to-Ambient
V
DS
= V
GS
, I
D
= 250A
V
DS
= 600V, V
GS
= 0V
V
DS
= 480V, V
GS
= 0V, T
J
= 125C
Conditions
V
GS
= 0V, I
D
= 250A
Reference to 25C, I
D
= 1mA
V
GS
= 10V, I
D
= 9.0A
f
V
GS
= 30V
f = 1MHz, open drain
Conditions
V
DS
= 50V, I
D
= 9.0A
V
GS
= -30V
I
D
= 15A
V
DS
= 480V
V
GS
= 10V, See Fig. 7 & 15
f
V
DD
= 300V
I
D
= 15A
R
G
= 1.8
V
GS
= 10V, See Fig. 11a & 11b
f
V
GS
= 0V
V
DS
= 25V
= 1.0MHz, See Fig. 5
15
28
Max.
320
V
GS
= 0V,V
DS
= 0V to 480V
g
40
Max.
0.44
IRFP15N60L
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3
Fig 4. Normalized On-Resistance
vs. Temperature
Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics
0.1
1
10
100
VDS, Drain-to-Source Voltage (V)
0.01
0.1
1
10
100
I D
,
D
r
a
i
n
-
t
o
-
S
o
u
r
c
e
C
u
r
r
e
n
t
(
A
)
5.0V
20s PULSE WIDTH
Tj = 150C
VGS
TOP
15V
12V
10V
9.0V
8.0V
7.0V
6.0V
BOTTOM
5.0V
0.1
1
10
100
VDS, Drain-to-Source Voltage (V)
0.001
0.01
0.1
1
10
100
1000
I D
,
D
r
a
i
n
-
t
o
-
S
o
u
r
c
e
C
u
r
r
e
n
t
(
A
)
5.0V
20s PULSE WIDTH
Tj = 25C
VGS
TOP
15V
12V
10V
9.0V
8.0V
7.0V
6.0V
BOTTOM
5.0V
4
6
8
10
12
14
16
VGS, Gate-to-Source Voltage (V)
0.01
0.1
1
10
100
1000
I D
,
D
r
a
i
n
-
t
o
-
S
o
u
r
c
e
C
u
r
r
e
n
t
(
)
TJ = 25C
TJ = 150C
VDS = 50V
20s PULSE WIDTH
-60 -40 -20 0
20 40 60 80 100 120 140 160
TJ , Junction Temperature (C)
0.0
0.5
1.0
1.5
2.0
2.5
3.0
R
D
S
(
o
n
)
,
D
r
a
i
n
-
t
o
-
S
o
u
r
c
e
O
n
R
e
s
i
s
t
a
n
c
e
(
N
o
r
m
a
l
i
z
e
d
)
ID = 15A
VGS = 10V
IRFP15N60L
4
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Fig 5. Typical Capacitance vs.
Drain-to-Source Voltage
Fig 8. Typical Source-Drain Diode
Forward Voltage
Fig 7. Typical Gate Charge vs.
Gate-to-Source Voltage
Fig 6. Typ. Output Capacitance
Stored Energy vs. V
DS
1
10
100
1000
VDS, Drain-to-Source Voltage (V)
1
10
100
1000
10000
100000
C
,
C
a
p
a
c
i
t
a
n
c
e
(
p
F
)
VGS = 0V, f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
Coss = Cds + Cgd
Coss
Crss
Ciss
0
100
200
300
400
500
600
700
VDS, Drain-to-Source Voltage (V)
0
5
10
15
20
25
E
n
e
r
g
y
(
J
)
0
10
20
30
40
50
60
70
QG Total Gate Charge (nC)
0.0
2.0
4.0
6.0
8.0
10.0
12.0
V
G
S
,
G
a
t
e
-
t
o
-
S
o
u
r
c
e
V
o
l
t
a
g
e
(
V
)
VDS= 480V
VDS= 300V
VDS= 120V
ID= 15A
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
VSD, Source-to-Drain Voltage (V)
0.10
1.00
10.00
100.00
I S
D
,
R
e
v
e
r
s
e
D
r
a
i
n
C
u
r
r
e
n
t
(
A
)
TJ = 25C
TJ = 150C
VGS = 0V
IRFP15N60L
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5
Fig 9. Maximum Safe Operating Area
Fig 10. Maximum Drain Current vs.
Case Temperature
V
DS
Pulse Width 1 s
Duty Factor 0.1 %
R
D
V
GS
R
G
D.U.T.
10V
V
DD
Fig 11a. Switching Time Test Circuit
+
-
V
DS
90%
10%
V
GS
t
d(on)
t
r
t
d(off)
t
f
Fig 11b. Switching Time Waveforms
1
10
100
1000
10000
VDS, Drain-to-Source Voltage (V)
0.1
1
10
100
1000
I D
,
D
r
a
i
n
-
t
o
-
S
o
u
r
c
e
C
u
r
r
e
n
t
(
A
)
1msec
10msec
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100sec
Tc = 25C
Tj = 150C
Single Pulse
25
50
75
100
125
150
TC , Case Temperature (C)
0
2
4
6
8
10
12
14
16
I D
,
D
r
a
i
n
C
u
r
r
e
n
t
(
A
)
IRFP15N60L
6
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Fig 12. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig 13. Threshold Voltage vs. Temperature
1E-006
1E-005
0.0001
0.001
0.01
0.1
1
t1 , Rectangular Pulse Duration (sec)
0.0001
0.001
0.01
0.1
1
T
h
e
r
m
a
l
R
e
s
p
o
n
s
e
(
Z
t
h
J
C
)
0.20
0.10
D = 0.50
0.02
0.01
0.05
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty factor D =
t / t
2. Peak T
= P
x Z
+ T
1
2
J
DM
thJC
C
P
t
t
DM
1
2
-75 -50 -25
0
25
50
75 100 125 150 175
TJ , Temperature ( C )
2.0
2.5
3.0
3.5
4.0
4.5
5.0
V
G
S
(
t
h
)
G
a
t
e
t
h
r
e
s
h
o
l
d
V
o
l
t
a
g
e
(
V
)
ID = 250A
IRFP15N60L
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7
Fig 14a. Maximum Avalanche Energy
vs. Drain Current
Fig 14c. Unclamped Inductive Waveforms
D.U.T.
VDS
ID
IG
3mA
VGS
.3
F
50K
.2
F
12V
Current Regulator
Same Type as D.U.T.
Current Sampling Resistors
+
-
Fig 15a. Gate Charge Test Circuit
Fig 15b. Basic Gate Charge Waveform
Fig 14b. Unclamped Inductive Test Circuit
tp
V
(BR)DSS
I
AS
RG
IAS
0.01
tp
D.U.T
L
VDS
+
- VDD
DRIVER
A
15V
20V
Q
G
Q
GS
Q
GD
V
G
Charge
V
GS
V
25
50
75
100
125
150
Starting TJ , Junction Temperature (C)
0
100
200
300
400
500
600
E
A
S
,
S
i
n
g
l
e
P
u
l
s
e
A
v
a
l
a
n
c
h
e
E
n
e
r
g
y
(
m
J
)
ID
TOP 6.7A
9.5A
BOTTOM 15A
IRFP15N60L
8
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P.W.
Period
di/dt
Diode Recovery
dv/dt
Ripple
5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current
Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D =
P.W.
Period
+
-
+
+
+
-
-
-
Fig 16. For N-Channel HEXFET
Power MOSFETs
*
V
GS
= 5V for Logic Level Devices
Peak Diode Recovery dv/dt Test Circuit
R
G
V
DD
dv/dt controlled by R
G
Driver same type as D.U.T.
I
SD
controlled by Duty Factor "D"
D.U.T. - Device Under Test
D.U.T
Circuit Layout Considerations
Low Stray Inductance
Ground Plane
Low Leakage Inductance
Current Transformer
*
IRFP15N60L
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9
TO-247AC Part Marking Information
TO-247AC Package Outline
Dimensions are shown in millimeters (inches)
LEAD ASSIGNMENTS
NOTES:
- D -
5.30 (.209)
4.70 (.185)
2.50 (.089)
1.50 (.059)
4
3X
0.80 (.031)
0.40 (.016)
2.60 (.102)
2.20 (.087)
3.40 (.133)
3.00 (.118)
3X
0.25 (.010) M C A S
4.30 (.170)
3.70 (.145)
- C -
2X
5.50 (.217)
4.50 (.177)
5.50 (.217)
0.25 (.010)
1.40 (.056)
1.00 (.039)
3.65 (.143)
3.55 (.140)
D
M
M
B
- A -
15.90 (.626)
15.30 (.602)
- B -
1
2
3
20.30 (.800)
19.70 (.775)
14.80 (.583)
14.20 (.559)
2.40 (.094)
2.00 (.079)
2X
2X
5.45 (.215)
1 DIMENSIONING & TOLERANCING
PER ANSI Y14.5M, 1982.
2 CONTROLLING DIMENSION : INCH.
3 CONFORMS TO JEDEC OUTLINE
TO-247-AC.
1 - GATE
2 - DRAIN
3 - SOURCE
4 - DRAIN
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR's Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.02/03
TO-247AC package is not recommended for Surface Mount Application.
Notes: T his part marking information applies to devices produced after 02/26/2001
EXAMPLE:
ASSEMBLED ON WW 35, 2000
LOT CODE 5657
WITH ASSEMBLY
THIS IS AN IRFPE30
IN THE ASSEMBLY LINE "H"
035H
LOGO
INTERNATIONAL
RECTIFIER
IRFPE30
LOT CODE
ASSEMBLY
56 57
PART NUMBER
DATE CODE
YEAR 0 = 2000
WEEK 35
LINE H
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