IRFZ44ES/L
HEXFET
Power MOSFET
PD - 9.1714
11/18/97
Parameter
Max.
Units
I
D
@ T
C
= 25C
Continuous Drain Current, V
GS
@ 10V
48
I
D
@ T
C
= 100C
Continuous Drain Current, V
GS
@ 10V
34
A
I
DM
Pulsed Drain Current
192
P
D
@T
C
= 25C
Power Dissipation
110
W
Linear Derating Factor
0.71
W/C
V
GS
Gate-to-Source Voltage
20
V
E
AS
Single Pulse Avalanche Energy
220
mJ
I
AR
Avalanche Current
29
A
E
AR
Repetitive Avalanche Energy
11
mJ
dv/dt
Peak Diode Recovery dv/dt
5.0
V/ns
T
J
Operating Junction and
-55 to + 175
T
STG
Storage Temperature Range
Soldering Temperature, for 10 seconds
300 (1.6mm from case )
C
Mounting torque, 6-32 or M3 srew
10 lbfin (1.1Nm)
Absolute Maximum Ratings
Parameter
Typ.
Max.
Units
R
JC
Junction-to-Case
1.4
R
CS
Case-to-Sink, Flat, Greased Surface
0.50
C/W
R
JA
Junction-to-Ambient
62
Thermal Resistance
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1
l
Advanced Process Technology
l
Surface Mount (IRFZ44ES)
l
Low-profile through-hole (IRFZ44EL)
l
175C Operating Temperature
l
Fast Switching
l
Fully Avalanche Rated
Fifth Generation HEXFETs from International Rectifier utilize advanced
processing techniques to achieve extremely low on-resistance per silicon area.
This benefit, combined with the fast switching speed and ruggedized device
design that HEXFET Power MOSFETs are well known for, provides the designer
with an extremely efficient and reliable device for use in a wide variety of
applications.
The D
2
Pak is a surface mount power package capable of accommodating die
sizes up to HEX-4. It provides the highest power capability and the lowest
possible on-resistance in any existing surface mount package. The D
2
Pak is
suitable for high current applications because of its low internal connection
resistance and can dissipate up to 2.0W in a typical surface mount application.
The through-hole version (IRFZ44EL) is available for low-profile applications.
Description
V
DSS
= 60V
R
DS(on)
= 0.023
I
D
= 48A
2
D Pak
T O -26 2
S
D
G
PRELIMINARY
IRFZ44ES/L
2
www.irf.com
S
D
G
Parameter
Min. Typ. Max. Units
Conditions
I
S
Continuous Source Current
MOSFET symbol
(Body Diode)
showing the
I
SM
Pulsed Source Current
integral reverse
(Body Diode)
p-n junction diode.
V
SD
Diode Forward Voltage
1.3
V
T
J
= 25C, I
S
= 29A, V
GS
= 0V
t
rr
Reverse Recovery Time
69
104
ns
T
J
= 25C, I
F
= 29A
Q
rr
Reverse Recovery Charge
177
266
nC
di/dt = 100A/s
t
on
Forward Turn-On Time
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
+L
D
)
Source-Drain Ratings and Characteristics
48
192
A
Starting T
J
= 25C, L = 520H
R
G
= 25
, I
AS
= 29A. (See Figure 12)
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
Notes:
I
SD
29A, di/dt
320A/s, V
DD
V
(BR)DSS
,
T
J
175C
Pulse width
300s; duty cycle
2%.
Uses IRFZ44E data and test conditions
** When mounted on 1" square PCB ( FR-4 or G-10 Material ).
For recommended soldering techniques refer to application note #AN-994.
Parameter
Min. Typ. Max. Units
Conditions
V
(BR)DSS
Drain-to-Source Breakdown Voltage
60
V
V
GS
= 0V, I
D
= 250A
DV
(BR)DSS
/DT
J
Breakdown Voltage Temp. Coefficient
0.063
V/C
Reference to 25C, I
D
= 1mA
R
DS(on)
Static Drain-to-Source On-Resistance
0.023
V
GS
= 10V, I
D
= 29A
V
GS(th)
Gate Threshold Voltage
2.0
4.0
V
V
DS
= V
GS
, I
D
= 250A
g
fs
Forward Transconductance
15
S
V
DS
= 30V, I
D
= 29A
25
A
V
DS
= 60V, V
GS
= 0V
250
V
DS
= 48V, V
GS
= 0V, T
J
= 150C
Gate-to-Source Forward Leakage
100
V
GS
= 20V
Gate-to-Source Reverse Leakage
-100
nA
V
GS
= -20V
Q
g
Total Gate Charge
60
I
D
= 29A
Q
gs
Gate-to-Source Charge
13
nC
V
DS
= 48V
Q
gd
Gate-to-Drain ("Miller") Charge
23
V
GS
= 10V, See Fig. 6 and 13
t
d(on)
Turn-On Delay Time
12
V
DD
= 30V
t
r
Rise Time
60
I
D
= 29A
t
d(off)
Turn-Off Delay Time
70
R
G
= 15
t
f
Fall Time
70
R
D
= 1.1
, See Fig. 10
Between lead,
and center of die contact
C
iss
Input Capacitance
1360
V
GS
= 0V
C
oss
Output Capacitance
420
pF
V
DS
= 25V
C
rss
Reverse Transfer Capacitance
160
= 1.0MHz, See Fig. 5
Electrical Characteristics @ T
J
= 25C (unless otherwise specified)
I
GSS
ns
I
DSS
Drain-to-Source Leakage Current
nH
7.5
L
S
Internal Source Inductance
IRFZ44ES/L
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3
1
10
100
1000
0.1
1
10
100
20s PULSE WIDTH
T = 25 C
J
TOP
BOTTOM
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
V , Drain-to-Source Voltage (V)
I , Drain-to-Source Current (A)
DS
D
4.5V
1
10
100
1000
0.1
1
10
100
20s PULSE WIDTH
T = 175 C
J
TOP
BOTTOM
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
V , Drain-to-Source Voltage (V)
I , Drain-to-Source Current (A)
DS
D
4.5V
Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics
1
10
100
1000
4
5
6
7
8
9
10
V = 25V
20s PULSE WIDTH
DS
V , Gate-to-Source Voltage (V)
I , Drain-to-Source Current (A)
GS
D
T = 175 C
J
T = 25 C
J
-60 -40 -20
0
20 40 60 80 100 120 140 160 180
0.0
0.5
1.0
1.5
2.0
2.5
T , Junction Temperature( C)
R , Drain-to-Source On Resistance
(Normalized)
J
DS(on)
V
=
I =
GS
D
10V
48A
Fig 4. Normalized On-Resistance
Vs. Temperature
IRFZ44ES/L
4
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Fig 7. Typical Source-Drain Diode
Forward Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
1
10
100
1000
1
10
100
1000
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
Single Pulse
T
T
= 175 C
= 25 C
J
C
V , Drain-to-Source Voltage (V)
I , Drain Current (A)
I , Drain Current (A)
DS
D
10us
100us
1ms
10ms
Fig 7. Typical Source-Drain Diode
Forward Voltage
Fig 8. Maximum Safe Operating Area
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
1
10
100
0
500
1000
1500
2000
2500
V , Drain-to-Source Voltage (V)
C, Capacitance (pF)
DS
V
C
C
C
=
=
=
=
0V,
C
C
C
f = 1MHz
+ C
+ C
C SHORTED
GS
iss
gs
gd ,
ds
rss
gd
oss
ds
gd
C
iss
C
oss
C
rss
0
10
20
30
40
50
60
0
4
8
12
16
20
Q , Total Gate Charge (nC)
V , Gate-to-Source Voltage (V)
G
GS
FOR TEST CIRCUIT
SEE FIGURE
I =
D
13
29
V
= 30V
DS
V
= 48V
DS
1
10
100
1000
0.5
1.0
1.5
2.0
2.5
V ,Source-to-Drain Voltage (V)
I , Reverse Drain Current (A)
SD
SD
V = 0 V
GS
T = 25 C
J
T = 175 C
J
IRFZ44ES/L
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5
R
D
Fig 9. Maximum Drain Current Vs.
Case Temperature
Fig 10a. Switching Time Test Circuit
V
DS
90%
10%
V
GS
t
d(on)
t
r
t
d(off)
t
f
Fig 10b. Switching Time Waveforms
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
V
DS
Pulse Width
1
s
Duty Factor
0.1 %
V
GS
R
G
D.U.T.
10V
+
-
25
50
75
100
125
150
175
0
10
20
30
40
50
T , Case Temperature ( C)
I , Drain Current (A)
C
D
Fig 9. Maximum Drain Current Vs.
Case Temperature
Fig 10a. Switching Time Test Circuit
V
DS
90%
10%
V
GS
t
d(on)
t
r
t
d(off)
t
f
Fig 10b. Switching Time Waveforms
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
V
DS
Pulse Width
1
s
Duty Factor
0.1 %
V
GS
R
G
D.U.T.
10V
V
DD
25
50
75
100
125
150
175
0
10
20
30
40
50
T , Case Temperature ( C)
I , Drain Current (A)
C
D
0.01
0.1
1
10
0.00001
0.0001
0.001
0.01
0.1
1
Notes:
1. Duty factor D = t / t
2. Peak T = P
x Z
+ T
1
2
J
DM
thJC
C
P
t
t
DM
1
2
t , Rectangular Pulse Duration (sec)
Thermal Response
(Z )
1
thJC
0.01
0.02
0.05
0.10
0.20
D = 0.50
SINGLE PULSE
(THERMAL RESPONSE)
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