1
LTC1155
Dual High Side
Micropower MOSFET Driver
S
FEATURE
U
A
O
PPLICATI
TYPICAL
s
Fully Enhances N-Channel Power MOSFETs
s
8
A Standby Current
s
85
A ON Current
s
Short-Circuit Protection
s
Wide Power Supply Range: 4.5V to 18V
s
Controlled Switching ON and OFF Times
s
No External Charge Pump Components
s
Replaces P-Channel High Side MOSFETs
s
Compatible with Standard Logic Families
s
Available in 8-Pin SO Package
D
U
ESCRIPTIO
The LTC
1155 dual high side gate driver allows using low
cost N-channel FETs for high side switching applications.
An internal charge pump boosts the gate above the posi-
tive rail, fully enhancing an N-channel MOSFET with no
external components. Micropower operation, with 8
A
standby current and 85
A operating current, allows use in
virtually all systems with maximum efficiency.
Included on-chip is overcurrent sensing to provide auto-
matic shutdown in case of short circuits. A time delay can
be added in series with the current sense to prevent false
triggering on high in-rush loads such as capacitors and
incandescent lamps.
The LTC1155 operates off of a 4.5V to 18V supply input
and safely drives the gates of virtually all FETs. The
LTC1155 is well suited for low voltage (battery-powered)
applications, particularly where micropower "sleep" op-
eration is required.
The LTC1155 is available in both 8-pin PDIP and 8-pin SO
packages.
, LTC and LT are registered trademarks of Linear Technology Corporation.
U
S
A
O
PPLICATI
s
Laptop Power Bus Switching
s
SCSI Termination Power Switching
s
Cellular Phone Power Management
s
P-Channel Switch Replacement
s
Relay and Solenoid Drivers
s
Low Frequency Half H-Bridge
s
Motor Speed and Torque Control
OUTPUT CURRENT (A)
0
0.00
VOLTAGE DROP (V)
0.05
0.10
0.15
0.20
0.25
1
2
3
1155 TA02
Switch Voltage Drop
1155 TA01
R
SEN
0.02
C
DLY
0.1
F
10
F
5A
MAX
R
DLY
100k
POWER BUS
P
SYSTEM
DISK
DRIVE
DISPLAY
PRINTER,
ETC.
LTC1155
TTL, CMOS INPUT
TTL, CMOS INPUT
GND
GND
IN1
IN2
G2
DS2
V
S
DS1
G1
V
S
= 4.5V TO 5.5V
C
DLY
0.1
F
R
SEN
0.02
R
DLY
100k
*SURFACE MOUNT
*IRLR034
5A
MAX
*IRLR034
+
Laptop Computer Power Bus Switch with Short Circuit Protection
2
LTC1155
Supply Voltage ........................................................ 22V
Input Voltage ...................... (V
S
+0.3V) to (GND 0.3V)
Gate Voltage ......................... (V
S
+24V) to (GND 0.3V)
Current (Any Pin) .................................................. 50mA
Storage Temperature Range ................. 65
C to 150
C
A
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G
W
A
W
U
W
A
R
BSOLUTE
XI
TI
S
Operating Temperature Range
LTC1155C................................................ 0
C to 70
C
LTC1155I ........................................... 40
C to 85
C
LTC1155M ........................................ 55
C to 125
C
Lead Temperature Range (Soldering, 10 sec.)...... 300
C
(Note 1)
ELECTRICAL C
C
HARA TERISTICS
LTC1155M
LTC1155C/LTC1155I
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
V
S
Supply Voltage
q
4.5
18
4.5
18
V
I
Q
Quiescent Current OFF
V
IN
= 0V, V
S
= 5V (Note 2)
8
20
8
20
A
Quiescent Current ON
V
S
= 5V, V
IN
= 5V (Note 3)
85
120
85
120
A
Quiescent Current ON
V
S
= 12V, V
IN
= 5V (Note 3)
180
400
180
400
A
V
INH
Input High Voltage
q
2.0
2.0
V
V
INL
Input Low Voltage
q
0.8
0.8
V
I
IN
Input Current
0V < V
IN
< V
S
q
1.0
1.0
A
C
IN
Input Capacitance
5
5
pF
V
SEN
Drain Sense Threshold Voltage
80
100
120
80
100
120
mV
q
75
100
125
75
100
125
mV
I
SEN
Drain Sense Input Current
0V < V
SEN
< V
S
0.1
0.1
A
V
GATE
-V
S
Gate Voltage Above Supply
V
S
= 5V
q
6.0
6.8
9.0
6.0
6.8
9.0
V
V
S
= 6V
q
7.5
8.5
15
7.5
8.5
15
V
V
S
= 12V
q
15
18
25
15
18
25
V
t
ON
Turn ON Time
V
S
= 5V, C
GATE
= 1000pF
Time for V
GATE
> V
S
+ 2V
50
250
750
50
250
750
s
Time for V
GATE
> V
S
+ 5V
200
1100
2000
200
1100
2000
s
V
S
= 12V, C
GATE
= 1000pF
Time for V
GATE
> V
S
+ 5V
50
180
500
50
180
500
s
Time for V
GATE
> V
S
+ 10V
120
450
1200
120
450
1200
s
The
q
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T
A
= 25
C.
V
S
= 4.5V to 18V, unless otherwise noted.
W
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PACKAGE/ORDER I FOR ATIO
ORDER PART
NUMBER
1
2
3
4
8
7
6
5
TOP VIEW
DS1
G1
GND
IN1
DS2
G2
V
S
IN2
J8 PACKAGE
8-LEAD CERDIP
N8 PACKAGE
8-LEAD PDIP
T
JMAX
= 150
C,
JA
= 100
C/W (J8)
T
JMAX
= 100
C,
JA
= 130
C/W (N8)
LTC1155CN8
LTC1155CJ8
LTC1155IN8
LTC1155MJ8
ORDER PART
NUMBER
S8 PART MARKING
LTC1155CS8
LTC1155IS8
1155
1155I
T
JMAX
= 100
C,
JA
= 150
C/W
1
2
3
4
8
7
6
5
TOP VIEW
DS2
G2
V
S
IN2
DS1
G1
GND
IN1
S8 PACKAGE
8-LEAD PLASTIC SO
3
LTC1155
C
C
HARA TERISTICS
U
W
A
TYPICAL PERFOR
CE
Standby Supply Current
Supply Current/Side (ON)
High Side Gate Voltage
Input Threshold Voltage
Drain Sense Threshold Voltage
Low Side Gate Voltage
SUPPLY VOLTAGE (V)
0
0
SUPPLY CURRENT ( A)
30
35
40
45
50
5
10
20
1155 G01
5
10
15
20
25
15
V
IN1
= V
IN2
= 0V
T
J
= 25
C
SUPPLY VOLTAGE (V)
0
0
SUPPLY CURRENT ( A)
600
700
800
900
1000
5
10
20
1155 G02
100
200
300
400
500
15
V
IN1
OR V
IN2
= 2V
T
J
= 25
C
SUPPLY VOLTAGE (V)
0
4
V V (V)
16
18
20
22
24
5
10
20
1155 TPC03
6
8
10
12
14
15
S
GATE
SUPPLY VOLTAGE (V)
0
0.4
INPUT THRESHOLD VOLTAGE (V)
1.6
1.8
2.0
2.2
2.4
5
10
20
1155 G04
0.6
0.8
1.0
1.2
1.4
15
V
ON
V
OFF
SUPPLY VOLTAGE (V)
0
50
DRAIN SENSE THRESHOLD VOLTAGE (V)
110
120
130
140
150
5
10
20
1155 G05
60
70
80
90
100
15
SUPPLY VOLTAGE (V)
0
0
V
GATE
(V)
18
21
24
27
30
2
4
10
1155 G06
3
6
9
12
15
6
8
LTC1155M
LTC1155C/LTC1155I
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
t
OFF
Turn OFF Time
V
S
= 5V, C
GATE
= 1000pF
Time for V
GATE
< 1V
10
36
60
10
36
60
s
V
S
= 12V, C
GATE
= 1000pF
Time for V
GATE
< 1V
10
26
60
10
26
60
s
t
SC
Short-Circuit Turn OFF Time
V
S
= 5V, C
GATE
= 1000pF
Time for V
GATE
< 1V
5
16
30
5
16
30
s
V
S
= 12V, C
GATE
= 1000pF
Time for V
GATE
< 1V
5
16
30
5
16
30
s
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: Quiescent current OFF is for both channels in OFF condition.
Note 3: Quiescent current ON is per driver and is measured independently.
The
q
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T
A
= 25
C.
V
S
= 4.5V to 18V, unless otherwise noted.
ELECTRICAL C
C
HARA TERISTICS
4
LTC1155
C
C
HARA TERISTICS
U
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TYPICAL PERFOR
CE
Turn ON Time
Turn OFF Time
Short-Circuit Turn OFF Delay Time
SUPPLY VOLTAGE (V)
0
0
TURN-ON TIME (
s)
600
700
800
900
1000
5
10
20
1155 G07
100
200
300
400
500
15
C
GATE
= 1000pF
V
GS
= 5V
V
GS
= 2V
SUPPLY VOLTAGE (V)
0
0
TURN OFF TIME ( s)
30
35
40
45
50
5
10
20
1155 G08
5
10
15
20
25
15
C
GATE
= 100pF
TIME FOR V
GATE
< 1V
SUPPLY VOLTAGE (V)
0
0
TURN-OFF TIME (
s)
30
35
40
45
50
5
10
20
1155 G09
5
10
15
20
25
15
V
SEN
= V
S
1V
NO EXTERNAL DELAY
C
GATE
= 1000pF
TIME FOR V
GATE
< 1V
Standby Supply Current
Supply Current Per Side (ON)
Input ON Threshold
TEMPERATURE (
C)
50
0
SUPPLY CURRENT (
A)
5
10
25
35
40
50
25
0
25
50
1155 G10
15
20
30
45
75
100
125
V
S
= 5V
V
S
= 18V
TEMPERATURE (
C)
50
0
SUPPLY CURRENT (
A)
100
200
500
700
800
1000
25
0
25
50
1155 G11
300
400
600
900
75
100
125
V
S
= 12V
V
S
= 5V
TEMPERATURE (
C)
50
0.4
INPUT THRESHOLD (V)
0.6
0.8
1.4
1.8
2.0
2.4
25
0
25
50
1155 G12
1.0
1.2
1.6
2.2
75
100
125
V
S
= 18V
V
S
= 5V
Input Pin
The LTC1155 logic input is a high impedance CMOS gate
and should be grounded when not in use. These input pins
have ESD protection diodes to ground and supply and,
therefore, should not be forced beyond the power supply
rails.
Gate Drive Pin
The gate drive pin is either driven to ground when the
switch is turned OFF or driven above the supply rail when
the switch is turned ON. This pin is a relatively high
impedance when driven above the rail (the equivalent of a
PI
N
FU
N
CTIO
N
S
U
U
U
few hundred k
). Care should be taken to minimize any
loading of this pin by parasitic resistance to ground or
supply.
Supply Pin
The supply pin of the LTC1155 serves two vital purposes.
The first is obvious: it powers the input, gate drive,
regulation and protection circuitry. The second purpose is
less obvious: it provides a Kelvin connection to the top of
the two drain sense resistors for the internal 100mV
reference. The supply pin should be connected directly to
the power supply source as close as possible to the top of
the two sense resistors.
5
LTC1155
PI
N
FU
N
CTIO
N
S
U
U
U
The supply pin of the LTC1155 should not be forced below
ground as this may result in permanent damage to the
device. A 300
resistor should be inserted in series with
the ground pin if negative supply voltages are anticipated.
Drain Sense Pin
As noted previously, the drain sense pin is compared
against the supply pin voltage. If the voltage at this pin is
more than 100mV below the supply pin, the input latch will
be reset and the MOSFET gate will be quickly discharged.
Cycle the input to reset the short-circuit latch and turn the
MOSFET back on.
This pin is also a high impedance CMOS gate with ESD
protection and, therefore, should not be forced beyond the
power supply rails. To defeat the over current protection,
short the drain sense to supply.
Some loads, such as large supply capacitors, lamps or
motors require high inrush currents. An RC time delay
must be added between the sense resistor and the drain
sense pin to ensure that the drain sense circuitry does not
false trigger during start-up. This time constant can be set
from a few microseconds to many seconds. However, very
long delays may put the MOSFET in risk of being destroyed
by a short-circuit condition (see Applications Information
section).
OPERATIO
U
The LTC1155 contains two independent power MOSFET
gate drivers and protection circuits (refer to the Block
Diagram for details). Each half of the LTC1155 consists of
the following functional blocks:
TTL and CMOS Compatible Inputs
Each driver input has been designed to accommodate a
wide range of logic families. The input threshold is set at
1.3V with approximately 100mV of hysteresis.
A voltage regulator with low standby current provides
continuous bias for the TTL to CMOS converters. The TTL
to CMOS converter output enables the rest of the circuitry.
In this way the power consumption is kept to a minimum
in the standby mode.
Internal Voltage Regulation
The output of the TTL to CMOS converter drives two
regulated supplies which power the low voltage CMOS
logic and analog blocks. The regulator outputs are isolated
from each other so that the noise generated by the charge
pump logic is not coupled into the 100mV reference or the
analog comparator.
W
I
D AGRA
BLOCK
1155 BD
GATE
ONE
SHOT
FAST/SLOW
GATE CHARGE
LOGIC
OSCILLATOR
AND CHARGE
PUMP
INPUT
LATCH
GATE CHARGE
AND DISCHARGE
CONTROL LOGIC
R
S
10
s
DELAY
COMP
100mV
REFERENCE
DRAIN
SENSE
ANALOG SECTION
ANALOG
DIGITAL
TTL-TO-CMOS
CONVERTER
V
S
IN
LOW STANDBY
CURRENT
REGULATOR
GND
VOLTAGE
REGULATORS
6
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Gate Charge Pump
Gate drive for the power MOSFET is produced by an
adaptive charge pump circuit that generates a gate voltage
substantially higher than the power supply voltage. The
charge pump capacitors are included on-chip and, there-
fore, no external components are required to generate the
gate drive.
Drain Current Sense
The LTC1155 is configured to sense the drain current of
the power MOSFET in high side applications. An internal
100mV reference is compared to the drop across a sense
resistor (typically 0.002
to 0.1
) in series with the drain
lead. If the drop across this resistor exceeds the internal
100mV threshold, the input latch is reset and the gate is
quickly discharged by a large N-channel transistor.
Controlled Gate Rise and Fall Times
When the input is switched ON and OFF, the gate is
charged by the internal charge pump and discharged in a
controlled manner. The charge and discharge rates have
been set to minimize RFI and EMI emissions in normal
operation. If a short circuit or current overload condition
is encountered, the gate is discharged very quickly (typi-
cally a few microseconds) by a large N-channel transistor.
OPERATIO
U
Protecting the MOSFET
The MOSFET is protected against destruction by removing
drive from the gate as soon as an overcurrent condition is
detected. Resistive and inductive loads can be protected
with no external time delay. Large capacitive or lamp
loads, however, require that the overcurrent shutdown
function be delayed long enough to start the load but short
enough to ensure the safety of the MOSFET.
Example Calculations
Consider the circuit of Figure 1. A power MOSFET is driven
by one side of an LTC1155 to switch a high inrush current
load. The drain sense resistor is selected to limit the
maximum DC current to 3.3A.
R
SEN
= V
SEN
/I
TRIP
= 0.1/3.3A
= 0.03
A time delay is introduced between R
SEN
and the drain
sense pin of the LTC1155 which provides sufficient delay
to start a high inrush load such as large supply capacitors.
In this example circuit, we have selected the IRLZ34
because of its low R
DS(ON )
(0.05
with V
GS
= 5V). The FET
1155 F01
IRLZ34
LOAD
LTC1155
GND
GND
G1
DS1
V
S
IN1
V
S
= 5.0V
C
DLY
0.22
F
R
SEN
0.03
R
DLY
270k
Figure 1. Adding an RC Delay
drops 0.1V at 2A and, therefore, dissipates 200mW in
normal operation (no heat sinking required).
If the output is shorted to ground, the current through the
FET rises rapidly and is limited by the R
DS(ON)
of the FET,
the drain sense resistor and the series resistance be-
tween the power supply and the FET. Series resistance in
the power supply can be substantial and attributed to
many sources including harness wiring, PCB traces,
supply capacitor ESR, transformer resistance or battery
resistance.
7
LTC1155
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For this example, we assume a worst-case scenario; i.e.,
that the power supply to the power MOSFET is "hard" and
provides a constant 5V regardless of the current. In this
case, the current is limited by the R
DS(ON)
of the MOSFET
and the drain sense resistance. Therefore:
I
PEAK
= V
SUPPLY
/0.08
= 62.5A
The drop across the drain sense resistor under these
conditions is much larger than 100mV and is equal to the
drain current times the sense resistance:
V
DROP
= (I
PEAK
)(R
SEN
)
= 1.88V
By consulting the power MOSFET data sheet SOA graph,
we note that the IRLZ34 is capable of delivering 62.5A at
a drain-to-source voltage of 3.12V for approximately
10ms.
An RC time constant can now be calculated which satisfies
this requirement:
Graphical Approach to Selecting R
DLY
and C
DLY
Figure 2 is a graph of normalized overcurrent shutdown
time versus normalized MOSFET current. This graph can
be used instead of the above equation to calculate the RC
time constant. The Y axis of the graph is normalized to one
RC time constant. The X axis is normalized to the set
current. (The set current is defined as the current required
to develop 100mV across the drain sense resistor).
This time constant should be viewed as a maximum safe
delay time and should be reduced if the competing
requirement of starting a high inrush current load is less
stringent; i.e., if the inrush time period is calculated at
20ms, the RC time constant should be set at roughly two
or three times this time period and not at the maximum of
182ms. A 60ms time constant would be produced with a
270k resistor and a 0.22
F capacitor (as shown in
Figure 1).
RC
t
In
V
R
I
RC
In
ms
SEN
SEN
MAX
=
-
=
-
=
=
.
.
.
.
.
/ .
1
0 01
1
0 10
0 030 62 5
0 01 0 054
182
Note that the shutdown time is shorter for increasing
levels of MOSFET current. This ensures that the total
energy dissipated by the MOSFET is always within the
bounds established by the MOSFET manufacturer for safe
operation.
In the example presented above, we established that the
power MOSFET should not be allowed to pass 62.5A for
more than 10ms. 62.5A is roughly 18 times the set current
of 3.3A. By drawing a line up from 18 and reflecting it off
the curve, we establish that the RC time constant should
be set at 10ms divided by 0.054, or 180ms. Both methods
result in the same conclusion.
Using a Speed Up Diode
A way to further reduce the amount of time that the power
MOSFET is in a short-circuit condition is to "bypass"the
delay resistor with a small signal diode as shown in Figure
3. The diode will engage when the drop across the drain
sense resistor exceeds 0.7V, providing a direct path to the
MOSFET CURRENT (1 = SET CURRENT)
1
0.01
OVERCURRENT SHUTDOWN TIME (1= RC)
0.1
1
10
5
10
20
100
1155 F02
2
50
Figure 2. Shutdown Time vs MOSFET Current
8
LTC1155
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If the MOSFET is turned ON and the power supply (battery)
removed, the inductor current is delivered by the supply
capacitor. The supply capacitor must be large enough to
deliver the energy demanded by the discharging inductor.
If the storage capacitor is too small, the supply lead of the
LTC1155 may be pulled below ground, permanently
destroying the device.
Consider the case of a load inductance of 1mH which is
supporting 3A when the 6V power supply connection is
interrupted. A supply capacitor of at least 250
F is
required to prevent the supply lead of the LTC1155 from
being pulled below ground (along with any other circuitry
tied to the supply).
Any wire between the power MOSFET source and the load
will add a small amount of parasitic inductance in series
with the load (approximately 0.4
H/foot). Bypass the
power supply lead of the LTC1155 with a minimum of
10
F to ensure that this parasitic load inductance is
discharged safely, even if the load is otherwise resistive.
Large Inductive Loads
Large inductive loads (>0.1mH) may require diodes con-
nected directly across the inductor to safely divert the
stored energy to ground. Many inductive loads have these
diodes included. If not, a diode of the proper current rating
should be connected across the load to safely divert the
stored energy.
Reverse-Battery Protection
The LTC1155 can be protected against reverse-battery
conditions by connecting a resistor in series with the
ground lead as shown in Figure 5. The resistor limits the
supply current to less than 50mA with 12V applied. Since
the LTC1155 draws very little current while in normal
operation, the drop across the ground resistor is minimal.
The TTL or CMOS driving logic is protected against
reverse-battery conditions by the 100k input current lim-
iting resistor. The addition of 100k resistance in series
with the input pin will not affect the turn ON and turn OFF
times which are dominated by the controlled gate charge
and discharge periods.
Figure 4. Switched Supply
1155 F04
IRLZ34
L
LOAD
LTC1155
GND
GND
G1
DS1
V
S
IN1
C
DLY
R
SEN
0.025
R
DLY
C
S
+
+
sense pin and dramatically reducing the amount of time
the MOSFET is in an overload condition. The drain sense
resistor value is selected to limit the maximum DC current
to 4A. Above 28A, the delay time drops to 10
s.
Switched Supply Applications
Large inductive loads, such as solenoids, relays and
motors store energy which must be directed back to either
the power supply or to ground when the supply voltage is
interrupted (see Figure 4). In normal operation, when the
switch is turned OFF, the energy stored in the inductor is
harmlessly absorbed by the MOSFET; i.e., the current
flows out of the supply through the MOSFET until the
inductor current falls to zero.
1155 F03
IRLZ34
LOAD
LTC1155
GND
GND
G1
DS1
V
S
IN1
V
S
= 5.0V
C
DLY
0.22
F
R
SEN
0.025
R
DLY
270k
D1
1N4148
Figure 3. Using a Speed-Up Diode
9
LTC1155
Dual 2A Autoreset Electronic Fuse
U
S
A
O
PPLICATI
TYPICAL
U
S
A
O
PPLICATI
W
U
U
I FOR ATIO
Overvoltage Protection
The MOSFET and load can be protected against overvolt-
age conditions by using the circuit of Figure 6. The drain
sense function is used to detect an overvoltage condition
and quickly discharge the power MOSFET gate. The 18V
zener diode conducts when the supply voltage exceeds
Figure 5. Reverse Battery Protection
1155 F05
LOAD
LTC1155
GND
GND
G1
DS1
V
S
IN1
V
S
= 4.5V TO 18V
C
DLY
R
SEN
R
DLY
100k
5V
300
1/4W
10
F
25V
+
18.6V and pulls the drain sense pin 0.6V below the supply
pin voltage.
The supply voltage is limited to 18.6V and the gate drive is
immediately removed from the MOSFET to ensure that it
cannot conduct during the overvoltage period. The gate of
the MOSFET will be latched OFF until the supply transient
is removed and the input turned OFF and ON again.
Figure 6. Overvoltage Shutdown and Protection
1155 F06
LOAD
LTC1155
GND
GND
G1
DS1
V
S
IN1
V
S
= 4.5V TO 18V
510
10k
1N4148
18V
1155 TA03
0.03
10
F
1/2 SI9956DY
30k
LTC1155
GND
IN1
IN2
DS2
V
S
DS1
0.03
G2
G1
0.1
F
30k
0.1
F
5V
100k
1/2 SI9956DY
1N4148
1N4148
OUT 1
OUT 2
100k
750k
1.0
F
LMC555
6
1
2
3
8
4
f
O
= 1Hz
ALL COMPONENTS SHOWN ARE SURFACE MOUNT
+
10
LTC1155
U
S
A
O
PPLICATI
TYPICAL
X-NOR Fault Detection
High Side Driver with V
DS
Sense Short-Circuit Shutdown
Low Side Driver with Drain End Current Sensing
Low Side Driver with Source End Current Sensing
1155 TA04
1/2
LTC1155
GND
G1
DS1
V
S
IN1
4.5V TO 6V
30k
270k
5V
10
F
LOAD
0.01
F
*
IRLZ24
*ANY 74C OR 74HC LOGIC GATE.
MOSFET SHUTS DOWN IF V
DS
> 1V
+
Truth Table
IN
OUT
CONDITION
FLT
0
0
Switch OFF
1
1
0
Short Circuit
0
0
1
Open Load
0
1
1
Switch ON
1
1155 TA05
1/2
LTC1155
GND
G1
DS1
V
S
IN1
4.5V TO 6V
0.1
100k
10
F
LOAD
IRLD024
FAULT
10k
74C266
+
1155 TA06
1/2
LTC1155
GND
G1
DS1
V
S
IN1
5V
0.05
5%
10
F
LOAD
SMP25N05
+
1155 TA07
1/2
LTC1155
GND
G1
DS1
V
S
IN1
5V
51
10
F
LOAD
SMP25N05
*DO NOT SUBSTITUTE. MUST BE A PRECISION, SINGLE
SUPPLY, MICROPOWER OP AMP (I
Q
< 60
A)
+
51
0.02
5%
LT
1077*
V
LOAD
6
7
3
2
4
+
11
LTC1155
U
S
A
O
PPLICATI
TYPICAL
Using the Second Channel for Fault Detection
Bootstrapped Gate Drive for (100Hz < F
O
< 10kHz)
5V/3A Extremely Low Voltage Drop Regulator with 10
A Standby
Current and Short-Circuit Protection
Automotive High Side Driver with Reverse-Battery
and High Voltage Transient Protection
1155 TA08
1/2
LTC1155
GND
G1
DS1
V
S
IN1
9V TO 16V
0.02
5%
10
F
VALVE,
ETC.
MTP50N05E
*PROTECTS TTL/CMOS GATES DURING HIGH VOLTAGE
TRANSIENT OR REVERSE BATTERY
**NOT REQUIRED FOR INDUCTIVE OR RESISTIVE LOADS
5V
100k*
18V
1N4746A
18V
1N4746A
R
DLY
**
C
DLY
**
M
300
1/4W
+
1155 TA10
LTC1155
GND
G1
DS2
V
S
IN1
4.5V TO 5.5V
0.05
10
F
LOAD
SMD25N05-45L
NOTE:
DRAIN SENSE 2 IS USED TO DETECT A FAULT IN CHANNEL 1.
GATE 2 PULLS DOWN ON DRAIN SENSE 1 TO DISCHARGE
THE MOSFET AND REPORT THE FAULT TO THE
P
*NOT REQUIRED FOR RESISTIVE OR INDUCTIVE LOADS
0.1
F*
100k
P OR
CONTROL
LOGIC
1N4148
1N4148
30k*
IN2
G2
DS1
FLT
ON/OFF
100k
+
1155 TA11
1/2
LTC1155
GND
G1
DS1
V
S
IN1
9V TO 18V
0.01
IRFZ44
RISE AND FALL TIMES ARE
ETA TIMES FASTER
30k
P OR
CMOS/TTL
LOGIC
2N2222
V
GATE
= 2V
S
0.6V
1N4148
0.01
F
0.1
F
LOAD
5V
18V
2N3906
1155 TA09
1/2
LTC1155
GND
G1
DS1
V
S
IN1
5.2V TO 6V
0.02
10
F
IRLR024
*CAPACITOR ESR SHOULD BE LESS THAN 0.5
300k
0.1
F
ON/OFF
100k
0.1
F
200pF
10k
1
3
4
5
6
7
8
LT1431
5V/3A
470
F*
FAULT
+
+
12
LTC1155
U
S
A
O
PPLICATI
TYPICAL
High Efficiency 60Hz Full-Wave Synchronous Rectifier
Logic Controlled Boost Mode Switching Regulator with Short-Circuit Protection and 8
A Standby Current
1155 TA12
1/2
LTC1155
GND
G1
DS1
V
S
IN1
4.75V TO 5.25V
0.02
100
F
MTM25N05L
*COILTRONICS CTX-7-52
0.33
F
FROM
P, ETC.
100k
2200
F
5
4
2
3
1
LT1170
FAULT
1
F
1k
50
H*
10.7k
1%
1.24k
1%
68
F
1N5820
5V SWITCHED
12V/1A
1N4148
+
+
+
1155 TA13
LTC1155
GND
IN2
G2
DS2
V
S
DS1
G1
IN1
IRFZ44*
18V
1N4746A
1N4148
**
9V/3A
DC
IRFZ44*
18V
1N4746A
1N4148
**
1N4148
1N4148
7
6
4
3
2
100k
10
F
10k
0.03
1N4001
10k
10
12.6VCT
110V AC
100k
4700
F
16V
D
S
D
S
MOSFETs ARE SYNCHRONOUSLY ENHANCED WHEN RECTIFIER CURRENT EXCEEDS 300mA
*NO HEATSINK REQUIRED. CASES (DRAINS) CAN BE TIED TOGETHER
**INTERNAL BODY DIODE OF MOSFET
+
LT1006
+
+
13
LTC1155
U
S
A
O
PPLICATI
TYPICAL
Push-Pull Driver with Shoot-Through Current Lockout (f
O
< 100Hz)
High Efficiency 60Hz Full-Wave Synchronous Rectifier
1155 TA14
LTC1155
GND
IN2
G2
DS1
V
S
DS2
G1
IN1
9V/3A
DC
4
IRFZ44*
18V
1N4746A
**
+
1N4148
1N4148
7
6
4
3
2
100k
10
10k
100k
6.3V AC
110V AC
4700
F
16V
D
S
MOSFETs ARE SYNCHRONOUSLY ENHANCED WHEN RECTIFIER CURRENT EXCEEDS 300mA
*NO HEATSINK REQUIRED
**INTERNAL BODY DIODE OF MOSFET
LT1006
10k
18V
1N4746A
D
S
D
S
**
**
0.03
+
D
S
**
1155 TA15
*OPPOSING GATE MUST DROP BELOW 2V BEFORE THE OTHER IS CHARGED
0.1
F
300k
0.01
LTC1155
GND
IN2
G2
DS2
V
S
DS1
G1
IN1
4.5V TO 6V
1N4148
100k
5V
HI/LO
74HC02
10
F
IRLZ24
*
V
OUT
1N4148
100k
IRFZ24
*
14
LTC1155
U
S
A
O
PPLICATI
TYPICAL
DC Motor Speed and Torque Control for Cordless Tools and Appliances
Full H-Bridge Driver with Shoot-Through Current Lockout and Stall Current Shutdown (f
O
< 100Hz)
1155 TA16
*OPPOSING GATES ARE HELD OFF UNTIL OTHER GATES DROP BELOW 1.5V
0.1
F
100k
0.01
LTC1155
GND
IN2
G2
DS2
V
S
DS1
G1
IN1
4.5V TO 6V
5V
74HC02
10
F
IRLZ44
*
*
DIRECTION
VN2222L
IRFZ44
M
IRLZ44
IRFZ44
VN2222L
DISABLE
1155 TA17
SPEED IS PROPORTIONAL TO PULSE WIDTH. TORQUE IS PROPORTIONAL TO CURRENT
0.1
F
300k
10k
TORQUE
ADJUST
LTC1155
GND
IN2
G2
DS2
V
S
DS1
G1
IN1
1.1k
0.1
IRFZ24
SMALL DC APPLIANCE
OR TOOL MOTOR
1A TO
10A
MAX
1M
+
1/2
LT1017
100k
120k
10k
SPEED
ADJUST
+
1/2
LT1017
1M
1M
0.0033
F
1M
100
47
F
16V
+
6V
100k
M
+
15
LTC1155
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
U
PACKAGE DESCRIPTIO
Dimensions in inches (milimeters) unless otherwise noted.
1
2
3
4
0.150 0.157**
(3.810 3.988)
8
7
6
5
0.189 0.197*
(4.801 5.004)
0.228 0.244
(5.791 6.197)
0.016 0.050
0.406 1.270
0.010 0.020
(0.254 0.508)
45
0
8
TYP
0.008 0.010
(0.203 0.254)
SO8 0996
0.053 0.069
(1.346 1.752)
0.014 0.019
(0.355 0.483)
0.004 0.010
(0.101 0.254)
0.050
(1.270)
TYP
DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
*
**
S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
J8 Package
8-Lead CERDIP (Narrow 0.300, Hermetic)
(LTC DWG # 05-08-1110)
J8 1197
0.045 0.068
(1.143 1.727)
FULL LEAD
OPTION
0.023 0.045
(0.584 1.143)
HALF LEAD
OPTION
CORNER LEADS OPTION
(4 PLCS)
0.300 BSC
(0.762 BSC)
0.008 0.018
(0.203 0.457)
0
15
0.005
(0.127)
MIN
0.405
(10.287)
MAX
0.220 0.310
(5.588 7.874)
1
2
3
4
8
7
6
5
0.025
(0.635)
RAD TYP
0.014 0.026
(0.360 0.660)
0.200
(5.080)
MAX
0.015 0.060
(0.381 1.524)
0.125
3.175
MIN
0.100
0.010
(2.540
0.254)
0.045 0.068
(1.143 1.727)
NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE
OR TIN PLATE LEADS
N8 1197
0.100
0.010
(2.540
0.254)
0.065
(1.651)
TYP
0.045 0.065
(1.143 1.651)
0.130
0.005
(3.302
0.127)
0.020
(0.508)
MIN
0.018
0.003
(0.457
0.076)
0.125
(3.175)
MIN
0.009 0.015
(0.229 0.381)
0.300 0.325
(7.620 8.255)
0.325
+0.035
0.015
+0.889
0.381
8.255
(
)
1
2
3
4
8
7
6
5
0.255
0.015*
(6.477
0.381)
0.400*
(10.160)
MAX
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
N8 Package
8-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1510)
16
LTC1155
LINEAR TECHNOLOGY CORPORATION 1991
U
S
A
O
PPLICATI
TYPICAL
Isolated High Voltage High Side Switch with Circuit Breaker
1155fa LT/TP 0399 2K REV A PRINTED IN USA
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
q
FAX: (408) 434-0507
q
www.linear-tech.com
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DESCRIPTION
COMMENTS
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Auto-Reset Electronic Circuit Breaker
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Quad Protected High Side MOSFET Driver
8V to 48V Supply Range, Individual Short-Circuit Protection
LTC1163
Triple 1.8V to 6V High Side MOSFET Driver
0.01
A Standby Current, Triple Driver in SO-8 Package
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Operates from 9V to 24V, Short-Circuit Protection
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Low R
DS(ON)
0.07
Switch, 2A Short-Circuit Protected
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2-Wire SMBus Serial Interface, Built-In Gate Charge Pumps
LTC1710
SMBus Dual Monolithic High Side Switch
Two Low R
DS(ON)
0.4
/300mA Switches in 8-Lead MSOP Package
1155 TA18
LTC1155
GND
IN2
G2
DS2
V
S
DS1
G1
IN1
0.1
1k
6A MAX
1k
90V
18V
1N4746A
4N28
1M
1k
C
B
E
10mA
CONTROL
0.1
F
200V
100pF
1/6 74C14
6V TO 12V
100k
10
F
25V
1N4148
1N5817
1N4148
MUR420
M
1N5817
+
2N2222
1155 TA19
LTC1155
GND
IN2
G2
DS2
V
S
DS1
G1
IN1
0.05
IRFZ24
18V
1N4746A
100k
0.0022
F
1/6 74C14
5V
100k
1N4148
1N5817
18V
1N4746A
0.01
F
100k
5.6V
1N4690A
IN/OUT
IN/OUT
24V AC
2A MAX
IRFZ24
100k
ON/OFF
1/6 74C14
300
600
0.1
F
1
F
*PICO ELECTRONICS F-28115 OR EQUIVALENT
T1*
IN/OUT
ON/OFF
IN/OUT
2A
EQUIVALENT FUNCTION
+
Isolated Solid-State AC Relay with Circuit Breaker
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