LTC1530

High Power Synchronous

Switching Regulator Controller

The LTC

1530 is a high power synchronous switching

regulator controller optimized for 5V to 1.3V-3.5V output
applications. Its synchronous switching architecture drives
two external N-channel MOSFET devices to provide high
efficiency. The LTC1530 contains a precision trimmed
reference and feedback system that provides worst-case
output voltage regulation of

2% over temperature, load

current and line voltage shifts. Current limit circuitry
senses the output current through the on-resistance of
the topside N-channel MOSFET, providing an adjustable
current limit without requiring an external low value sense
resistor.

The LTC1530 includes a fixed frequency PWM oscillator
that free runs at 300kHz, providing greater than 90%
efficiency in converter designs from 1A to 20A of output
current. Shutdown mode drops the LTC1530 supply cur-
rent to 45

The LTC1530 is specified for commercial and industrial
temperature ranges and is available in the S0-8 package.

Figure 1. Single 5V to 3.3V Supply

LOAD CURRENT (A)

0
0.3

EFFICIENCY (%)

100

1530 F01b

= 25

Efficiency vs Load Current

High Power Buck Converter from 5V or 3.3V
Main Power

Adjustable Current Limit in S0-8 with
Topside FET R

DS(ON)

Sensing

No External Sense Resistor Required

Hiccup Mode Current Limit Protection

Adjustable, Fixed 1.9V, 2.5V, 2.8V and 3.3V Output

All N-Channel MOSFET Synchronous Driver

Excellent Output Regulation:

2% over Line, Load

and Temperature Variations

High Efficiency: Over 95% Possible

Fast Transient Response

Fixed 300kHz Frequency Operation

Internal Soft-Start Circuit

Quiescent Current: 1mA, 45

A in Shutdown

Power Supply for Pentium

II, AMD-K6

-2, SPARC,

ALPHA and PA-RISC Microprocessors

High Power 5V to 1.3V-3.5V Regulators

2.7k

0.1

330

1200

MBR0530T1 MBR0530T1

GND

LTC1530-3.3

COMP

MAX

OUT

3.3V
14A

1530 F01a

* SILICONIX SUD50N03-10

** SANYO 10MV1200GX

COILTRONICS (561) 241-7876

10k

0.022

0.22

Q1*

Q2*

C1
150pF

COILTRONICS CTX02-13198
OR PANASONIC ETQP6F2R5HA

AVX TPSE337M006R0100

, LTC and LT are registered trademarks of Linear Technology Corporation.

Pentium is a registered trademark of Intel Corp.
AMD-K6 is a registered trademark of Advanced Micro Devices, Inc.

DESCRIPTIO

FEATURES

APPLICATIO S

TYPICAL APPLICATIO

LTC1530

ORDER PART

NUMBER

LTC1530CS8
LTC1530CS8-1.9
LTC1530CS8-2.5
LTC1530CS8-2.8
LTC1530CS8-3.3
LTC1530IS8
LTC1530IS8-1.9
LTC1530IS8-2.5
LTC1530IS8-2.8
LTC1530IS8-3.3

S8 PART MARKING

JMAX

= 125

= 130

C/ W

OUT

FOR FIXED VOLTAGE VERSIONS

TOP VIEW

MAX

GND

S8 PACKAGE

8-LEAD PLASTIC SO

SENSE

OUT

COMP

1530
153019
153025

530I28
530I33

1530I
530I19
530I25

(Note 1)

Supply Voltage
PV

........................................................................ 14V

Input Voltage
I

(Note 2) ............................................... PV

+ 0.3V

MAX

........................................................ 0.3V to 14V

Input Current (Notes 2,3) ............................ 100mA

Operating Ambient Temperature Range

LTC1530C ............................................... 0

C to 70

LTC1530I ............................................ 40

C to 85

Maximum Junction Temperature

LTC1530C, LTC1530I ...................................... 125

Storage Temperature Range ................. 65

C to 150

Lead Temperature (Soldering, 10 sec).................. 300

Consult factory for Military grade parts.

153028
153033

The

denotes specifications that apply over the full operating temperature

range, otherwise specifications are at 0

C. PV

= 12V unless otherwise noted. (Note 3)

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

SENSE

Internal Feedback Voltage

LTC1530CS8 (Note 4)

1.223

1.235

1.247

1.216

1.235

1.254

OUT

Output Voltage

LTC1530CS8-1.9 (Note 4)

1.881

1.9

1.919

1.871

1.9

1.929

LTC1530CS8-2.5 (Note 4)

2.475

2.5

2.525

2.462

2.5

2.538

LTC1530CS8-2.8 (Note 4)

2.772

2.8

2.828

2.758

2.8

2.842

LTC1530CS8-3.3 (Note 4)

3.267

3.3

3.333

3.250

3.3

3.350

mERR

Error Amplifier Transconductance

(Note 5)

1.6

2.6

millimho

The

denotes specifications that apply over the full operating temperature range, otherwise specifications are at 40

= 12V unless otherwise noted. (Note 3)

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Supply Voltage

(Note 6)

13.2

UVLO

Undervoltage Lockout Voltage

(Note 7)

3.5

3.75

SENSE

Internal Feedback Voltage

LTC1530IS8 (Note 4)

1.223

1.235

1.247

1.210

1.235

1.260

PACKAGE/ORDER I FOR ATIO

ABSOLUTE AXI U RATI GS

ELECTRICAL CHARACTERISTICS

LTC1530

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

OUT

Output Voltage

LTC1530IS8-1.9 (Note 4)

1.881

1.9

1.919

1.862

1.9

1.938

LTC1530IS8-2.5 (Note 4)

2.475

2.5

2.525

2.450

2.5

2.550

LTC1530IS8-2.8 (Note 4)

2.772

2.8

2.828

2.744

2.8

2.856

LTC1530IS8-3.3 (Note 4)

3.267

3.3

3.333

3.234

3.3

3.366

OUT

Output Load Regulation

OUT

= 0 to 14A

Output Line Regulation

= 4.75V to 5.25V, I

OUT

= 0

PVCC

Operating Supply Current

Figure 3, V

= 0V (Note 8)

Quiescent Current

Figure 3, COMP = 0.5V, V

= 5V

1.0

1.4

Shutdown Supply Current

Figure 3, COMP = 0 (Note 9)

OSC

Internal Oscillator Frequency

Figure 4

250

300

350

kHz

Oscillator Valley Voltage

COMP

at 0% Duty Cycle

2.5

Oscillator Peak Voltage

COMP

at Max Duty Cycle

3.5

ERR

Error Amplifier Open-Loop DC Gain

(Note 5)

mERR

Error Amplifier Transconductance

(Note 5)

1.6

2.8

millimho

MAX

Sink Current

IMAX

= 5V

170

200

230

IMAX

= 5V

120

200

300

MAX

Sink Current Tempco

IMAX

= 5V

3300

ppm/

SHDN

Shutdown Threshold Voltage

Figure 4, Measured at COMP Pin (Note 9)

100

180

Internal Soft-Start Slew Rate

Figure 4, COMP Pulls High, V

= 0V

0.4

V/ms

(Notes 9, 10)

Internal Soft-Start Wake-Up Time

Figure 4, COMP Pulls High to G1

(Note 10)

3.5

, t

Driver Rise and Fall Time

Figure 4

140

NOL

Driver Nonoverlap Time

Figure 4

100

MAX

Maximum G1 Duty Cycle

Figure 4

Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.

Note 2: If I

is taken below GND, it is clamped by an internal diode. This

pin handles input currents

100mA below GND without latch-up. In the

positive direction, it is not clamped to PV

Note 3: All currents into device pins are positive; all currents out of device
pins are negative. All voltages are referenced to ground unless otherwise
specified.

Note 4: The LTC1530 is tested in an op amp feedback loop which
regulates V

SENSE

or V

OUT

based on V

COMP

= 2V for the error amplifier.

Note 5: The Open-loop DC gain and transconductance from the V

pin to

the COMP pin are G

ERR

and g

mERR

respectively. For fixed output voltage

versions, the actual open-loop DC gain and transconductance are G

ERR

and g

mERR

multiplied by the ratio 1.235/V

OUT

Note 6: The total voltage from the PV

pin to the GND pin must be

for the current limit protection circuit to be active.

Note 7: G1 and G2 begin to switch once PV

the undervoltage

lockout threshold voltage.

Note 8: Supply current in normal operation is dominated by the current
needed to charge and discharge the external FET gates. This current varies
with the LTC1530 operating frequency, supply voltage and the external
FETs used.

Note 9: The LTC1530 enters shutdown if COMP is pulled low.

Note 10: Slew rate is measured at the COMP pin on the transition from
shutdown to active mode.

The

denotes specifications that apply over the full operating temperature

range, otherwise specifications are at 40

C. PV

= 12V unless otherwise noted. (Note 3)

ELECTRICAL CHARACTERISTICS

LTC1530

OUTPUT CURRENT (A)

2.510

2.508

2.506

2.504

2.502

2.500

2.498

2.496

2.494

2.492

2.490

OUTPUT VOLTAGE (V)

1530 G02

= 25

REFER TO FIGURE 2

Efficiency vs Load Current

Load Regulation

LOAD CURRENT (A)

0
0.3

EFFICIENCY (%)

100

1530 G01

= 25

REFER TO FIGURE 10

TYPICAL PERFOR A CE CHARACTERISTICS

LTC1530 V

SENSE

vs Temperature

TEMPERATURE (

SENSE

(V)

1.260

1.255

1.250

1.245

1.240

1.235

1.230

1.225

1.220

1.215

1.210

125

1530 G03

85 105

LTC1530-1.9 V

OUT

vs Temperature

LTC1530-2.5 V

OUT

vs Temperature

TEMPERATURE (

OUT

(V)

1.930

1.925

1.920

1.915

1.910

1.905

1.900

1.895

1.890

1.885

1.880

1.875

1.870

1530 G04

35 15

85 105 125

TEMPERATURE (

OUT

(V)

2.55

2.54

2.53

2.52

2.51

2.50

2.49

2.48

2.47

2.46

2.45

125

1530 G05

85 105

Undervoltage Lockout Threshold
Voltage vs Temperature

LTC1530-2.8 V

OUT

vs Temperature

TEMPERATURE (

OUT

(V)

2.85

2.84

2.83

2.82

2.81

2.80

2.79

2.78

2.77

2.76

2.75

2.74

1530 G06

35 15

85 105 125

LTC1530-3.3 V

OUT

vs Temperature

TEMPERATURE (

OUT

(V)

3.36

3.35

3.34

3.33

3.32

3.31

3.30

3.29

3.28

3.27

3.26

3.25

3.24

3.23

1530 G06

35 15

85 105 125

Error Amplifier Transconductance
vs Temperature

TEMPERATURE (

UNDERVOLTAGE LOCKOUT THRESHOLD (V)

4.5

4.3

4.1

3.9

3.7

3.5

3.3

3.1

2.9

2.7

2.5

2.3

125

1530 G08

85 105

TEMPERATURE (

ERROR AMPLIFIER TRANSCONDUCTANCE (millimho)

2.8

2.6

2.4

2.2

2.0

1.8

1.6

125

1530 G09

85 105

LTC1530

Shutdown Supply Current

vs Temperature

Supply Current

vs Gate Capacitance

Shutdown Threshold Voltage
vs Temperature

Output Overcurrent Protection

Transient Response

s/DIV

1530 G18

2A/DIV

50mV/DIV

Error Amplifier Open-Loop Gain
vs Temperature

Oscillator Frequency
vs Temperature

Maximum G1 Duty Cycle
vs Ambient Temperature

MAX

Sink Current vs Temperature

TEMPERATURE (

ERROR AMPLIFIER OPEN-LOOP DC GAIN (dB)

125

1530 G10

85 105

TEMPERATURE (

OSCILLATOR FREQUENCY (kHz)

350

340

330

320

310

300

290

280

270

260

250

125

1530 G11

85 105

AMBIENT TEMPERATURE (

MAXIMUM G1 DUTY CYCLE (%)

125

1530 G12

85 105

THERMAL SHUTDOWN OCCURS

BEYOND THESE POINTS

G1, G2

CAPACITANCE

= 1000pF

= 12V

OSC

= 300kHz

7700pF

5500pF

3300pF

2200pF

TEMPERATURE (

MAX

SINK CURRENT (

300

280

260

240

220

200

180

160

140

120

125

1530 G13

85 105

= 12V

G1, G2 ARE NOT SWITCHING

GATE CAPACITANCE (nF)

SUPPLY CURRENT (mA)

1530 G14

= 12V

= 25

GATE CAPACITANCE = C

= C

TEMPERATURE (

125

1530 G15

85 105

= 12V

SHUTDOWN CURRENT (

OUTPUT CURRENT (A)

OUTPUT VOLTAGE (V)

3.0

2.5

2.0

1.5

1.0

0.5

1530 G17

SHORT-CIRCUIT

CURRENT

= 12V

= 25

REFER TO
FIGURE 2

TEMPERATURE (

SHUTDOWN THRESHOLD VOLTAGE (mV)

250

200

150

100

125

1530 G16

85 105

= 12V

MEASURED AT
COMP PIN

TYPICAL PERFOR A CE CHARACTERISTICS

LTC1530

COMP to compensate the feedback loop for optimum
transient response. To shut down the LTC1530, pull this
pin below 0.1V with an open-collector or open-drain
transistor. Supply current is typically reduced to 45

A in

shutdown. An internal 4

A pullup ensures start-up.

MAX

(Pin 5): Current Limit Threshold. Current limit is set

by the voltage drop across an external resistor connected
between the drain of Q1 and I

MAX

. This voltage is com-

pared with the voltage across the R

DS(ON)

of the high side

MOSFET. The LTC1530 contains a 200

A internal pull-

down at I

MAX

to set current limit. This 200

A current

source has a positive temperature coefficient to provide
first order correction for the temperature coefficient of the
external N-channel MOSFET's R

DS(ON)

(Pin 6): Current Limit Sense Pin. Connect I

to the

switching node between Q1's source and Q2's drain. If I

drops below I

MAX

with G1 on, the LTC1530 enters current

limit. Under this condition, the internal soft-start capacitor
is discharged and COMP is pulled low slowly. Duty cycle
is reduced and output power is limited. The current limit
circuitry is only activated if PV

8V. This action eases

start-up considerations as PV

is ramping up because

the MOSFET's R

DS(ON)

can be significantly higher than

what is measured under normal operating conditions. The
current limit circuit is disabled by floating I

MAX

and short-

ing I

to PV

G2 (Pin 7): Gate Drive for the Low Side N-Channel MOSFET,
Q2. This output swings from PV

to GND. It is always low

if G1 is high or if the output is disabled. To prevent
undershoot during a soft-start cycle, G2 is held low until
G1 first transitions high.

G1 (Pin 8): Gate Drive for the Topside N-Channel MOSFET,
Q1. This output swings from PV

to GND. It is always low

if G2 is high or if the output is disabled.

(Pin 1): Power Supply for G1, G2 and Logic. PV

must connect to a potential of at least V

+ V

GS(ON)Q1

. If

= 5V, generate PV

using a simple charge pump

connected to the switching node between Q1 and Q2 (see
Figure 1) or connect PV

to a 12V supply. Bypass PV

properly or erratic operation will result. A low ESR 10

capacitor or larger bypass capacitor along with a 0.1

surface mount ceramic capacitor in parallel is recom-
mended from PV

directly to GND to minimize switching

ripple. Switching ripple should be

100mV at the PV

pin.

GND (Pin 2): Power and Logic Ground. GND is connected
to the internal gate drive circuitry and the feedback cir-
cuitry. To obtain good output voltage regulation, use
proper ground techniques between the LTC1530 GND and
bottom-side FET source and the negative terminal of the
output capacitor. See the Applications Information section
for more details on PCB layout techniques.

SENSE

OUT

(Pin 3): Feedback Voltage Pin. For the adjust-

able LTC1530, use an external resistor divider to set the
required output voltage. Connect the tap point of the
resistor divider network to V

SENSE

and the top of the

divider network to the output voltage. For fixed output
voltage versions of the LTC1530, the resistor divider is
internal and the top of the resistor divider network is
brought out to V

OUT

. In general, the resistor divider

network for each fixed output voltage version sinks ap-
proximately 30

A. Connect V

OUT

to the output voltage

either at the output capacitors or at the actual point of load.
V

SENSE

OUT

is sensitive to switching noise injected into

the pin. Isolate high current switching traces from this pin
and its PCB trace.

COMP (Pin 4): External Compensation. The COMP pin is
connected to the error amplifier output and the input of the
PWM comparator. An RC + C network is typically used at

PI FU CTIO S

LTC1530

Figure 2

Figure 3

12V

Q1
Si4410DY

2.4

*SUMIDA CDRH127-2R4
**AVX TPSE337M006R0100
***SANYO 10MV1200GX

Q2
Si4410DY

8.2k

750

100

0.01

0.1

330

***

1200

OUT

2.5V
6A

1530 F02

100pF

MAX

GND

OUT

COMP

LTC1530-2.5

0.1

1530 F03

MAX

12V

GND

SENSE

OUT

COMP

LTC1530

COMP

DISDR

INTERNAL

OSCILLATOR

LOGIC AND

THERMAL SHUTDOWN

POWER DOWN

REF

+ 3%

ERR

MIN

= 2millimho

PWM

MAX

SENSE

FOR FIXED
VOLTAGE
VERSIONS

OUT

REF

+ 3%

REF

1530 BD

LVC

MAX

HCL

MONO

MHCL

FIXED V

OUT

1.9V
2.5V
2.8V
3.3V

23.4k
44.4k
54.9k
68.4k

43.2k
43.2k
43.2k
40.8k

BLOCK DIAGRA

TEST CIRCUITS

LTC1530

G1 RISE/FALL

3300pF

0.1

1530 F04a

12V

GND

G2 RISE/FALL

OUT

COMP

LTC1530

3300pF

90%

NOL

50%

COMP

1530 F04b

10%

Figure 4

OVERVIEW

The LTC1530 is a voltage feedback, synchronous switch-
ing regulator controller (see Block Diagram) designed for
use in high power, low voltage step-down (buck) convert-
ers. It includes an on-chip soft-start capacitor, a PWM
generator, a precision reference trimmed to

1%, two high

power MOSFET gate drivers and all the necessary feed-
back and control circuitry to form a complete switching
regulator circuit running at 300kHz.

The LTC1530 includes a current limit sensing circuit that
uses the topside external N-channel power MOSFET as a
current sensing element, eliminating the need for an
external sense resistor. If the current comparator, CC,
detects an overcurrent condition, the duty cycle is reduced
by discharging the internal soft-start capacitor through a
voltage-controlled current source. Under severe over-
loads or output short-circuit conditions, the soft-start
capacitor is pulled to ground and a start-up cycle is
initiated. If the short circuit or overload persists, the chip
repeats soft-start cycles and prevents damage to external
components.

THEORY OF OPERATION

Primary Feedback Loop

The LTC1530 compares the output voltage with the inter-
nal reference at the error amplifier inputs. The error
amplifier outputs an error signal to the PWM comparator.
This signal is compared to the fixed frequency oscillator

sawtooth waveform to generate the PWM signal. The
PWM signal drives the external MOSFETs at the G1 and G2
pins. The resulting chopped waveform is filtered by L

and

OUT

which closes the loop. Loop frequency compensa-

tion is typically accomplished with an external RC + C
network at the COMP pin, which is the output node of the
transconductance error amplifier.

MIN, MAX Feedback Loops

Two additional comparators in the feedback loop provide
high speed fault correction in situations where the error
amplifier cannot respond quickly enough. MIN compares
the feedback signal to a voltage 3% below the internal
reference. If the signal is below the comparator threshold,
the MIN comparator overrides the error amplifier and
forces the loop to maximum duty cycle, typically 86%.
Similarly, the MAX comparator forces the output to 0%
duty cycle if the feedback signal is greater than 3% above
the internal reference. To prevent these two comparators
from triggering due to noise, the MIN and MAX compara-
tors' response times are deliberately delayed by two to
three microseconds. These comparators help prevent
extreme output perturbations with fast output load current
transients, while allowing the main feedback loop to be
optimally compensated for stability.

Thermal Shutdown

The LTC1530 has a thermal protection circuit that disables
both internal gate drivers if activated. G1 and G2 are held
low and the LTC1530 supply current drops to about 1mA.

TEST CIRCUITS

APPLICATIO S I FOR ATIO

LTC1530

Typically, thermal shutdown is activated if the LTC1530's
junction temperature exceeds 150

C. G1 and G2 resume

switching when the junction temperature drops below
100

Soft-Start and Current Limit

Unlike other PWM parts, the LTC1530 includes an on-chip
soft-start capacitor that is used during start-up and cur-
rent limit operation. On power-up, an internal 4

A pull-up

at COMP brings the LTC1530 out of shutdown mode. An
internal current source then charges the internal C

capacitor. The COMP pin is clamped to one V

above the

voltage on C

during start-up. This prevents the error

amplifier from forcing the loop to maximum duty cycle.
The LTC1530 operates at low duty cycle as the COMP pin
voltage increases above about 2.4V. The slew rate of the
soft-start capacitor is typically 0.4V/ms. As the voltage on
C

continues to increase, M

eventually turns off and the

error amplifier regulates the output. The MIN comparator
is disabled if soft-start is active to prevent an override of
the soft-start function.

The LTC1530 includes another feedback loop to control
operation in current limit. Before each falling edge of G1,
the current comparator, CC, samples and holds the volt-
age drop across external MOSFET Q1 with the LTC1530's
I

pin. CC compares the voltage at I

to the voltage at the

MAX

pin. As peak current rises, the voltage across the

DS(ON)

of Q1 increases. If the voltage at I

drops below

MAX

, indicating that Q1's drain current has exceeded the

maximum desired level, CC pulls current out of C

. Duty

cycle decreases and the output current is controlled. The
CC comparator pulls current out of C

in proportion to the

voltage difference between I

and I

MAX

. Under minor

overload conditions, the voltage at C

falls gradually,

creating a time delay before current limit activates. Very
short, mild overloads may not affect the output voltage at
all. Significant overload conditions allow the voltage on
C

to reach a steady state and the output remains at a

reduced voltage until the overload is removed. Serious
overloads generate a large overdrive and allow CC to pull
the C

voltage down quickly, thus preventing damage to

the external components.

By using the R

DS(ON)

of Q1 to measure output current, the

current limit circuit eliminates the sense resistor that
would otherwise be required. This minimizes the number
of components in the high current power path. The current
limit circuitry is not designed to be highly accurate. It is
primarily meant to prevent damage to the power supply
circuitry during fault conditions. The exact current level
where current limiting takes effect will vary from unit to
unit as the R

DS(ON)

of Q1 varies.

Figure 5a illustrates the basic connections for the current
limit circuitry. For a given current limit level, the external
resistor from I

MAX

to V

is determined by:

LTC1530

OUT

1530 F05

MAX

IMAX

200

Maximum load current

Inductor ripple current

oscillator frequency = 300kHz

value

n-r

tance of Q1 at I

200 A sink current

RIPPLE

OSC

DS(ON)Q1

LMAX

where

LTC

Inductor

esis

IMAX

LMAX

DS ON Q

IMAX

LMAX

LOAD

RIPPLE

LOAD

OUT

OSC

IMAX

( )

(

)( )

( )( )( )

( )

1530

Figure 5a. Current Limit Setting (Use Kelvin-Sense
Connections Directly at the Drain and Source of Q1)

APPLICATIO S I FOR ATIO

LTC1530

Figure 5b is derived based on the condition that
I

LMAX

= I

LOAD

+ I

RIPPLE

/2. Therefore, it only provides the

minimum R

IMAX

value. It must be understood that during

the initial power-up phase (V

OUT

= 0V), the initial start-up

LMAX

can be much higher than the steady state condition

LMAX

. Therefore, R

IMAX

must be selected with the start-up

LMAX

in mind. In general, high output capacitance com-

bined with a low value inductor increases the start-up
I

LMAX

. Figures 6a and 6b plot the start-up I

LMAX

vs output

capacitance and inductance for unloaded and loaded con-
ditions with the current limit circuit disabled. Figures 6a
and 6b are provided as examples. Actual I

LMAX

under

start-up conditions must be measured for any application
circuit so that R

IMAX

can be properly chosen.

In order for the current limit circuit to operate properly and
to obtain a reasonably accurate current limit threshold, the
I

MAX

and I

pins must be Kelvin sensed at Q1's drain and

source pins. A 0.1

F decoupling capacitor can also be

connected across R

IMAX

to filter switching noise. In addi-

tion, LTC recommends that the voltage drop across the
R

IMAX

resistor be set to

100mV. Otherwise, noise spikes

or ringing at Q1's source can cause the actual current limit
to be greater than the desired current limit set point.

MOSFET Gate Drive

The PV

supply must be greater than the input supply

voltage, V

, by at least one power MOSFET V

GS(ON)

for

efficient operation. This higher voltage can be supplied
with a separate supply, or it can be generated using a
simple charge pump as shown in Figure 7. The 86%
maximum duty cycle ensures sufficient off-time to refresh
the charge pump during each cycle.

As PV

is powered up from 0V, the LTC1530 undervoltage

lockout circuit prevents G1 and G2 from pulling high until
PV

reaches about 3.5V. To prevent Q1's high R

DS(ON)

from triggering the current limit comparator while PV

slewing, the current limit circuit is disabled until PV

8V. In addition, on start-up or recovery from thermal

shutdown, the driver logic is designed to hold G2 low until
G1 first goes high.

LMAX

(A)

MINIMUM REQUIRED R

IMAX

(

)

5500

4500

3500

2500

1500

500

16 18

1530 F05b

IMAX

500

LMAX

= I

LOAD

+ I

RIPPLE

Q1 R

DS(ON)

= 0.05

0.04

0.03

0.02

0.01

Figure 5b. Minimum Required R

IMAX

vs I

LMAX

OUTPUT CAPACITANCE (mF)

START-UP I

LMAX

(A)

1530 F06a

= 25

= 5V

LOAD

= 0A

L = 1.2

L = 4.7

L = 2.4

Figure 6a. Start-Up I

LMAX

vs Output Capacitance

OUTPUT CAPACITANCE (mF)

START-UP I

LMAX

(A)

1530 F06b

= 25

= 5V

LOAD

= 10A

L = 1.2

L = 4.7

L = 2.4

Figure 6b. Start-Up I

LMAX

vs Output Capacitance

APPLICATIO S I FOR ATIO

LTC1530

MOSFET whose R

DS(ON)

is rated at V

= 4.5V does not

necessarily have a logic level MOSFET GATE threshold
voltage. Logic level FETs are the recommended choice for
5V-only systems. Logic level FETs can be fully enhanced
with a doubler charge pump and will operate at maximum
efficiency. Note that doubler charge pump designs run-
ning from supplies higher than 6.5V should include a
Zener diode clamp at PV

to prevent transients from

exceeding the absolute maximum rating of the pin.

After the MOSFET threshold voltage is selected, choose
the R

DS(ON)

based on the input voltage, the output voltage,

allowable power dissipation and maximum output cur-
rent. In a typical LTC1530 buck converter circuit, operat-
ing in continuous mode, the average inductor current is
equal to the output load current. This current flows through
either Q1 or Q2 with the power dissipation split up accord-
ing to the duty cycle:

DC Q

OUT

( )

= -

(

)

The R

DS(ON)

required for a given conduction loss can now

be calculated by rearranging the relation P = I

DC Q

DS ON Q

MAX Q

MAX

MAX Q

OUT

MAX

DS ON Q

MAX Q

MAX

MAX Q

OUT

MAX

(

)

(

)

(

)

(

)

(

)

(

)

( )

(

)

[

]

( )

[

]

( )

[

]

( )

[

]

(

)

0.22

MBR0530T1 MBR0530T1

OPTIONAL FOR

> 6.5V

LTC1530

OUT

1530 F07

13V

1N5243B

Power MOSFETs

Two N-channel power MOSFETs are required for synchro-
nous LTC1530 circuits. They should be selected based
primarily on threshold voltage and on-resistance consid-
erations. Thermal dissipation is often a secondary con-
cern in high efficiency designs. The required MOSFET
threshold should be determined based on the available
power supply voltages and/or the complexity of the gate
drive charge pump scheme. In 5V input designs where a
12V supply is used to power PV

, standard MOSFETs

with R

DS(ON)

specified at V

= 5V or 6V can be used with

good results. The current drawn from the 12V supply
varies with the MOSFETs used and the LTC1530's operat-
ing frequency, but is generally less than 50mA.

LTC1530 applications that use a 5V V

voltage and a

doubling charge pump to generate PV

do not provide

enough gate drive voltage to fully enhance standard
power MOSFETs. Under this condition, the effective
MOSFET R

DS(ON)

may be quite high, raising the dissipa-

tion in the FETs and reducing efficiency. In addition,
power supply start-up problems can occur with standard
power MOSFETs. These start-up problems can occur for
two reasons. First, if the MOSFET is not fully enhanced,
the higher effective R

DS(ON)

causes the LTC1530 to acti-

vate current limit at a much lower level than the desired
trip point. Second, standard MOSFETs have higher GATE
threshold voltages than logic level MOSFETs, thereby
increasing the PV

voltage required to turn them on. A

Figure 7. Doubling Charge Pump

APPLICATIO S I FOR ATIO

LTC1530

IRF7413 (both in SO-8) or Siliconix SUD50N03 or Motorola
MTD20N03HDL (both in DPAK) are small footprint sur-
face mount devices with R

DS(ON)

values below 0.03

at 5V

of V

that work well in LTC1530 circuits. With higher

output voltages, the R

DS(ON)

of Q1 may need to be signifi-

cantly lower than that for Q2. These conditions can often
be met by paralleling two MOSFETs for Q1 and using a
single device for Q2. Using a higher P

MAX

value in the

DS(ON)

calculations generally decreases the MOSFET

cost and the circuit efficiency and increases the MOSFET
heat sink requirements.

In most LTC1530 applications, R

DS(ON)

is used as the

current sensing element. MOSFET R

DS(ON)

has a positive

temperature coefficient. Therefore, the LTC1530 I

MAX

sink

current is designed with a positive 3300ppm/

C tempera-

ture coefficient. The positive tempco of I

MAX

provides first

order correction for current limit vs temperature. There-
fore, current limit does not have to be set to an increased
level at room temperature to guarantee a desired output
current at elevated temperatures.

Table 1 highlights a variety of power MOSFETs that are
suitable for use in LTC1530 applications.

MAX

should be calculated based primarily on required

efficiency or allowable thermal dissipation. A high effi-
ciency buck converter designed for the Pentium

II with 5V

input and a 2.8V, 11.2A output might allow no more than
4% efficiency loss at full load for each MOSFET. Assuming
roughly 90% efficiency at this current level, this gives a
P

MAX

value of:

(2.8)(11.2A/0.9)(0.04) = 1.39W per FET

and a required R

DS(ON)

of:

DS ON Q

( )

5 1 39

2 8

11 2

0 020

5 1 39

2 8

11 2

0 025

(

)

(

)

(

)

Note that while the required R

DS(ON)

values suggest large

MOSFETs, the power dissipation numbers are only 1.39W
per device or less -- large TO-220 packages and heat
sinks are not necessarily required in high efficiency appli-
cations. Siliconix Si4410DY or International Rectifier

RDS(ON)

TYPICAL INPUT

AT 25

RATED CURRENT

CAPACITANCE

JMAX

MANUFACTURER

PART NO.

PACKAGE

(

)

(A)

Ciss (pF)

(

C/W)

(

Siliconix

SUD50N03-10

TO-252

0.019

15A at 25

3200

1.8

175

10A at 100

Siliconix

Si4410DY

SO-8

0.020

10A at 25

2700

150

8A at 75

ON Semiconductor

MTD20N03HDL

DPAK

0.035

20A at 25

880

1.67

150

16A at 100

Fairchild

FDS6680

SO-8

0.01

11.5A at 25

2070

150

ON Semiconductor

MTB75N03HDL*

PAK

0.0075

75A at 25

4025

1.0

150

59A at 100

IRL3103S

PAK

0.014

56A at 25

1600

1.8

175

40A at 100

IRLZ44

TO-220

0.028

50A at 25

3300

1.0

175

36A at 100

Fuji

2SK1388

TO-220

0.037

35A at 25

1750

2.08

150

Note: Please refer to the manufacturer's data sheet for testing conditions and detailed information.
*Users must consider the power dissipation and thermal effects in the LTC1530 if driving external MOSFETs with high values of input capacitance.
Refer to the PV

Supply Current vs GATE Capacitance in the Typical Performance Characteristics section.

Table 1. Recommended MOSFETs for LTC1530 Applications

APPLICATIO S I FOR ATIO

LTC1530

Inductor Selection

The inductor is often the largest component in an LTC1530
design and must be chosen carefully. Choose the inductor
value and type based on output slew rate requirements
and expected peak current. The required output slew rate
primarily controls the inductor value. The maximum rate
of rise of inductor current is set by the inductor's value, the
input-to-output voltage differential and the LTC1530's
maximum duty cycle. In a typical 5V input, 2.8V output
application, the maximum rise time will be:

MAX

OUT

1 85

where L is the inductor value in

H. With proper frequency

compensation, the combination of the inductor and output
capacitor values determine the transient recovery time. In
general, a smaller value inductor improves transient
response at the expense of ripple and inductor core
saturation rating. A 2

H inductor has a 0.9A/

s rise time

in this application, resulting in a 5.5

s delay in responding

to a 5A load current step. During this 5.5

s, the difference

between the inductor current and the output current is
made up by the output capacitor. This action causes a
temporary voltage droop at the output. To minimize this
effect, the inductor value should usually be in the 1

H to

H range for most 5V input LTC1530 circuits. Different

combinations of input and output voltages and expected
loads may require different values.

Once the required inductor value is selected, choose the
inductor core type based on peak current and efficiency
requirements. Peak current in the inductor is equal to the
maximum output load current plus half of the peak-to-
peak inductor ripple current. Inductor ripple current is set
by the inductor's value, the input voltage, the output
voltage and the operating frequency. If the efficiency is
high, ripple current is approximately equal to:

RIPPLE

OUT

OSC

(

)( )

( )( )( )

where
f

OSC

= LTC1530 oscillator frequency

= Inductor value

Solving this equation for a typical 5V to 2.8V application
with a 2

H inductor, ripple current is:

2 2

0 56

300

kHz

( )( )

(

)( )

P-P

Peak inductor current at 11.2A load:

11 2

12 2

The ripple current should generally fall between 10% and
40% of the output current. The inductor must be able to
withstand this peak current without saturating, and the
copper resistance in the winding should be kept as low as
possible to minimize resistive power loss. Note that in
circuits not employing the current limit function, the
current in the inductor may rise above this maximum
under short circuit or fault conditions; the inductor should
be sized accordingly to withstand this additional current.
Inductors with gradual saturation characteristics (example:
powdered iron) are often the best choice.

Input and Output Capacitors

A typical LTC1530 design places significant demands on
both the input and the output capacitors. During normal
steady load operation, a buck converter like the LTC1530
draws square waves of current from the input supply at the
switching frequency. The peak current value is equal to the
output load current plus 1/2 the peak-to-peak ripple cur-
rent. Most of this current is supplied by the input bypass
capacitor. The resulting RMS current flow in the input
capacitor heats it and causes premature capacitor failure
in extreme cases. Maximum RMS current occurs with
50% PWM duty cycle, giving an RMS current value equal
to I

OUT

/2. A low ESR input capacitor with an adequate

ripple current rating must be used to ensure reliable
operation. Note that capacitor manufacturers' ripple cur-
rent ratings are often based on only 2000 hours (3 months)
lifetime at rated temperature. Further derating of the input
capacitor ripple current beyond the manufacturer's speci-
fication is recommended to extend the useful life of the
circuit. Lower operating temperature has the largest effect
on capacitor longevity.

APPLICATIO S I FOR ATIO

LTC1530

The output capacitor in a buck converter under steady
state conditions sees much less ripple current than the
input capacitor. Peak-to-peak current is equal to inductor
ripple current, usually 10% to 40% of the total load
current. Output capacitor duty places a premium not on
power dissipation but on ESR. During an output load
transient, the output capacitor must supply all of the
additional load current demanded by the load until the
LTC1530 adjusts the inductor current to the new value.
ESR in the output capacitor results in a step in the output
voltage equal to the ESR value multiplied by the change in
load current. An 11A load step with a 0.05

ESR output

capacitor results in a 550mV output voltage shift; this is
19.6% of the output voltage for a 2.8V supply! Because of
the strong relationship between output capacitor ESR and
output load transient response, choose the output capaci-
tor for ESR, not for capacitance value. A capacitor with
suitable ESR will usually have a larger capacitance value
than is needed to control steady-state output ripple.

Electrolytic capacitors rated for use in switching power
supplies with specified ripple current ratings and ESR can
be used effectively in LTC1530 applications. OS-CON
electrolytic capacitors from Sanyo and other manufactur-
ers give excellent performance and have a very high
performance/size ratio for electrolytic capacitors. Surface
mount applications can use either electrolytic or dry
tantalum capacitors. Tantalum capacitors must be surge
tested and specified for use in switching power supplies.
Low cost, generic tantalums are known to have very short
lives followed by explosive deaths in switching power
supply applications. AVX TPS series surface mount
devices are popular surge tested tantalum capacitors that
work well in LTC1530 applications.

A common way to lower ESR and raise ripple current
capability is to parallel several capacitors. A typical LTC1530
application might exhibit 5A input ripple current. Sanyo
OS-CON capacitors, part number 10SA220M (220

10V), feature 2.3A allowable ripple current at 85

C; three

in parallel at the input (to withstand the input ripple
current) meet the above requirements. Similarly, AVX
TPSE337M006R0100 (330

F/6V) capacitors have a rated

maximum ESR of 0.1

; seven in parallel lower the net

output capacitor ESR to 0.014

. For low cost applica-

tions, the Sanyo MV-GX capacitor series can be used with
acceptable performance.

Feedback Loop Compensation

The LTC1530 voltage feedback loop is compensated at the
COMP pin, which is the output node of the g

error

amplifier. The feedback loop is generally compensated
with an RC + C network from COMP to GND as shown in
Figure 8a.

Loop stability is affected by the values of the inductor, the
output capacitor, the output capacitor ESR, the error
amplifier transconductance and the error amplifier com-
pensation network. The inductor and the output capacitor
create a double pole at the frequency:

L C

OUT

( )

The ESR of the output capacitor and the output capacitor
value form a zero at the frequency:

ESR C

ESR

OUT

( )( )( )

The compensation network used with the error amplifier
must provide enough phase margin at the 0dB crossover
frequency for the overall open-loop transfer function. The
zero and pole from the compensation network are:

and f

( )( )( )

respectively. Figure 8b shows the Bode plot of the overall
transfer function.

The compensation values used in this design are based on
the following criteria, f

= 12f

, f

= f

, f

= 5f

. At the

closed-loop frequency f

, the attenuation due to the LC

filter and the input resistor divider is compensated by the
gain of the PWM modulator and the gain of the error
amplifier (g

mERR

)(R

APPLICATIO S I FOR ATIO

LTC1530

Although a mathematical approach to frequency compen-
sation can be used, the added complication of input and/
or output filters, unknown capacitor ESR, and gross
operating point changes with input voltage, load current
variations and frequency of operation all suggest a more
practical empirical method. This can be done by injecting
a transient current at the load and using an RC network box
to iterate toward the final compensation values or by
obtaining the optimum loop response using a network
analyzer to find the actual loop poles and zeros.

Table 2 shows the suggested compensation components
for 5V input applications based on the inductor and output
capacitor values. The values were calculated using mul-
tiple paralleled 330

F AVX TPS series surface mount

tantalum capacitors for the output capacitor. The opti-
mum component values might deviate from the suggested
values slightly because of board layout and operating
condition differences.

Table 2. Suggested Compensation Network for a 5V Input
Application Using Multiple Paralleled 330

F AVX TPS Output

Capacitors for 2.5V Output

(

)

(

C1 (pF)

990

1.3

0.022

1000

1980

2.7

0.022

470

4950

6.8

0.01

220

2.7

990

3.6

0.022

330

2.7

1980

7.5

0.01

220

2.7

4950

0.01

5.6

990

7.5

0.01

220

5.6

1980

0.01

100

5.6

4950

0.0047

An alternate output capacitor is the Sanyo MV-GX series.
Using multiple paralleled 1500

F Sanyo MV-GX capaci-

tors for the output capacitor, Table 3 shows the suggested
compensation components for 5V input applications based
on the inductor and output capacitor values.

Table 3. Suggested Compensation Network for a 5V Input
Application Using Multiple Paralleled 1500

F SANYO MV-GX

Output Capacitors for 2.5V Output

(

)

(

C1 (pF)

4500

0.022

470

6000

0.022

330

9000

0.022

220

2.7

4500

8.2

0.022

150

2.7

6000

0.01

100

2.7

9000

0.01

100

5.6

4500

0.01

100

5.6

6000

0.01

5.6

9000

0.01

Note: For different values of V

OUT

, multiply the R

value by V

OUT

/2.5 and

multiply the C

and C1 values by 2.5/V

OUT

. This maintains the same

crossover frequency for the closed-loop transfer function.

LTC1530

OUT

COMP

1530 F08a

ERR

Figure 8a. Compensation Pin Hook-Up

LOOP GAIN

FREQUENCY

1530 F08b

20dB/DECADE

= LTC1530 SWITCHING FREQUENCY

= CLOSED-LOOP CROSSOVER FREQUENCY

ESR

Figure 8b. Bode Plot of the LTC1530 Overall
Transfer Function

APPLICATIO S I FOR ATIO

LTC1530

Thermal Considerations

Limit the LTC1530's junction temperature to less than
125

C. The LTC1530's SO-8 package is rated at 130

C/W

and care must be taken to ensure that the worst-case input
voltage and gate drive load current requirements do not
cause excessive die temperatures. Short-circuit or fault
conditions may activate the internal thermal shutdown
circuit.

LAYOUT CONSIDERATIONS

When laying out the printed circuit board (PCB), the
following checklist should be used to ensure proper
operation of the LTC1530. These items are illustrated
graphically in the layout diagram of Figure 9. The thicker
lines show the high current power paths. Note that at 10A
current levels or above, current density in the PCB itself is
a serious concern. Traces carrying high current should be
as wide as possible. For example, a PCB fabricated with
2oz copper requires a minimum trace width of 0.15" to
carry 10A, and only if trace length is kept short.

1. In general, begin the layout with the location of the

power devices. Orient the power circuitry so that a clean
power flow path is achieved. Maximize conductor widths
but minimize conductor lengths. Keep high current
connections on one side of the PCB if possible. If not,
minimize the use of vias and keep the current density in
the vias to <1A/via, preferably < 0.5A/via. After achiev-
ing a satisfactory power path layout, proceed with the
control circuitry layout. It is much easier to find routes
for the relatively small traces in the control circuits than
it is to find circuitous routes for high current paths.

2. Tie the GND pin to the ground plane at a single point,

preferably at a fairly quiet point in the circuit, such as the
bottom of the output capacitors. However, this is not

always practical due to physical constraints. Connect
the low side source to the input capacitor ground.
Connect the input and output capacitor to the ground
plane. Run a separate trace for the low side FET source
to the input capacitors. Do not tie this single point
ground in the trace run between the low side FET source
and the input capacitor ground. This area of the ground
plane is very noisy.

3. Locate the small signal resistor and capacitors used for

frequency compensation close to the COMP pin. Use a
separate ground trace for these components that ties
directly to the GND pin of the LTC1530. Do not connect
these components to the ground plane!

4. Place the PV

decoupling capacitor as close to the

LTC1530 as possible. The 10

F bypass capacitor shown

at PV

helps provide optimum regulation performance

by minimizing ripple at the PV

pin.

5. Connect the (+) plate of C

as close as possible to the

drain of the upper MOSFET. LTC recommends an
additional 1

F low ESR ceramic capacitor between V

and power ground.

6. The V

SENSE

OUT

pin is very sensitive to pickup from the

switching node. Care must be taken to isolate this pin
from capacitive coupling to the high current inductor
switching signals. A 0.1

F is recommended between

the V

OUT

pin and the GND pin directly at the LTC1530 for

fixed voltage versions. For the adjustable voltage ver-
sion, keep the resistor divider close to the LTC1530.
The bottom resistor's ground connection should tie
directly to the LTC1530's GND pin.

7. Kelvin sense I

MAX

and I

at the drain and source pins

of Q1.

8. Minimize the length of the gate lead connections.

APPLICATIO S I FOR ATIO

LTC1530

GND

COMP

LTC1530

MAX

OUT

1530 F09

IFB

IMAX

0.1

BOLD LINES INDICATE
HIGH CURRENT PATHS

OUT

Figure 9. LTC1530 Layout Diagram

DEVICE

OUTPUT CAPACITOR (C

)

LTC1530-3.3

7 X330

10k

0.022

150pF

AVX TPSE337M006R0100

LTC1530-3.3

4 X1500

15k

0.022

100pF

SANYO 6MV1500GX

LTC1530-2.8

7 X330

8.6k

0.022

150pF

AVX TPSE337M006R0100

LTC1530-2.8

4 X1500

13k

0.022

100pF

SANYO 6MV1500GX

LTC1530-2.5

7 X330

7.5k

0.022

220pF

AVX TPSE337M006R0100

LTC1530-2.5

4 X1500

11k

0.022

120pF

SANYO 6MV1500GX

LTC1530-1.9

7 X330

5.6k

0.033

220pF

AVX TPSE337M006R0100

LTC1530-1.9

4 X1500

8.2k

0.022

220pF

SANYO 6MV1500GX

1530 TA TBL

Figure 10. 5V to 1.9V-3.3V Synchronous Buck Converter
PV

Is Powered from 12V Supply

0.1

(SEE
TABLE)

2.7k

12V

GND

LTC1530

(SEE TABLE)

COMP

MAX

OUT

1.9V TO 3.3V
14A

1530 F10

* SILICONIX SUD50N03-10

** 3

SANYO 10MV1200GX OR

SANYO OS-CON 6SH330K

Q1*

Q2*

COILTRONICS CTX02-13198 (2

H) OR

PANASONIC ETQP6F2R5HA PCC-N6 (2.5

(SEE TABLE)

APPLICATIO S I FOR ATIO

LTC1530

5V to 1.9V-3.3V Synchronous Buck Converter

Is Generated from Charge Pump

0.1

0.22

(SEE
TABLE)

2.7k

GND

LTC1530

(SEE TABLE)

COMP

MAX

OUT

1530 TA02

* SILICONIX SUD50N03-10

** 3

SANYO 10MV1200GX OR

SANYO OS-CON 6SH330K

Q1*

Q2*

COILTRONICS CTX02-13198 (2

H) OR

PANASONIC ETQP6F2R5HA PCC-N6 (2.5

(SEE TABLE)

OUT

1.9V TO 3.3V
14A

MBR0530T1 MBR0530T1

DEVICE

OUTPUT CAPACITOR (C

)

LTC1530-3.3

7 X330

10k

0.022

150pF

AVX TPSE337M006R0100

LTC1530-3.3

4 X1500

15k

0.022

100pF

SANYO 6MV1500GX

LTC1530-2.8

7 X330

8.6k

0.022

150pF

AVX TPSE337M006R0100

LTC1530-2.8

4 X1500

13k

0.022

100pF

SANYO 6MV1500GX

LTC1530-2.5

7 X330

7.5k

0.022

220pF

AVX TPSE337M006R0100

LTC1530-2.5

4 X1500

11k

0.022

120pF

SANYO 6MV1500GX

LTC1530-1.9

7 X330

5.6k

0.033

220pF

AVX TPSE337M006R0100

LTC1530-1.9

4 X1500

8.2k

0.022

220pF

SANYO 6MV1500GX

1530 TA TBL

C2
0.1

C5
0.22

C3
10

R2, 20

R1
2.7k

GND

LTC1530-3.3

COMP

MAX

OUT

1530 TA09

= 3

SANYO 10MV1200GX

OUT

= 4

SANYO 6MV1500GX

L1 = SUMIDA 6383-T018
(PRI = 1

H, SEC = 26

Q1, Q2 = SILICONIX SUD50N03-10
Q3 = SILICONIX Si4450DY

4.7k

0.022

R4
3.74k
1%

C4
22

35V

C4
33

20V

C1
220pF

OUT1

3.3V
14A

OUT2

12V
0.4A

OUT

MBR0530T1

OUT

ADJ

LT1129CS8

R3
8.25k
1%

5V to Dual Output (3.3V and 12V) Synchronous Buck Converter

TYPICAL APPLICATIO S

LTC1530

LTC1530 3.3V to 1.8V, 14A Application

0.1

0.22

3.3

OUT

1500

2.5

576

1.24k

2.4k

GND

LTC1530-ADJ

LTC1517-5

COMP

MAX

SENSE

OUT

GND

1530 TA03

3.3V

L1 = PANASONIC ETQP6F2R5HA PCC-N6
C

= 3

SANYO 6MV1500GX

OUT

= 4

SANYO 6MV1500GX

13k

0.022

Q2
SUD50N03

SUD50N03

100pF

OUT

1.8V
14A

MBRS120

D2
MBRS120

Other Methods to Generate PV

Supply from 3.3V Input

12V

20V

L1*

GND

SW2

LT1107-12

SW1

LIM

SENSE

1530 TA04

3.3V

* SUMIDA CD54-330K OR

COILCRAFT DT3316-473

** SUMIDA CD43-100

MBRS120T3

10V

20V

3.3

100pF

3000pF

L1**

SHDN

GND

LT1317

3.3V

MBR0520

33k

300k

2.2M

TYPICAL APPLICATIO S

LTC1530

LTC1530 High Efficiency Boost Converter

GND

LTC1530

1530 TA05a

IRF7811

71.5k

R6
23.2k
1%

IRF7811

D2
MBR0530T1

R4
360

MBRS140T3

COMP

MAX

SENSE

R2
47k

FMMD914

C16

330

10V

C17
330

10V

C18

330

10V

C14

330

10V

C15
330

10V

C13
1

16V

OUT

5V
6A

2.1

0.005

C12
470

0.22

16V

C1
10

16V

C11

470

C10
1

16V

C2
1

16V

C3
1

16V

R1
10k

47k

C5
0.022

Q1
FMMT3904

L1 = COILCRAFT DO3316P-102
L2 = SUMIDA CEE125C-2R1

GND

OUT

100pF

C7
0.22

16V

3.3V

LTC1517-5

Efficiency vs Load Current

LOAD CURRENT (A)

EFFICIENCY (%)

1530 TA05b

100

= 25

= 3.3V

OUT

= 5V

TYPICAL APPLICATIO S

LTC1530

Efficiency vs Load Current

LOAD CURRENT (A)

0.1

EFFICIENCY (%)

1530 TA07b

100

= 25

LTC1530 5V to 5V Synchronous Inverter

GND

LTC1530-ADJ

COMP

MAX

SENSE

, C

OUT

= 3

SANYO 10MV1200GX

L1 = PANASONIC ETQP6F2R5HA (PCC-N6)
Q1,Q2 = SILICONIX SUD50N03-10

4.7k

100

R1
2.4k

560

1/2W

0.22

0.1

C3
10

1000pF

680

MBR0530T1

1N4148

MBR0530T1

OPTIONAL

Z1
12V
ZENER
1/2W

C5
2.2

OUT

5V
5A

2.5

C2
10

R5
10k

R3
1k

R4
3.09k

1530 TA07a

Q3
2N7000

1/2
LTC1693-2

C7
1000pF

R10

330

D5
MBR0530T1

D4
1N4148

2.2

R11
1k

R7
4.7

R6
220

1/6W

TYPICAL APPLICATIO S

LTC1530

LTC1530 Synchronous SEPIC Converter

LOAD CURRENT (A)

0.1

EFFICIENCY (%)

0.5

1.0

1.5

2.0

2.5

3.0

3.5

1530 TA08b

4.0

100

= 25

= 8V

= 4V

Efficiency vs Load Current

GND

SHDN

33k

R7
300k

2.2M

0.22

1000pF

C6
100pF

C9
4.7

MBR0520

N-MOSFET

1N4148

P-MOSFET

L1B

L1A

OUT

5V
4A

OUT

C2
10

1530 TA08a

5.6

4.7

3000pF

C4
0.1

C3
10

C5
4.7

4.7k

2.2k

SENSE

0.02

4V TO 8V

FLY

MAX

LTC1530-ADJ

LT1317

SENSE

3.09k

R2
10k

GND

LTC1693-3

, C

OUT

= 3

SANYO 10MV1200GX

FLY

= 2

SANYO 16SA150MK

L1 = COILTRONIX CTX02-13198-1
(L1A = 1,2,3

7,8,9; L1B = 10,11,12

4,5,6)

L2 = SUMIDA CD43-100
Q1 = SILICONIX N-MOSFET SI4420DY
Q2 = SILICONIX P-MOSFET SI4425DY
R

SENSE

= DALE LVR-3 3W

COMP

1,2,3

4,5,6

10,11,12

7,8,9

TYPICAL APPLICATIO S

LTC1530

Dimensions in inches (millimeters) unless otherwise noted.

PACKAGE DESCRIPTIO

S8 Package

8-Lead Plastic Small Outline (Narrow 0.150)

(LTC DWG # 05-08-1610)

0.016 0.050

(0.406 1.270)

0.010 0.020

(0.254 0.508)

TYP

0.008 0.010

(0.203 0.254)

SO8 1298

0.053 0.069

(1.346 1.752)

0.014 0.019

(0.355 0.483)

TYP

0.004 0.010

(0.101 0.254)

0.050

(1.270)

BSC

0.150 0.157**

(3.810 3.988)

0.189 0.197*

(4.801 5.004)

0.228 0.244

(5.791 6.197)

DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE

DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

LTC1530

PART NUMBER

DESCRIPTION

COMMENTS

LTC1266

Current Mode Step-Up/Down Switching Regulator Controller

Synchronous N- or P-Channel FETs,
Comparator/Low-Battery Detector

LTC1430A

High Power Step-Down Switching Regulator Controller

Synchronous N-Channel FETs, 3.3V to 2.5V Conversion

LTC1553

5-Bit Programmable Synchronous Switching Regulator

Synchronous N-Channel FETs, Voltage Mode PV

20V,

Controller for Pentium II Processor

1.8V to 3.5V Output

LTC1628

Dual High Efficiency Low Noise Synchronous Step-Down

Constant Frequency, Standby 5V and 3.3V LDOs,

Switching Regulator

3.5V

36V

LTC1629

20A to 200A PolyPhase

Synchronous Controller

Expandable from 2-Phase to 12-Phase, Uses All
Surface Mount Components, No Heat Sink

LTC1702

No R

SENSE

2-Phase Dual Synchronous Step-Down Controller

550kHz, No Sense Resistor

LTC1709

2-Phase Synchronous Controller with 5-Bit VID

Current Mode, V

to 36V, I

OUT

Up to 42A,

OUT

from 1.3V to 3.5V

LTC1735

High Efficiency Synchronous Step-Down Switching Regulator

Drives Synchronous N-Channel FETs, V

36V

LTC1753

5-Bit Programmable Synchronous Switching Regulator

Synchronous N-Channel FETs, Voltage Mode PV

14V,

Controller for Pentium II and Pentium III Processors

1.3V to 3.5V Output, VRM8.2 to VRM8.4

LTC1772

SOT-23 Step-Down Controller

100% Duty Cycle, Up to 4A, 2.2V to 9.8V V

LTC1873

Dual 550kHz 2-Phase Synchronous Controller with 5-Bit VID

Desktop VID Codes, I

OUT

Up to 25A On Each Channel,

28-Lead SSOP

LTC1929

2-Phase Synchronous Controller

Up to 42A, Uses All Surface Mount Components,
No Heat Sink, 3.5V

36V

PolyPhase is a trademark of Linear Technology Corporation.

1530f LT/TP 0200 4K · PRINTED IN USA

LINEAR TECHNOLOGY CORPORATION 1998

TYPICAL APPLICATIO

Linear Technology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

(408) 432-1900

FAX: (408) 434-0507

www.linear-tech.com

LTC1530 5V to 2.5V, 5A Inverting Polarity Converter

RELATED PARTS

C10
1

C5
0.1

C4
10

OUT

1500

6.3V

2.5

SENSE

0.02

Q4
2N3904

Q5
2N3904

R9
10k

R11
10k

R12
40k

R10

R13

Z2
BZX55C6V2
1/2W, 6.2V

GND

= 5V

LTC1530-ADJ

COMP

MAX

SENSE

1530 TA06

, C

OUT

= 3

SANYO 6MV1500GX

L1 = PANASONIC ETQP6F2R5HA PCC-N6
Q1,Q2 = SILICONIX SUD50N03-10
R

SENSE

= DALE LVR-1, 1W

5.6k

R6
2k

R7
22

0.1

GND

Q3
2N3906

HARD CURRENT LIMIT CIRCUIT

(OPTIONAL)

1000pF

1.5K

R2
1k

OUT

2.5V
5A

1N4742A

(OPTIONAL)

MBRS130

4.7

MBRS130

C8
0.22

C9
1

1500

6.3V

*FOR HIGHER OUTPUT VOLTAGE (EX 3.3V),
INCREASE R8 TO 20

AND INSTALL Z1

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ÐÐ»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: LTC1530