1
LTC1623
SMBus Dual High Side
Switch Controller
s
SMBus and I
2
C Compatible
s
Built-In Charge Pumps Drive N-Channel Switches
s
16 Available Switches on the Same Bus
s
0.6V V
IL
and 1.4V V
IH
for DATA and CLK
s
Available in 8-Lead MSOP and S0 Packages
s
Low Standby Current: 14
A
s
Eight Addresses from Two Three-State Address Pins
s
Internal Power-On Reset Timer
s
Internal Undervoltage Lockout
s
No Need for External Pull-Up Resistors at Output
s
No Need for Secondary Power Source
s
Computer Peripheral Control
s
Laptop Computer Power Plane Switching
s
Portable Equipment Power Control
s
Industrial Control Systems
s
Handheld Equipment
The LTC
1623 SMBus switch controller is a slave device
that controls two high-side N-channel MOSFETs on either
the SMBus or the I
2
C bus. The LTC1623 operates with an
input voltage from 2.7V to 5.5V with a low standby current
of 14
A (at 3.3V). In accordance with the SMBus specifi-
cation, the LTC1623 maintains the 0.6V V
IL
and 1.4V V
IH
input thresholds throughout the supply voltage range.
Using the 2-wire interface, CLK and DATA, the LTC1623
monitors the bus for a start condition (DATA going from
high to low while CLK is high). Once detected, the LTC1623
compares its address with the first (address) byte sent
over the bus from the master. If matched, the LTC1623 will
execute the second (command) byte from the master and
independently control the built-in charge pumps to drive
two external switches.
The LTC1623 has two three-state programmable address
pins, thus allowing eight different addresses and a total of
sixteen available switches on the same bus.
Gate Drive Voltage
V
CC
2.7V TO 5.5V
10
F
(PROGRAMMABLE)
* SILICONIX Si69260Q
Q2
Q1
LOAD2
LOAD1
1623 TA01
(FROM
SMBus)
LTC1623
GND
V
CC
AD0
AD1
CLK
DATA
GA
GB
*
SUPPLY VOLTAGE (V)
GATE VOLTAGE (V)
14
12
10
8
6
4
2
0
1623 G01
0
1
2
3
4
5
6
T
J
= 25
C
, LTC and LT are registered trademarks of Linear Technology Corporation.
APPLICATIO
N
S
U
FEATURES
DESCRIPTIO
N
U
TYPICAL APPLICATIO
N
U
2
LTC1623
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V
CC
Operating Supply Voltage Range
2.7
5.5
V
I
VCC
Supply Current
Charge Pump Off, AD0 and AD1High or Low, V
CC
= 2.7V
q
12
30
A
DATA and CLK High
V
CC
= 3.3V
q
14
30
A
V
CC
= 5V
q
17
30
A
I
VCC
Supply Current
GA or GB High (Command Byte 00000001 or 00000010)
q
140
250
A
Both GA and GB High (Command Byte 00000011)
q
162
250
A
V
GS
Gate Voltage Above Supply
V
CC
= 2.7V
q
2.7
4.2
7
V
V
CC
= 3.3V
q
4.5
5.4
7
V
V
CC
= 5.5V
q
4.5
6.4
7
V
V
UVLO
Undervoltage Lockout
Falling Edge (Note1)
q
1.5
2.0
2.5
V
t
POR
Power-On Reset Delay Time
V
CC
= 2.7V (Note2)
300
1000
s
V
CC
= 5.5V
300
1000
s
f
OSC
Charge Pump Oscillator Frequency
300
kHz
(Note 3)
t
ON
Turn-On Time into 1000pF
V
CC
= 2.7V (From ON to GA, GB = V
CC
+ 1V) (Note 4)
170
s
V
CC
= 5.5V (From ON to GA, GB = V
CC
+ 2V) (Note 4)
180
s
t
OFF
Turn-Off Time into 1000pF
V
CC
= 2.7V (From OFF to GA, GB = 100mV) (Note 5)
17
s
V
CC
= 5.5V (From OFF to GA, GB = 100mV) (Note 5)
12
s
V
IL
DATA/CLK Input Low Voltage
V
CC
= 2.7V to 5.5V
0.6
V
V
IH
DATA/CLK Input High Voltage
V
CC
= 2.7V to 5.5V
1.4
V
ABSOLUTE
M
AXI
M
U
M
RATINGS
W
W
W
U
(Voltages Referred to GND Pin)
Input Supply Voltage (V
CC
) .......................... 0.3V to 6V
DATA, CLK (Bus Pins 1, 2) .......................... 0.3V to 6V
AD0, AD1 (Address Pins 3, 5) ..... 0.3V to (V
CC
+ 0.3V)
GA,GB (Gate Drive Pins 6, 7) .......... 0.3V to (V
CC
+ 7V)
Junction Temperature ........................................... 125
C
Operating Temperature Range
LTC1623C.................................................. 0
to 70
C
LTC1623I ............................................ 40
C to 85
C
Storage Temperature Range ................. 65
C to 150
C
Lead Temperature (Soldering, 10 sec).................. 300
C
PACKAGE/ORDER I
N
FOR
M
ATIO
N
W
U
U
ORDER PART
NUMBER
ORDER PART
NUMBER
LTC1623CMS8
S8 PART MARKING
1623
1623I
LTC1623CS8
LTC1623IS8
MS8 PART MARKING
LTCH
Consult factory for Military grade parts.
1
2
3
4
DATA
CLK
AD0
GND
8
7
6
5
V
CC
GA
GB
AD1
TOP VIEW
MS8 PACKAGE
8-LEAD PLASTIC MSOP
T
JMAX
= 125
C,
JA
= 150
C/ W
TOP VIEW
V
CC
GA
GB
AD1
DATA
CLK
AD0
GND
S8 PACKAGE
8-LEAD PLASTIC SO
1
2
3
4
8
7
6
5
T
JMAX
= 125
C,
JA
= 110
C/ W
ELECTRICAL CHARACTERISTICS
T
A
= 25
C, V
CC
= 5V unless otherwise specified. C
GA
= 1000pF, C
GB
= 1000pF
3
LTC1623
ELECTRICAL CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
T
A
= 25
C, V
CC
= 5V unless otherwise specified. C
GA
= 1000pF, C
GB
= 1000pF
PI
N
FU
N
CTIO
N
S
U
U
U
DATA: (Pin 1) Open-Drain Connected Serial Data Inter-
face. Must be pulled high to V
CC
with external resistor. The
pull-up current must be limited to 350
A.
CLK: (Pin 2) Serial Clock Interface. Must be pulled high to
V
CC
with external resistor. The pull-up current must be
limited to 350
A.
AD0: (Pin 3) Lower Three-State Programmable Address
Pin. Must be connected directly to V
CC
, GND, or V
CC
/2
(using two resistors
1M). Do not float this pin.
GND: (Pin 4) Ground.
AD1: (Pin 5) Higher Three-State Programmable Address
Pin. Must be connected directly to V
CC
, GND, or V
CC
/2
(using two resistors
1M). Do not float this pin.
GB: (Pin 6) Gate Drive to External High-Side Switch. Fully
enhanced by internal charge pump. Controlled by 2nd
LSB of command byte.
GA: (Pin 7) Gate Drive to External High-Side Switch. Fully
enhanced by internal charge pump. Controlled by LSB of
command byte.
V
CC
: (Pin 8) Input Supply Voltage. Range from 2.7V to
5.5V.
V
IL
AD0 and AD1 Input Low Voltage
V
CC
= 2.7V to 5.5V
q
0.2
V
V
IH
AD0 and AD1 Input High Voltage
V
CC
= 2.7V to 5.5V
q
V
CC
0.2
V
V
OL
Data Output Low Voltage
V
CC
= 2.7 to 5.5V, I
PULLUP
= 350
A
q
0.22
0.4
V
C
IN
Input Capacitance
5
pF
(DATA, CLK, AD0, AD1)
I
IN
Input Leakage Current (DATA, CLK)
1
A
Input Leakage Current(AD0, AD1)
250
nA
SMBus Related Specs (Note 6)
f
SMB
SMBus Operating Frequency
10
100
kHz
t
SUSTA
Start Condition Setup Time
4.7
s
t
BUF
Bus Free Time Between Stop and Start
4.7
s
t
HDSTA
Start Condition Hold Time
4.0
s
t
SUSTP
Stop Condition Setup Time
4.0
s
t
HDDAT
Data Hold Time
300
ns
t
SUDAT
Data Setup Time
250
ns
t
LOW
Clock Low Period
4.7
s
t
HIGH
Clock High Period
4.0
50
s
t
f
Clock /Data Fall Time
300
ns
t
r
Clock/Data Rise Time
1000
ns
I
PULLUP
Current Through External Pull-Up
(Data Pull-Down Current Capacity)
100
350
A
Resistor on DATA Pin
V
CC
= 2.7V to 5.5V
Note 4: ON is enabled upon receiving the Stop condition from the SMBus
master.
Note 5: OFF is enabled upon receiving the Stop condition from the SMBus
master.
Note 6: SMBus timing specs are guaranteed but not tested.
The
q
denotes the specifications which apply over the full operating
temperature range.
Note 1: Approximately 3% hysteresis is provided to ensure stable
operation and eliminate false triggering by minor V
CC
glitches.
Note 2: Measured from V
CC
> V
UVLO
to SMBus ready for data input.
Note 3: The oscillator frequency is not tested directly but is inferred from
turn-on time.
4
LTC1623
TYPICAL PERFOR
M
A
N
CE CHARACTERISTICS
U
W
Standby Current
Supply Current
TEMPERATURE (
C)
60
STANDBY CURRENT (
A)
60
1623 G02
20
20
100
35
30
25
20
15
10
5
0
40
0
40
80
V
CC
= 5V
V
CC
= 2.7V
TEMPERATURE (
C)
SUPPLY CURRENT (
A)
1623 G03
400
350
300
250
200
150
100
50
0
60
60
20
20
100
BOTH CHANNELS ON
ONE CHANNEL ON
40
0
40
80
V
CC
= 5V
Supply Current
TEMPERATURE (
C)
SUPPLY CURRENT (
A)
1623 G04
400
350
300
250
200
150
100
50
0
60
60
20
20
100
BOTH CHANNELS ON
ONE CHANNEL ON
40
0
40
80
V
CC
= 2.7V
TEMPERATURE (
C)
SUPPLY CURRENT (
A)
1623 G05
400
350
300
250
200
150
100
50
0
60
60
20
20
100
BOTH CHANNELS ON
ONE CHANNEL ON
40
0
40
80
V
CC
= 6V
TEMPERATURE (
C)
t
ON
(
s)
1623 G06
500
450
400
350
300
250
200
150
100
50
0
60
60
20
20
100
40
0
40
80
V
CC
= 2.7V
V
CC
= 5.5V
TEMPERATURE (
C)
t
OFF
(
s)
1623 G07
20
18
16
14
12
10
8
6
4
2
0
60
60
20
20
100
40
0
40
80
V
CC
= 2.7V
V
CC
= 5.5V
Supply Current
t
ON
vs Temperature
t
OFF
vs Temperature
5
LTC1623
GA, GB Output Voltage
TEMPERATURE (
C)
OUTPUT VOLTAGE (V)
1623 G08
16
14
12
10
8
6
4
2
0
60
60
20
20
100
40
0
40
80
V
CC
= 5V
GATE VOLTAGE ABOVE SUPPLY (V
GS
)
0
GATE CURRENT (
A)
100
10
1
0.1
1
7
1623 G11
V
CC
= 6V
V
CC
= 2.7V
2
3
4
6
5
V
CC
= 3.3V
V
CC
= 5V
Gate Drive Current
TEMPERATURE (
C)
DATA V
OL
(mV)
1623 G09
500
450
400
350
300
250
200
150
100
50
0
60
60
20
20
100
40
0
40
80
V
CC
= 5V
I
PULLUP
= 350
A
DATA V
OL
vs Temperature
TEMPERATURE (
C)
60
V
gs
(V)
60
1623 G10
20
20
100
7
6
5
4
3
2
1
0
40
0
40
80
V
CC
= 3.3V
V
CC
= 2.7V
V
CC
= 5.5V
V
GS
vs Temperature
TYPICAL PERFOR
M
A
N
CE CHARACTERISTICS
U
W
6
LTC1623
TI I G DIAGRA
U
W
W
U
U
W
FU CTIO AL BLOCK DIAGRA
CLK
DATA
START
STOP
1623 TD01
t
HDSTA
t
SUDAT
t
HIGH
t
SUSTP
t
HDDAT
t
SUSTA
t
r
t
f
t
LOW
INPUT
BUFFER
UNDER-
VOLTAGE
LOCKOUT
PORB
START-
AND-STOP
DETECTORS
SHIFT
REGISTER
GLUE
LOGIC
1
ADDRESS
DECODER
COUNTER
OUTPUT
LATCHES
REGULATING
CHARGE
PUMPS
ACK
V
CC
2V
DATA
2
CLK
7 GA
10k
10k
GB
1623 BD
3
AD0
5
AD1
INPUT
BUFFER
ADDRESS
COMPARATOR
6
POWER-ON
RESET
7
LTC1623
OPERATIO
U
SMBus Operation
SMBus is a serial bus interface that uses only two bus
lines, DATA and CLK, to control low power peripheral
devices in portable equipment. It consists of masters, also
known as hosts, and slave devices. The master of the
SMBus is always the one to initiate communications to its
slave devices by varying the status of the DATA and CLK
lines. The SMBus specification establishes a set of proto-
cols that devices on the bus must follow during commu-
nications.
The protocol that the LTC1623 uses is the Send Byte
Protocol. In this protocol, the master first sends out a Start
signal by switching the DATA line from high to low while
CLK is high. (Because there may be more than one master
on the same bus, an arbitration process takes place if two
masters attempt to take control of the DATA line simulta-
neously; the first master that outputs a one while the other
master is zero loses the arbitration and becomes a slave
itself.) Upon detecting this Start signal, all slave devices on
the bus wake up and get ready to shift in the next byte of
data.
The master then sends out the first byte. The first seven
bits of this byte consist of the address of the device that the
master wishes to communicate with. The last bit indicates
whether the command will be a read (logic one) or write
(logic zero). Because the LTC1623 is a slave device that
can only be written to by a master, it will ignore the ensuing
commands of the master if it wants to read from the
LTC1623, even if the address sent by the master matches
that of the LTC1623. After reception of the first byte, the
slave device (LTC1623) with the matching address then
acknowledges the master by pulling the data line low
before the rising edge of the ninth clock cycle.
By now, all other nonmatching slave devices will have
gone back to their original standby states to wait for the
next start signal. Meanwhile, upon receiving the acknowl-
edge from the matching slave, the master then sends out
the command byte. In the case of the LTC1623, the two
LSBs of this second byte from the master are the signals
controlling the status of the external switches; a digital
"one" turns on the charge pump to drive up the output gate
voltage while a digital "zero" shuts down the charge pump
and discharges the output gate voltage to zero.
After receiving the command byte, the slave device
(LTC1623) needs to again acknowledge the master by
pulling the DATA line low on the following clock cycle. The
master then ends this Send Byte Protocol by sending the
Stop signal, which is a transition from low to high on the
DATA line while the CLK line is high. Valid data is shifted
into the output latch on the last acknowledge signal; the
external switch will not be enabled, however, until the Stop
signal is detected. This double-buffering feature allows
the user to daisy-chain several differently addressed SMBus
devices such that their output executions are synchronous
to the Stop signal even though valid data were loaded into
their output latches at different times. Figure 1 shows an
example of this special protocol. If somehow either the
Start or the Stop signal is detected in the middle of a byte,
the slave device (LTC1623) will regard this as an error and
reject all previous data. Other than the Stop and Start
conditions, DATA must be stable during CLK high; DATA
can change state only during CLK low.
CLK
START
DATA
1
1
1
0
0
0
0
0
0
0
0
0
0
0
1
(GB ON)(GA ON)
1623 TD02
COMMAND BYTE
ADDRESS BYTE
1
ACK
STOP
ACK
(PROGRAMMABLE)
(WRITE)
Example of Send Byte Protocol to Slave Address 1011000 Turning GA and GB On
COMMAND
ADD1 A
A
STOP
ADD2 A
START
START
COMMAND A
COMMAND A
ADD3 A
START
1623 F01
Figure 1. Daisy-Chaining Multiple SMBus Devices
8
LTC1623
Address
The LTC1623 has an address of 1011XXX; the four MSBs
are hard-wired, but the 3 LSBs are programmed by the
user with the help of two three-state address pins. Refer to
Table 1 for the pin configurations and their corresponding
addresses.
To conserve standby current, it is preferable to tie the
address pins to either V
CC
or GND. If more than four
addresses are needed, then either one of the address pins
can be tied to the third state of V
CC
/2 by using two equal
value resistors (
1M) shown in Figure 2. Do not connect
both address pins to the V
CC
/2 state simultaneously
because this is not a valid address.
Charge Pump
To fully enhance the external N-channel switches, an
internal charge pump is used to boost the output gate drive
to a minimum of 2.7V and a maximum of 6V above V
CC
,
depending on V
CC
itself. The reason for the maximum
output voltage limit is to avoid switch gate source break-
down due to excessive gate overdrive. A feedback network
is used to limit the charge pump output to 6V above V
CC
.
Because the output will only need to drive the gate of the
external switch by charging and discharging the parasitic
gate capacitances, the internal charge pump, clocked by
an approximately 300KHz oscillator, is appropriately sized
to source less than 100
A.
Power-On Reset and Undervoltage Lockout
The LTC1623 starts up with both gate drives low. An
internal power-on reset (POR) signal inhibits operation
until about 300
s after V
CC
crosses the undervoltage
lockout threshold (typically 2V). The circuit includes some
hysteresis and delay to avoid nuisance resets. Once opera-
tion begins, V
CC
must drop below the threshold for at least
100
s to trigger another POR sequence.
During standby, when both gate drive outputs are dis-
abled, quiescent current is kept to a minimum (13
A
typical) because only the UVLO block is active.
Input Threshold
Anticipating the trend toward lower supply voltages, the
SMBus is specified with a V
IH
of 1.4V and a V
IL
of 0.6V.
While some SMBus parts may violate this stringent SMBus
specification by allowing a higher V
IH
value for a corre-
spondingly higher input supply voltage, the LTC1623
meets and maintains the constant SMBus input threshold
specification across the entire supply voltage range of
2.7V to 5.5V.
Figure 2. LTC1623 Programmed with Address 1011001
1
2
3
4
8
7
6
5
V
CC
GA
GB
AD1
DATA
CLK
AD0
GND
DATA
CLOCK
LTC1623
LOAD1
1M
1M
LOAD2
1623 F02
Table 1. Address Pin Truth Table
AD0
AD1
ADDRESS
GND
GND
1011000
GND
V
CC
/2
1011001
GND
V
CC
1011010
V
CC
/2
GND
1011011
V
CC
/2
V
CC
/2
UNUSED
V
CC
/2
V
CC
1011100
V
CC
GND
1011101
V
CC
V
CC
/2
1011110
V
CC
V
CC
1011111
OPERATIO
U
9
LTC1623
APPLICATIO
N
S I
N
FOR
M
ATIO
N
W
U
U
U
To avoid turning on the external power MOSFETs too
quickly, an internal 10k resistor has been placed in series
with each of the output gate drive pins (see Functional
Block Diagram). Therefore, it only needs an external 0.1
F
capacitor to create enough RC delay (10k
0.1
F = 1ms)
to slow down the ramp rate of the output gate drive. In
other words, it will take a minimum of 1ms to charge up
the external MOSFET. An additional external 1k resistor
between the 0.1
F capacitor and the gate of the MOSFET
(Figure 3) is required to eliminate possible MOSFET self
oscillations.
GA
GB
LTC1623
GND
V
CC
3.5V TO 5.5V
V
CC
0.1
F
1k
1
3
8
680
5
6
3.3k
V
OUT
3.3V
10k
10
F
CLK
DATA
(PROGRAMMABLE)
(FROM SMBus)
AD0
AD1
510pF
LOAD
Si3442DV
Si3442DV
LT1431
1623 F04
470
F
6V
+
Figure 4. 3.3V/3A Extremely Low Voltage Drop
Regulator and Load Switch
Figure 3. Dual Load Switch with Q2 On upon Power-Up
V
CC
2.7V TO 5.5V
10
F
(PROGRAMMABLE)
FAN
DISPLAY
1623 F03
(FROM
SMBus)
LTC1623
GND
V
CC
AD0
AD1
CLK
DATA
GA
GB
0.1
F
Q1
Si3442DV
Q2
Si6433DQ
0.1
F
1k
1k
Figure 6. Switching Regulator with Low-Battery
Detect Using 22
A Standby Current
V
CC
2.7V TO 4.5V
0.1
F
100
F
1k
3
8
4
2
499k
5
7
LBO
22
H*
*SUMIDA CD54-220
604k
10
F
(PROGRAMMABLE)
(FROM
SMBus)
1N5817
LOAD
SHDN
Si3442DV
Si3442DV
LT1304-5
1623 F05
+
2200
F
5V
200mA
100k
+
GA
GB
LTC1623
GND
V
CC
CLK
DATA
AD0
AD1
GA
GB
LTC1623
GND
V
CC
3.5V TO 5.5V
V
CC
1
3
8
680
5
6
3.3k
V
OUT
3.3V
SWITCHED
V
OUT
3.3V
10k
10
F
CLK
DATA
(PROGRAMMABLE)
(FROM SMBus)
AD0
AD1
510pF
0.1
F
Si3442DV
LT1431
1623 TA03
1k
470
F
6V
Si3442DV
+
Figure 5. SMBus Controlled Low Dropout Regulator
For active-low applications in which the load needs to be
on upon power-up, an external P-channel switch can be
used (Figure 3). This load can be switched off later after the
proper protocol has been sent.
Used with the LT
1431, the LTC1623 makes a 3.3V/3A
extremely low voltage drop regulator (Figures 4 and 5). In
this application, the other output channel can be used to
drive a separate load, or it can also be used to control the
output of the LDO so that the user has total control over the
switching in and switching out of the LDO (Figure 5). Also,
with the help of the LT1304-5, the LTC1623 can be used
to make a boost switching regulator with a low standby
current of 22
A (Figure 6).
10
LTC1623
MS8 Package
8-Lead Plastic MSOP
(LTC DWG # 05-08-1660)
MSOP (MS8) 1197
* DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH,
PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
0.021
0.006
(0.53
0.015)
0
6
TYP
SEATING
PLANE
0.007
(0.18)
0.040
0.006
(1.02
0.15)
0.012
(0.30)
REF
0.006
0.004
(0.15
0.102)
0.034
0.004
(0.86
0.102)
0.0256
(0.65)
TYP
1
2
3
4
0.192
0.004
(4.88
0.10)
8
7 6
5
0.118
0.004*
(3.00
0.102)
0.118
0.004**
(3.00
0.102)
PACKAGE DESCRIPTIO
N
U
Dimensions in inches (millimeters) unless otherwise noted.
11
LTC1623
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
PACKAGE DESCRIPTIO
N
U
S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
Dimensions in inches (millimeters) unless otherwise noted.
1
2
3
4
0.150 0.157**
(3.810 3.988)
8
7
6
5
0.189 0.197*
(4.801 5.004)
0.228 0.244
(5.791 6.197)
0.016 0.050
0.406 1.270
0.010 0.020
(0.254 0.508)
45
0
8
TYP
0.008 0.010
(0.203 0.254)
SO8 0996
0.053 0.069
(1.346 1.752)
0.014 0.019
(0.355 0.483)
0.004 0.010
(0.101 0.254)
0.050
(1.270)
TYP
DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
*
**
12
LTC1623
1623f LT/TP 0598 4K PRINTED IN USA
LINEAR TECHNOLOGY CORPORATION 1997
PART NUMBER
DESCRIPTION
COMMENTS
LTC1153/LTC1154
Single High Side Micropower MOSFET Drivers
Circuit Breaker with Auto Reset
LTC1155/LTC1255
Dual High Side Micropower MOSFET Drivers
Latch-Off Current Limit
LTC1163
Triple 1.8V to 6V High Side MOSFET Driver
Three MOSFET Drivers in 8-Lead SO Package
LT1304
Micropower DC/DC Converter
Low-Battery Detector Active in Shutdown
LTC1473
Dual PowerPath
TM
Switch Matrix
Current Limit with Timer
LTC1479
PowerPath
Controller for Dual Battery Systems
Complete Smart Battery Controller
RELATED PARTS
10
F
5V
1623 TA02
LTC1623
GND
V
CC
AD0
AD1
CLK
DATA
GA
GB
0.1
F
0.1
F
1
F
Q1
Si3442DY
Q2*
Q3*
1k
1k
3.3V
10k
TO PC CARD V
CC
0V/3.3V/5V
*1/2 Si6926DQ
Single Slot PCMCIA 3.3V/5V Switch
PowerPath is a trademark of Linear Technology Corporation.
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
q
FAX: (408) 434-0507
q
www.linear-tech.com
TYPICAL APPLICATIO
N
S
U
V
CC
2.7V TO 5.5V
V
EXT
(30V MAX)
10
F
(PROGRAMMABLE)
HIGH SIDE
LOAD
LOW SIDE
LOAD
1623 TA05
(FROM
SMBus)
LTC1623
GND
V
CC
AD0
AD1
CLK
DATA
GA
GB
0.1
F
Si6954DQ
0.1
F
1k
1k
Si6954DQ
LTC1623 Driving Both High Side and Low Side Switches
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