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1
LTC1759
Smart Battery Charger
The LTC
1759 Smart Battery Charger is a single chip
charging solution that dramatically simplifies construc-
tion of an SBS compliant system. The LTC1759 imple-
ments a Level 2 charger function whereby the charger can
be programmed by the battery or by the host. A thermistor
on the battery being charged is monitored for tempera-
ture, connectivity and battery type information. The SMBus
interface remains alive when the AC power adapter is
removed and responds to all SMBus activity directed to it,
including thermistor status (via the ChargerStatus com-
mand). The charger also provides an interrupt to the host
whenever a status change is detected (e.g., battery
removal, AC adapter connection).
Charging current and voltage are restricted to chemistry
specific limits for improved system safety and reliability.
Limits are programmable by two external resistors. Addi-
tionally, the maximum average current from the AC adapter
is programmable to avoid overloading the adapter when
simultaneously supplying load current and charging cur-
rent. When supplying system load current, charging cur-
rent is automatically reduced to prevent adapter overload.
s
Single Chip Smart Battery Charger Controller
s
100% Compliant (Rev 1.0) SMBus Support
Allows for Operation with or without Host
s
SMBus Accelerator Improves SMBus Timing
s
Hardware Interrupt and SMBAlert Response
Eliminate Interrupt Polling
s
High Efficiency Synchronous Buck Charger
s
0.5V Dropout Voltage; Maximum Duty Cycle > 99.5%
s
AC Adapter Current Limit Maximizes Charge Rate*
s
1% Voltage Accuracy; 5% Current Accuracy
s
Up to 8A Charging Current Capability
s
Dual 10-Bit DACs for Charger Voltage and Current
Programming
s
User-Selectable Overvoltage and Overcurrent Limits
s
High Noise Immunity Thermistor Sensor
s
Small 36-Lead Narrow (0.209") SSOP Package
, LTC and LT are registered trademarks of Linear Technology Corporation.
Figure 1. 4A SMBus Smart Battery Charger
s
Portable Computers
s
Portable Instruments
s
Docking Stations
*US Patent Number 5,723,970
UV
V
DD
SYNC
SDB
CHGEN
V
LIMIT
I
LIMIT
DGND
I
SET
PROG
V
C
COMP1
AGND
RNR
THERM
SDA
SCL
INTB
22
21
8
32
9
10
2
33
34
1
3
35
30
29
31
23
26
36
3.83k
1.5k
LTC1759
1k
1k
499
475k
10k
0.1
F
0.33
F
V
DD
V
DD
1
F
0.68
F
33k
0.033
200
68
200
15.8k
1k
0.47
F
2.2
F
0.68
F
0.047
F
0.1
F
1
F
15
H
22
F
SYSTEM
POWER
0.025
33k
7
16
4
5
12
25
24
18
17
28
27
11
6
20
19
14
15
13
DCIN
DCDIV
INFET
V
CC
CLP
CLN
TGATE
BOOSTC
GBIAS
BOOST
SW
BGATE
SPIN
SENSE
BAT1
BAT2
V
SET
PGND
0.015
F
22
F
0.1
F
10
F
35V
Al
AC
ADAPTER
INPUT
SMART
BATTERY
INTB
SMBus
TO
HOST
SCL
SDA
1759 F01
+
+
APPLICATIO S
U
FEATURES
TYPICAL APPLICATIO
U
DESCRIPTIO
U
2
LTC1759
ABSOLUTE
M
AXI
M
U
M
RATINGS
W
W
W
U
(Note 1)
Voltage at V
CC
, UV, BAT1, CLP,CLN, SPIN,
SENSE with respect to AGND .................... 0.3V to 27V
Voltage at DCIN, BAT2 with Respect
to DGND .................................................... 0.3V to 27V
Voltage at INTB, SDA, SCL, DCDIV with Respect
to DGND ..................................................... 0.3V to 7V
BOOST, BOOSTC Voltage with Respect to V
CC
........ 10V
Voltage at V
DD
with Respect to DGND ........ 0.3V to 7V
SW Voltage with Respect to AGND .............. 2V to V
CC
GBIAS, SYNC ............................................ 0.3V to 10V
V
C
, PROG, V
SET
Voltage with Respect
to AGND ...................................................... 0.3V to 7V
TGATE, BGATE Current Continuous ..................
200mA
TGATE, BGATE Output Energy (per Cycle) ................ 2
J
PGND, DGND with Respect to AGND ....................
0.3V
Current into Any Pin .........................................
100mA
Operating Ambient Temperature Range ...... 0
C to 70
C
Operating Junction
Temperature Range .............................. 40
C to 125
C
Storage Temperature ........................... 65
C to 150
C
Lead Temperature (Soldering, 10 sec)................. 300
C
ORDER PART
NUMBER
Consult factory for Industrial and Military grade parts.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
TOP VIEW
G PACKAGE
36-LEAD PLASTIC SSOP
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
PGND
BGATE
GBIAS
BOOSTC
V
CC
BAT1
SPIN
SENSE
PROG
V
C
V
SET
V
LIMIT
I
LIMIT
BAT2
DCIN
DCDIV
RNR
THERM
BOOST
TGATE
SW
SYNC
SDB
AGND
UV
INFET
CLP
CLN
COMP1
CHGEN
INTB
SDA
SCL
V
DD
I
SET
DGND
T
JMAX
= 125
C,
JA
= 85
C/ W
ELECTRICAL CHARACTERISTICS
The
q
denotes specifications which apply over the full operating temperature range (T
J
= 0
C to 100
C), otherwise specifications are
T
A
= 25
C. V
CC
= DCIN = 18V, V
BAT1, 2
= 12.6V, V
DD
= 3.3V unless otherwise specified.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Supply and Reference
DCIN, V
CC
Operating Voltage
q
11
24
V
V
CC
Operating Current
V
CC
24V
q
12
20
mA
DCIN Operating Current
V
DCIN
= 24V
q
85
150
A
UV Lockout Threshold
Voltage on UV Pin Rising
q
6.3
6.7
7.15
V
UV Pin Input Current
0V
V
UV
8V
q
1
5
A
Battery Discharge Current
V
UV
0.4V, All Connected Pins
40
80
A
V
DD
Operating Voltage
q
3.0
5.5
V
V
DD
Operating Current
Charging, V
DD
= 5.5V, Shorted Thermistor
1.35
2
mA
Not Charging, V
DD
= 5.5V
80
150
A
V
DD
Undervoltage Lockout
q
1.6
2.2
2.9
V
Switching Regulator
Charging Voltage Accuracy (Notes 3, 5)
2.465V
V
BAT2
V
MAX
q
1
1
%
Charging Current Accuracy (Note 3)
R
SET
Tolerance = 1%
5
5
%
PACKAGE/ORDER I
N
FOR
M
ATIO
N
W
U
U
LTC1759CG
3
LTC1759
ELECTRICAL CHARACTERISTICS
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
BOOST Pin Current
V
BOOST
= V
SW
+ 8V, 0V
V
SW
20V
TGATE High
2
3
mA
TGATE Low
2
3
mA
V
BOOST
Threshold to Turn T
GATE
Off
Measured at (V
BOOST
V
SW
)
(Note 6)
Low to High
q
6.8
7.1
7.3
V
Hysteresis
0.25
V
BOOSTC Pin Current
V
BOOSTC
= V
CC
+ 8V
1
mA
Sense Amplifier CA1 Gain and Input Offset Voltage
11V
V
CC
24V, 0V
V
BAT
20V
(With R
S2
= R
S3
= 200
)
R
SET
= 4.93k
q
92
100
108
mV
(Measured Across R
S1
) (Note 4)
R
SET
= 49.3k
7
10
13
mV
CA1 Bias Current (SENSE, BAT1)
V
SDB
= High
q
50
120
A
V
SDB
= Low (Shutdown)
10
A
CA1 Input Common Mode Range
q
0.25
V
CC
0.3
V
SPIN Input Current
V
SDB
= High, V
SPIN
= 12.6V
q
2
mA
V
SDB
= Low
10
A
CL1 Turn-On Threshold
0.5mA Output Current
87
92
97
mV
CL1 Transconductance
Output Current from 50
A to 500
A
0.5
1
3
mho
CLP Input Current
0.5mA Output Current
1
3
A
CLN Input Current
0.5mA Output Current
0.8
2
mA
CA2 Transconductance
V
C
= 1V, I
VC
=
1
A
150
200
300
mho
V
A
Transconductance (Note 5)
Ouput Current from 50
A to 500
A
0.21
0.6
1
mho
Gate Drivers
V
GBIAS
V
CC
11V, I
GBIAS
15mA, V
SDB
= High
q
8.4
8.9
9.3
V
V
TGATE
High (V
TGAGE
V
SW
)
I
TGATE
20mA
q
5.6
6.6
V
V
BGATE
High
I
BGATE
20mA
q
6.2
7.2
V
V
TGATE
Low (V
TGATE
V
SW
)
I
TGATE
50mA
q
0.8
V
V
BGATE
Low
I
BGATE
50mA
q
0.8
V
INFET "ON" Clamping Voltage (V
CC
V
INFET
)
q
6.5
7.8
9
V
INFET "ON" Drive Current
V
INFET
= V
CC
6V
q
8
20
mA
INFET "OFF" Clamping Voltage
V
CC
Not Connected, I
INFET
< 2
A
1.4
V
INFET "OFF" Drive Current
V
CC
= 12.4V, (V
CC
V
INFET
)
2V
2.5
mA
V
TGATE
, V
BGATE
at Shutdown
V
SDB
= Low, I
TGATE
= I
BGATE
= 10
A
q
1
V
Trip Points
DCDIV Threshold
V
DCDIV
Rising from 0.8V to 1.2V
q
0.9
1.0
1.1
V
DCDIV Hysteresis
25
mV
DCDIV Input Bias Current
V
DCDIV
= 1V
q
100
nA
Power-Fail Indicator (V
BAT2
V
DCIN
)
(Note 7)
AC_PRESENT = 1, V
DCIN
= 6V
q
0.84
0.89
0.94
V/V
Power-Fail Indicator Hysteresis (V
BAT2
V
DCIN
)
AC_PRESENT = 1, V
DCIN
= 6V
0.02
V/V
SYNC Pin Threshold
0.9
1.4
2.0
V
SYNC Pin Input Current
V
SYNC
= 0V
500
A
V
SYNC
= 2V
30
A
The
q
denotes specifications which apply over the full operating temperature range (T
J
= 0
C to 100
C), otherwise specifications are
T
A
= 25
C. V
CC
= DCIN = 18V, V
BAT1, 2
= 12.6V, V
DD
= 3.3V unless otherwise specified.
4
LTC1759
ELECTRICAL CHARACTERISTICS
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Thermistor Decoder (Note 11)
Combined Input Leakage on RNR and THERM
200
nA
Thermistor Trip (COLD/OR)
R
WEAK
= 475k
1%
q
80
100
120
k
Thermistor Trip (IDEAL/COLD)
R
NR
= 10k
1 %
q
26.4
30
33.6
k
Thermistor Trip (HOT/IDEAL)
R
NR
= 10k
1 %
q
2.64
3
3.36
k
Thermistor Trip (UR/HOT)
R
UR
= 1k
1 %
q
440
500
560
DACs
Charging Current Resolution
Guaranteed Monotonic Above I
MAX
/16
10
bits
Charging Current Granularity
R
ILIMIT
= 0
1
mA
R
ILIMIT
= 10k
1 %
2
mA
R
ILIMIT
= 33k
1 %
4
mA
R
ILIMIT
= Open (or Short to V
DD
)
8
mA
Wake-Up Charging Current (I
WAKE-UP
) (Note 8)
80
mA
Charging Current Limit (I
MAX
)
R
ILIMIT
= 0
1023
mA
R
ILIMIT
= 10k
1 %
2046
mA
R
ILIMIT
= 33k
1 %
4092
mA
R
ILIMIT
= Open (or Short to V
DD
)
8184
mA
I
SET
R
DS(ON)
25
I
SET
I
OFF
V
ISET
= 2.7V
q
1
A
Charging Voltage Resolution
Guaranteed Monotonic (2.5V
V
BAT
21V)
10
bits
Charging Voltage Granularity
R
VLIMIT
= 0
16
mV
R
VLIMIT
= 10k
1 %
16
mV
R
VLIMIT
= 33k
1 %
32
mV
R
VLIMIT
= 100k
1 %
32
mV
R
VLIMIT
= Open (or Short to V
DD
)
32
mV
Charging Voltage Limit
R
VLIMIT
= 0
q
8.33
8.432
8.485
V
R
VLIMIT
= 10k
1 %
q
12.50
12.64
12.72
V
R
VLIMIT
= 33k
1 %
q
16.67
16.864
16.97
V
R
VLIMIT
= 100k
1 %
q
20.82
21.056
21.18
V
R
VLIMIT
= Open (or Short to V
DD
)
(Note 2)
32.736
V
Logic Levels (Note 12)
SCL/SDA Input Low Voltage (V
IL
)
q
0.6
V
SCL/SDA Input High Voltage (V
IH
)
q
1.4
V
SDA Output Low Voltage (V
OL
)
I
PULLUP
= 350
A
q
0.4
V
SCL/SDA Input Current (I
IL
)
V
SDA
, V
SCL
= V
IL
q
1
A
SCL/SDA Input Current (I
IH
)
V
SDA
, V
SCL
= V
IH
q
1
A
INTB Output Low Voltage (V
OL
)
I
PULLUP
= 500
A
q
0.4
V
INTB Output Pull-Up Current
V
INTB
= V
OL
q
3.5
10
17.5
A
CHGEN Output Low Voltage (V
OL
)
I
OL
= 200
A
q
0.4
V
CHGEN Output High Voltage (V
OH
)
I
OH
= 200
A
q
V
DD
0.4
V
SDB Shutdown Threshold
q
1
2
V
SDB Pin Current
0V
V
SDB
3V
8
A
Power-On Reset Duration
V
DD
Ramp from 0V to > 3V in < 5
s
100
s
The
q
denotes specifications which apply over the full operating temperature range (T
J
= 0
C to 100
C), otherwise specifications are
T
A
= 25
C. V
CC
= DCIN = 18V, V
BAT1, 2
= 12.6V, V
DD
= 3.3V unless otherwise specified.
5
LTC1759
ELECTRICAL CHARACTERISTICS
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: This limit is greater than the absolute maximum for the charger.
Therefore, there is no effective limitation on voltage when this option is
selected. If the charger is requested to charge with a higher voltage than
the nominal limit, the VOLTAGE_OR bit will be set.
Note 3: Total system accuracy from SMBus request to output voltage or
output current.
Note 4: Test Circuit #1.
Note 5: Voltage accuracy is calculated using measured reference voltage,
obtained from V
SET
pin using Test Circuit #2, and VDAC resistor divider
ratio.
Note 6: When supply and battery voltage differential is low, high oscillator
duty cycle is required. The LTC1759 has a unique design to achieve duty
cycle greater than 99% by skipping cycles. Only when V
BOOST
drops below
the comparator threshold, will TGATE be turned off. See Applications
Information section.
Note 7: Power failure bit is set when the battery voltage is above 89% of
the power adapter voltage (V
DCIN
).
Note 8: The charger provides wake-up current when a battery is inserted
into the connector, prior to the battery requesting charging current and
voltage. See Smart Battery Charger Specification (Revision 1.0), section
6.1.3 and 6.1.8.
Note 9: In system start-up, C6 (boost capacitor) has no charge stored in it.
The LTC1759 will keep TGATE off, and turn BGATE on for 0.2
s, thus
charging C6. A comparator senses V
BOOST
and switches to the normal
PWM mode when V
BOOST
is above its threshold.
Note 10: Refer to Smart Battery Charge Specification (Revision 1.0),
section 6.1.2.
Note 11: Maximum total external capacitance on RNR and THERM pins
is 75pF.
Note 12: SMBus operation guaranteed by design from 40
C to 85
C.
The
q
denotes specifications which apply over the full operating temperature range (T
J
= 0
C to 100
C), otherwise specifications are
T
A
= 25
C. V
CC
= DCIN = 18V, V
BAT1, 2
= 12.6V, V
DD
= 3.3V unless otherwise specified.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Charger Timing
V
TGATE
, V
BGATE
Rise/Fall Time
1nF Load
25
ns
TGATE, BGATE Peak Drive Current
10nF Load
1
A
Regulator Switching Frequency
q
170
200
230
kHz
Synchronization Frequency
q
240
280
kHz
Maximum Duty Cycle in Start-Up Mode (Note 9)
q
85
90
%
t
TIMEOUT
for Wake-Up Charging a
q
140
175
210
sec
Cold or Underrange Battery
SMBus Timing (refer to System Management Bus Specification, Revision 1.0, section 2.1 for timing diagrams) (Note 12)
SCL Serial Clock High Period (t
HIGH
)
I
PULLUP
= 350
A, C
LOAD
= 150pF
q
4
s
SCL Serial Clock Low Period (t
LOW
)
I
PULLUP
= 350
A, C
LOAD
= 150pF
q
4.7
s
SDA/SCL Rise Time (t
r
)
C
LOAD
= 150pF
q
1000
ns
SDA/SCL Fall Time (t
f
)
q
30
300
ns
SMBus Accelerator Boosted Pull-Up Current
V
DD
= 3V
q
1
2.5
mA
Start Condition Setup Time (t
SU:STA
)
q
4.7
s
Start Condition Hold Time (t
HD:STA
)
q
4.0
s
SDA to SCL Rising-Edge Setup Time (t
SU:DAT
)
q
250
ns
SDA to SCL Falling-Edge Hold Time,
q
300
ns
Slave Clocking in Data (t
HD:DAT
)
t
TIMEOUT
Between Receiving Valid
q
140
175
210
sec
ChargingCurrent() and ChargingVoltage()
Commands (Note 10)
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