1
44411f
LTC4441/LTC4441-1
, LTC and LT are registered trademarks of Linear Technology Corporation. All other
trademarks are the property of their respective owners. Protected by U.S. Patents
including 6677210.
The LTC
4441/LTC4441-1 is an N-channel MOSFET gate
driver that can supply up to 6A of peak output current. The
chip is designed to operate with a supply voltage of up to
25V and has an adjustable linear regulator for the gate
drive. The gate drive voltage can be programmed between
5V and 8V.
The LTC4441/LTC4441-1 features a logic threshold driver
input. This input can be driven below ground or above the
driver supply. A dual function control input is provided to
disable the driver or to force the chip into shutdown mode
with <12A of supply current. Undervoltage lockout and
overtemperature protection circuits will disable the driver
output when activated. The LTC4441 also comes with an
open-drain output that provides adjustable leading edge
blanking to prevent ringing when sensing the source
current of the power MOSFETs.
The LTC4441 is available in a thermally enhanced 10-lead
MSOP package. The LTC4441-1 is the SO-8 version with-
out the blanking function.
6A Peak Output Current
Wide V
IN
Supply Range: 5V to 25V
Adjustable Gate Drive Voltage: 5V to 8V
Logic Input can be Driven Below Ground
30ns Propagation Delay
Supply Independent CMOS/TTL Input Thresholds
Undervoltage Lockout
Low Shutdown Current: <12A
Overtemperature Protection
Adjustable Blanking Time for MOSFET's
Current Sense Signal (LTC4441)
Available in SO-8 and 10-Lead MSOP
(Exposed Pad) Packages
DESCRIPTIO
U
FEATURES
APPLICATIO S
U
TYPICAL APPLICATIO
U
+
FB
R2
86.6k
R6
R3
5m
R9
8.06k
4441 TA01
R8
511k
R7
R1
330k
R5
SHUTDOWN
V
IN
6V TO 24V
SGND
C
VCC
10F
X5R
L1
10H 20A
D1
MBR10100
Si7370
2
22F
25V
X7R
+
C
OUT
V
OUT
52V
2A
EN/SHDN
LTC4441
V
IN
RBLANK
IN
DRV
CC
OUT
PGND
BLANK
R4
100
Q2
LTC3803
SWITCHING
CONTROLLER
GATE
SENSE
+
GND
FB
C
LOAD
(nF)
0
15
5
10
20 25 30 35
45
40
50
RISE/FALL TIME (ns)
4441 TA01b
200
180
80
60
20
40
0
160
140
120
100
T
A
= 25C
DRV
CC
= 5V
RISE TIME
FALL TIME
RISE/FALL Time vs C
LOAD
Power Supplies
Motor/Relay Control
Line Drivers
Charge Pumps
N-Channel MOSFET
Gate Driver
LTC4441/LTC4441-1
44411f
2
Supply Voltage
V
IN
...................................................................... 28V
DRV
CC
.................................................................. 9V
Input Voltage
IN .......................................................... 15V to 15V
FB, EN/SHDN ........................ 0.3V to DRV
CC
+ 0.3V
ABSOLUTE
M
AXI
M
U
M
RATINGS
W
W
W
U
The
indicates specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25C. V
IN
= 7.5V, DRV
CC
= 5V, unless otherwise specified.
Consult LTC Marketing for parts specified with wider operating temperature ranges.
T
JMAX
= 125C,
JA
= 150C/W
S8 PART
MARKING
44411
4441I1
ELECTRICAL CHARACTERISTICS
RBLANK, BLANK (LTC4441 Only) .......... 0.3V to 5V
OUT Output Current ............................................ 100mA
Operating Temperature Range (Note 2) .. 40C to 85C
Junction Temperature (Note 8) ............................ 125C
Storage Temperature Range ................. 65C to 150C
Lead Temperature (Soldering, 10 sec) .................. 300C
ORDER PART
NUMBER
LTC4441ES8-1
LTC4441IS8-1
PACKAGE/ORDER I
N
FOR
M
ATIO
N
W
U
U
1
2
3
4
5
PGND
BLANK
RBLANK
SGND
IN
10
9
8
7
6
OUT
DRV
CC
V
IN
FB
EN/SHDN
TOP VIEW
11
MSE PACKAGE
10-LEAD PLASTIC MSOP
T
JMAX
= 125C,
JA
= 38C/W (NOTE 3)
EXPOSED PAD (PIN 11) IS GND
MUST BE SOLDERED TO PCB
MSE PART
MARKING
LTBJQ
LTBJP
ORDER PART
NUMBER
LTC4441EMSE
LTC4441IMSE
1
2
3
4
8
7
6
5
TOP VIEW
OUT
DRV
CC
V
IN
FB
PGND
SGND
IN
EN/SHDN
S8 PACKAGE
8-LEAD PLASTIC SO
(Note 1)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V
DRVCC
Driver Supply Programmable Range
5
8
V
I
VIN
V
IN
Supply Current
EN/SHDN = 0V, IN = 0V
5
12
A
EN/SHDN = 5V, IN = 0V
250
500
A
f
IN
= 100kHz, C
OUT
= 4.7nF (Note 4)
3
6
mA
DRV
CC
Regulator
V
FB
Regulator Feedback Voltage
V
IN
= 7.5V
1.11
1.21
1.31
V
V
DRVCC(LINE)
Regulator Line Regulation
V
IN
= 7.5V to 25V
9
40
mV
V
DRVCC(LOAD)
Load Regulation
Load = 0mA to 40mA
0.1
%
V
DROPOUT
Regulator Dropout Voltage
Load = 40mA
370
mV
V
UVLO
FB Pin UVLO Voltage
Rising Edge
1.09
V
Falling Edge
0.97
V
Input
V
IH
IN Pin High Input Threshold
Rising Edge
2
2.4
2.8
V
V
IL
IN Pin Low Input Threshold
Falling Edge
1
1.4
1.8
V
V
IH
-V
IL
IN Pin Input Voltage Hysteresis
Rising-Falling Edge
1
V
I
INP
IN Pin Input Current
V
IN
= 10V
0.01
10
A
I
EN/SHDN
EN/SHDN Pin Input Current
V
EN/SHDN
= 9V
0.01
1
A
V
SHDN
EN/SHDN Pin Shutdown Threshold
Falling Edge
0.45
V
V
EN
EN/SHDN Pin Enable Threshold
Rising Edge
1.21
V
Falling Edge
1.036
1.09
1.145
V
V
EN(HYST)
EN/SHDN Pin Enable Hysteresis
Rising-Falling Edge
0.12
V
3
44411f
LTC4441/LTC4441-1
The
indicates specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25C. V
IN
= 7.5V, DRV
CC
= 5V, unless otherwise specified.
ELECTRICAL CHARACTERISTICS
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: The LTC4441E/LTC4441E-1 are guaranteed to meet performance
specifications from 0C to 70C. Specifications over the 40C to 85C
operating temperature range are assured by design, characterization and
correlation with statistical process controls. The LTC4441I/LTC4441I-1 are
guaranteed and tested over the 40C to 85C operating temperature
range.
Note 3: Failure to solder the Exposed Pad of the MSE package to the PC
board will result in a thermal resistance much higher than 38C/W.
Note 4: Supply current in normal operation is dominated by the current
needed to charge and discharge the external power MOSFET gate. This
current will vary with supply voltage, switching frequency and the external
MOSFETs used.
Note 5: Rise and fall times are measured using 10% and 90% levels. Delay
times are measured from 50% of input to 20%/80% levels at driver
output.
Note 6: Blanking time is measured from 50% of OUT leading edge to 10%
of BLANK with a 1k pull-up at BLANK pin. LTC4441 only.
Note 7: Guaranteed by design, not subject to test.
Note 8: This IC includes overtemperature protection that is intended to
protect the device during momentary overload conditions. The junction
temperature will exceed 125C when overtemperature protection is active.
Continuous operation above the maximum operating junction temperature
may impair device reliability.
TYPICAL PERFOR A CE CHARACTERISTICS
U
W
IN Low Threshold Voltage
vs Temperature
IN High Threshold Voltage
vs Temperature
EN Pin Input Threshold Voltage
vs Temperature
TEMPERATURE (C)
50
IN PIN INPUT THRESHOLD (V)
25
4441 G01
25
0
50
1.8
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1.0
75
100
125
V
IN
= 7.5V
DRV
CC
= 5V
TEMPERATURE (C)
50
IN PIN INPUT THRESHOLD (V)
25
4441 G02
25
0
50
2.8
2.7
2.6
2.5
2.4
2.3
2.2
2.1
2.0
75
100
125
V
IN
= 7.5V
DRV
CC
= 5V
TEMPERATURE (C)
50
EN PIN INPUT THRESHOLD VOLTAGE (V)
25
4441 G03
25
0
50
1.26
1.24
1.22
1.20
1.18
1.14
1.10
1.06
1.16
1.12
1.08
1.04
75
100
125
V
IN
= 7.5V
DRV
CC
= 5V
RISING EDGE
FALLING EDGE
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Output
R
ONL
Driver Output Pull-Down Resistance
I
OUT
= 100mA
0.35
0.8
I
PU
Driver Output Peak Pull-Up Current
DRV
CC
= 8V
6
A
I
PD
Driver Output Peak Pull-Down Current
DRV
CC
= 8V
6
A
R
ON(BLANK)
BLANK Pin Pull-Down Resistance
IN = 0V, I
BLANK
= 100mA LTC4441 Only
11
V
RBLANK
RBLANK Pin Voltage
R
BLANK
= 200k LTC4441 Only
1.3
V
Switching Timing
t
PHL
Driver Output High-Low Propagation Delay
C
OUT
= 4.7nF (Note 5)
30
ns
t
PLH
Driver Output Low-High Propagation Delay
C
OUT
= 4.7nF (Note 5)
36
ns
t
r
Driver Output Rise Time
C
OUT
= 4.7nF (Note 5)
13
ns
t
f
Driver Output Fall Time
C
OUT
= 4.7nF (Note 5)
8
ns
t
BLANK
Driver Output High to BLANK Pin High
R
BLANK
= 200k (Note 6)
200
ns
LTC4441/LTC4441-1
44411f
4
TEMPERATURE (C)
50
OUT PIN PULL-DOWN RESISTANCE (
)
25
4441 G10
25
0
50
0.8
0.4
0.3
0.1
0.2
0.7
0.6
0
0.5
75
100
125
V
IN
= 7.5V
DRV
CC
= 5V
DRV
CC
(V)
4.5
t
PLH
, t
PHL
(ns)
6.0
4441 G11
5.0 5.5
6.5
60
40
30
10
20
0
50
7.0 7.5 8.0 8.5 9.0
T
A
= 25C
C
LOAD
= 4.7nF
t
PHL
t
PLH
TEMPERATURE (C)
50
25
25
0
50
75
100
125
t
PLH
, t
PHL
(ns)
4441 G12
60
40
30
10
20
0
50
DRV
CC
= 5V
C
LOAD
= 4.7nF
t
PHL
t
PLH
TYPICAL PERFOR A CE CHARACTERISTICS
U
W
FB Pin UVLO Threshold
vs Temperature
SD Pin Input Threshold Voltage
vs Temperature
DRV
CC
Voltage vs Temperature
DRV
CC
Dropout Voltage vs
Temperature
DRV
CC
Line Regulation
DRV
CC
Load Regulation
t
PLH
, t
PHL
vs Temperature
t
PLH
, t
PHL
vs DRV
CC
TEMPERATURE (C)
50
FB PIN UVLO THRESHOLD VOLTAGE (V)
25
4441 G04
25
0
50
1.20
1.00
0.96
0.88
0.92
1.16
1.12
1.08
0.84
1.04
75
100
125
V
IN
= 7.5V
RISING EDGE
FALLING EDGE
TEMPERATURE (C)
50
DRV
CC
VOLTAGE (V)
25
4441 G06
25
0
50
5.50
5.20
5.15
5.05
5.10
5.45
5.40
5.35
5.30
5.00
5.25
75
100
125
R1 = 330k
R2 = 100k
V
IN
= 25V
V
IN
= 7.5V
I
LOAD
(mA)
0
DRV
CC
(V)
60
4441 G07
20 40
80
5.50
5.20
5.15
5.05
5.10
5.45
5.40
5.35
5.30
5.00
5.25
100 120 140 160 180 200
V
IN
= 7.5V
T
A
= 25C
R1 = 330k
R2 = 100k
TEMPERATURE (C)
50
SD PIN INPUT THRESHOLD VOLTAGE (V)
25
4441 G05
25
0
50
0.80
0.50
0.45
0.35
0.40
0.75
0.70
0.65
0.60
0.30
0.55
75
100
125
RISING EDGE
FALLING EDGE
V
IN
= 7.5V
DRV
CC
= 5V
V
IN
(V)
0
DRV
CC
(V)
4441 G08
5.30
5.20
5.15
5.05
5.10
5.00
5.25
5
10
15
20
25
30
T
A
= 25C
R1 = 330k
R2 = 100k
TEMPERATURE (C)
50
DRV
CC
DROPOUT VOLTAGE (mV)
25
4441 G09
25
0
50
1000
400
300
100
200
900
800
700
600
0
500
75
100
125
V
IN
= 7.5V
DRV
CC
= 5V
I
LOAD
= 40mA
OUT Pin Pull-Down Resistance vs
Temperature
5
44411f
LTC4441/LTC4441-1
TYPICAL PERFOR A CE CHARACTERISTICS
U
W
RISE/FALL Time vs DRV
CC
RISE/FALL Time vs Temperature
RISE/FALL Time vs C
LOAD
Blanking Time vs Temperature
Blanking Time vs R
BLANK
V
IN
Standby Supply Current vs
Temperature
V
IN
Operating Supply Current vs
Temperature
t
PLH
, t
PHL
vs C
LOAD
C
LOAD
(nF)
0
15
5
10
20 25 30 35
45
40
50
t
PLH
, t
PHL
(ns)
4441 G13
100
90
40
30
10
20
0
80
70
60
50
T
A
= 25C
DRV
CC
= 5V
t
PHL
t
PLH
DRV
CC
(V)
4.5
RISE/FALL TIME (ns)
6.0
4441 G14
5.0 5.5
6.5
30
20
15
5
10
0
25
7.0 7.5 8.0 8.5 9.0
T
A
= 25C
C
LOAD
= 4.7nF
RISE TIME
FALL TIME
RISE/FALL TIME (ns)
4441 G15
30
20
15
5
10
0
25
DRV
CC
= 5V
C
LOAD
= 4.7nF
RISE TIME
FALL TIME
TEMPERATURE (C)
50
25
25
0
50
75
100
125
C
LOAD
(nF)
0
15
5
10
20 25 30 35
45
40
50
RISE/FALL TIME (ns)
4441 G16
200
180
80
60
20
40
0
160
140
120
100
T
A
= 25C
DRV
CC
= 5V
RISE TIME
FALL TIME
R
BLANK
(k)
0
BLANKING TIME (ns)
300
4441 G17
100
200
400
500
200
150
50
100
450
400
350
300
0
250
500
600
700
T
A
= 25C
DRV
CC
= 5V
LTC4441
BLANKING TIME (ns)
4441 G18
250
190
180
160
170
240
230
220
210
150
200
TEMPERATURE (C)
50
25
25
0
50
75
100
125
V
IN
= 7.5V
DRV
CC
= 5V
LTC4441
TEMPERATURE (C)
50
V
IN
SUPPLY CURRENT (
A)
25
4441 G19
25
0
50
500
200
150
50
100
450
400
350
300
0
250
75
100
125
EN = 5V
IN = 0V
V
IN
= 7.5V
V
IN
= 25V
TEMPERATURE (C)
50
V
IN
SUPPLY CURRENT (
A)
25
4441 G20
25
0
50
15
7
6
4
5
13
11
14
12
10
9
3
8
75
100
125
EN = 0V
IN = 0V
V
IN
= 7.5V
V
IN
= 25V
LTC4441/LTC4441-1
44411f
6
U
U
U
PI FU CTIO S
PGND (Pin 1/Pin 1): Driver Ground. Connect the DRV
CC
bypass capacitor directly to this pin, as close as possible
to the IC. In addition, connect the PGND and SGND pins
together close to the IC, and then connect this node to the
source of the power MOSFET (or current sense resistor)
with as short and wide a PCB trace as possible.
BLANK (Pin 2/NA): Current Sense Blanking Output. Use
this pin to assert a blanking time in the power MOSFET's
source current sense signal. The LTC4441 pulls this
open-drain output to SGND if the driver output is low. The
output becomes high impedance after a programmable
blanking time from the driver leading edge output. This
blanking time can be adjusted with the RBLANK pin.*
RBLANK (Pin 3/NA): Blanking Time Adjust Input. Connect
a resistor from this pin to SGND to set the blanking time.
A small resistor value gives a shorter delay. Leave this pin
floating if the BLANK pin is not used.*
SGND (Pin 4/Pin 2): Signal Ground. Ground return for the
DRV
CC
regulator and low power circuitry.
IN (Pin 5/Pin 3): Driver Logic Input. This is the non-
inverting driver input under normal operating conditions.
*Available only on the lo-lead version of the LTC4441.
EN/SHDN (Pin 6/Pin 4): Enable/Shutdown Input. Pulling
this pin above 1.21V allows the driver to switch. Pulling
this pin below 1.09V forces the driver output to go
low. Pulling this pin below 0.45V forces the LTC4441/
LTC4441-1 into shutdown mode; the DRV
CC
regulator
turns off and the supply current drops below 12A.
FB (Pin 7/Pin 5): DRV
CC
Regulator Feedback Input. Con-
nect this pin to the center tap of an external resistive
divider between DRV
CC
and SGND to program the DRV
CC
regulator output voltage. To ensure loop stability, use the
value of 330k for the top resistor, R1.
V
IN
(Pin 8/Pin 6): Main Supply Input. This pin powers the
DRV
CC
linear regulator. Bypass this pin to SGND with a 1F
ceramic, tantalum or other low ESR capacitor in close
proximity to the LTC4441/LTC4441-1.
DRV
CC
(Pin 9/Pin 7): Linear Regulator Output. This output
pin powers the driver and the control circuitry. Bypass this
pin to PGND using a 10F ceramic, low ESR (X5R or X7R)
capacitor in close proximity to the LTC4441/LTC4441-1.
OUT (Pin 10/Pin 8): Driver Output.
Exposed Pad (Pin 11/NA): Ground. The Exposed Pad
must be soldered to the PCB ground.
I
VIN
vs f
IN
I
VIN
vs C
LOAD
TYPICAL PERFOR A CE CHARACTERISTICS
U
W
f
IN
(kHz)
0
300
100 200
400 500 600 700
900
800
1000
I
VIN
(mA)
4441 G21
50
45
20
15
5
10
0
40
35
30
25
T
A
= 25C
C
LOAD
= 4.7nF
DRV
CC
= 5V
DRV
CC
= 9V
C
LOAD
(nF)
0
15
5
10
20 25 30 35
45
40
50
I
VIN
(mA)
4441 G22
60
50
20
10
0
40
30
T
A
= 25C
f
IN
= 100kHz
DRV
CC
= 5V
DRV
CC
= 9V
MSOP/SO-8
7
44411f
LTC4441/LTC4441-1
BLOCK DIAGRA
W
1.09V
IN
1.21V
+
UVLO
REG
EN
INB
1.21V
0.45V
SHUTDOWN
FB
V
IN
EN/SHDN
SGND
SHDN
THERMAL
SHUTDOWN
BIAS
LEADING
EDGE DELAY
Q1
P1
M
REG
DRV
CC
OUT
PGND
RBLANK
BLANK
4441 BD
N1
MB
FOR 10-LEAD
LTC4441
ONLY
APPLICATIO S I FOR ATIO
W
U
U
U
Overview
Power MOSFETs generally account for the majority of
power lost in a converter. It is important to choose not only
the type of MOSFET used, but also its gate drive circuitry.
The LTC4441/LTC4441-1 is designed to drive an N-chan-
nel power MOSFET with little efficiency loss. The LTC4441/
LTC4441-1 can deliver up to 6A of peak current using a
combined NPN Bipolar and MOSFET output stage. This
helps to turn the power MOSFET fully "on" or "off" with a
very brief transition region.
The LTC4441/LTC4441-1 includes a programmable linear
regulator to regulate the gate drive voltage. This regulator
provides the flexibility to use either standard threshold or
logic level MOSFETs.
DRV
CC
Regulator
An internal, P-channel low dropout linear regulator pro-
vides the DRV
CC
supply to power the driver and the pre-
driver logic circuitry as shown in Figure 1. The regulator
output voltage can be programmed between 5V and 8V
with an external resistive divider between DRV
CC
and
SGND and a center tap connected to the FB pin. The
regulator needs an R1 value of around 330k to ensure loop
LTC4441/LTC4441-1
44411f
8
APPLICATIO S I FOR ATIO
W
U
U
U
stability; the value of R2 can be varied to achieve the
required DRV
CC
voltage:
R
k
DRV
V
CC
2
406
1 21
=
.
The DRV
CC
regulator can supply up to 100mA and is short-
circuit protected. The output must be bypassed to the
PGND pin in very close proximity to the IC pins with a
minimum of 10F ceramic, low ESR (X5R or X7R) capaci-
tor. Good bypassing is necessary as high transient supply
currents are required by the driver. If the input supply
voltage, V
IN
,
is close to the required gate drive voltage, this
regulator can be disabled by connecting the DRV
CC
and FB
pins to V
IN
.
The LTC4441/LTC4441-1 monitors the FB pin for DRV
CC
's
UVLO condition (UVLO in Figure 1). During power-up, the
driver output is held low until the DRV
CC
voltage reaches
90% of the programmed value. Thereafter, if the DRV
CC
voltage drops more than 20% below the programmed
value, the driver output is forced low.
Logic Input Stage
The LTC4441/LTC4441-1 driver employs TTL/CMOS com-
patible input thresholds that allow a low voltage digital
1.09V
OUT
C
VCC
4441 F01
1.21V
UVLO
DRIVER
ENABLE
DRIVER
M
REG
FB
R2
R1
330k
+
V
IN
DRV
CC
PGND
REG
LTC4441
Figure 1. DRV
CC
Regulator
signal to drive standard power MOSFETs. The LTC4441/
LTC4441-1 contains an internal voltage regulator that
biases the input buffer, allowing the input thresholds (V
IH
= 2.4V, V
IL
= 1.4V) to be independent of the programmed
driver supply, DRV
CC
, or the input supply, V
IN
. The 1V
hysteresis between V
IH
and V
IL
eliminates false triggering
due to noise during switching transitions. However, care
should be taken to isolate this pin from any noise pickup,
especially in high frequency, high voltage applications.
The LTC4441/LTC4441-1 input buffer has high input
impedance and draws negligible input current, simplifying
the drive circuitry required for the input. This input can
withstand voltages up to 15V above and below ground.
This makes the chip more tolerant to ringing on the input
digital signal caused by parasitic inductance.
Driver Output Stage
A simplified version of the LTC4441/LTC4441-1's driver
output stage is shown in Figure 2.
Q1
P1
DRV
CC
N1
N3
DRV
CC
LTC4441
PGND
OUT
C
GD
V
IN
POWER
MOSFET
4441 F02
LOAD
INDUCTOR
C
GS
N2
R
O
Figure 2. Driver Output Stage
The pull-up device is the combination of an NPN transis-
tor, Q1, and a P-channel MOSFET, P1. This provides both
the ability to swing to rail (DRV
CC
) and deliver large peak
charging currents.
The pull-down device is an N-channel MOSFET, N1, with
a typical on resistance of 0.35. The low impedance of N1
provides fast turn-off of the external power MOSFET and
holds the power MOSFET's gate low when its drain voltage
switches. When the power MOSFET's gate is pulled low
(gate shorted to source through N1) by the LTC4441/
LTC4441-1, its drain voltage is pulled high by its load (e.g.,
9
44411f
LTC4441/LTC4441-1
BLANK
SGND
RBLANK
POWER
MOSFET
LOAD
INDUCTOR
TO
SWITCHING
CONTROLLER'S
CURRENT
SENSE
INPUT
OUT
LTC4441
R4
V
IN
R3
4441 F03
SENSE
+
SENSE
KEEP THIS
TRACE SHORT
MB
DRIVER
LEADING
EDGE DELAY
R7
PGND
inductor or resistor). The slew rate of the drain voltage
causes current to flow to the MOSFET's gate through its
gate-to-drain capacitance. If the MOSFET driver does not
have sufficient sink current capability (low output imped-
ance), the current through the power MOSFET's C
GD
can
momentarily pull the gate high and turn the MOSFET
back on.
A similar situation occurs during power-up when V
IN
is
ramping up with the DRV
CC
regulator output still low. N1
is off and the driver output, OUT, may momentarily pull
high through the power MOSFET's C
GD
, turning on the
power MOSFET. The N-channel MOSFETs N2 and N3,
shown in Figure 2, prevent the driver output from going
high in this situation. If DRV
CC
is low, N3 is off. If OUT is
pulled high through the power MOSFET's C
GD
, the gate of
N2 gets pulled high through R
O
. This turns N2 on, which
then pulls OUT low. Once DRV
CC
is >1V, N3 turns on to
hold the N2 gate low, thus disabling N2.
The predriver that drives Q1, P1 and N1 uses an adaptive
method to minimize cross-conduction currents. This is
done with a 5ns nonoverlapping transition time. N1 is fully
turned off before Q1 is turned on and vice-versa using this
5ns buffer time. This minimizes any cross-conduction
currents while Q1 and N1 are switching on and off without
affecting their rise and fall times.
Thermal Shutdown
The LTC4441/LTC4441-1 has a thermal detector that
disables the DRV
CC
regulator and pulls the driver output
low when activated. If the junction temperature exceeds
150C, the driver pull-up devices, Q1 and P1, turn off while
the pull-down device, N1, turns on briskly for 200ns to
quickly pull the output low. The thermal shutdown circuit
has 20C of hysteresis.
Enable/Shutdown Input
The EN/SHDN pin serves two functions. Pulling this pin
below 0.45V forces the LTC4441/LTC4441-1 into shut-
down mode. In shutdown mode, the internal circuitry and
the DRV
CC
regulator are off and the supply current drops
to <12A. If the input voltage is between 0.45V and 1.21V,
the DRV
CC
regulator and internal circuit power up but the
driver output stays low. If the input goes above 1.21V, the
driver starts switching according to the input logic signal.
The driver enable comparator has a small hysteresis of
120mV.
Blanking
In some switcher applications, a current sense resistor is
placed between the low side power MOSFET's source
terminal and ground to sense the current in the MOSFET.
With this configuration, the switching controller must
incorporate some timing interval to blank the ringing on
the current sense signal immediately after the MOSFET is
turned on. This ringing is caused by the parasitic induc-
tance and capacitance of the PCB trace and the MOSFET.
The duration of the ringing is thus dependent on the PCB
layout and the components used and can be longer than
the blanking interval provided by the controller.
The 10-Lead LTC4441 includes an open-drain output that
can be used to extend this blanking interval. The 8-Lead
LTC4441-1 does not have this blanking function. Figure 3
shows the BLANK pin connection. The BLANK pin is
connected directly to the switching controller's SENSE
+
input. Figure 4 shows the blanking waveforms. If the
driver input is low, the external power MOSFET is off and
MB turns on to hold SENSE
+
low. If the driver input goes
high, the power MOSFET turns on after the driver's propa-
gation delay. MB remains on, attenuating the ringing seen
by the controller's SENSE
+
input. After the programmed
blanking time, MB turns off to enable the current sense
APPLICATIO S I FOR ATIO
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Figure 3. Blanking Circuit
LTC4441/LTC4441-1
44411f
10
signal. MB is designed to turn on and turn off at a
controlled slew rate. This is to prevent the gate switching
noise from coupling into the current sense signal.
The blanking interval can be adjusted using resistor R7
connected to the RBLANK pin. A small resistance value
gives a shorter interval with a default minimum of 75ns.
The value of the resistor R4 and the on-resistance of MB
(typically 11) form a resistive divider attenuating the
ringing. R4 needs to be large for effective blanking, but not
so large as to cause delay to the sense signal. A resistance
value of 1k to 10k is recommended.
For optimum performance, the LTC4441/LTC4441-1
should be placed as close as possible to the power
MOSFET and current sense resistor, R3.
Power Dissipation
To ensure proper operation and long-term reliability, the
LTC4441/LTC4441-1 must not operate beyond its maxi-
mum temperature rating. The junction temperature can be
calculated by:
I
Q(TOT)
= I
Q
+ f Q
G
P
D
= V
IN
(I
Q
+ f Q
G
)
T
J
= T
A
+ P
D
JA
APPLICATIO S I FOR ATIO
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BLANKING TIME
IN
OUT
MB GATE
BLANK/SENSE
+
4441 F04
POWER
MOSFET's
CURRENT
POWER MOSFET's
SOURCE TERMINAL
Figure 4. Blanking Waveforms
where:
I
Q
= LTC4441/LTC4441-1 static quiescent current, typi-
cally 250A
f = Logic input switching frequency
Q
G
= Power MOSFET total gate charge at corresponding
V
GS
voltage equal to DRV
CC
V
IN
= LTC4441/LTC4441-1 input supply voltage
T
J
= Junction temperature
T
A
= Ambient temperature
JA
= Junction-to-ambient thermal resistance. The
10-pin MSOP package has a thermal resistance of
JA
= 38C/W.
The total supply current, I
Q(TOT)
, consists of the LTC4441/
LTC4441-1's static quiescent current, I
Q
, and the current
required to drive the gate of the power MOSFET, with the
latter usually much higher than the former. The dissipated
power, P
D
, includes the efficiency loss of the DRV
CC
regulator. With a programmed DRV
CC
, a high V
IN
results
in higher efficiency loss.
As an example, consider an application with V
IN
= 12V. The
switching frequency is 300kHz and the maximum ambient
temperature is 70C. The power MOSFET chosen is three
pieces of IRFB31N20D, which has a maximum R
DS(ON)
of
82m (at room temperature) and a typical total gate
charge of 70nC (the temperature coefficient of the gate
charge is low).
I
Q(TOT)
= 500A + 210nC 300kHz = 63.5mA
P
IC
= 12V 63.5mA = 0.762W
T
J
= 70C + 38C/W 0.762W = 99C
This demonstrates how significant the gate charge cur-
rent can be when compared to the LTC4441/LTC4441-1's
static quiescent current. To prevent the maximum junc-
tion temperature from being exceeded, the input supply
current must be checked when switching at high V
IN
. A
tradeoff between the operating frequency and the size of
the power MOSFET may be necessary to maintain a
reliable LTC4441/LTC4441-1 junction temperature. Prior
to lowering the operating frequency, however, be sure to
11
44411f
LTC4441/LTC4441-1
check with power MOSFET manufacturers for their
innovations on low Q
G
, low R
DS(ON)
devices. Power
MOSFET manufacturing technologies are continually im-
proving, with newer and better performing devices being
introduced.
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC4441/LTC4441-1:
A. Mount the bypass capacitors as close as possible
between the DRV
CC
and PGND pins and between the V
IN
and SGND pins. The PCB trace loop areas should be
tightened as much as possible to reduce inductance.
B. Use a low inductance, low impedance ground plane to
reduce any ground drop. Remember that the LTC4441/
LTC4441-1 switches 6A peak current and any significant
ground drop will degrade signal integrity.
APPLICATIO S I FOR ATIO
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C. Keep the PCB ground trace between the LTC4441/
LTC4441-1 ground pins (PGND and SGND) and the exter-
nal current sense resistor as short and wide as possible.
D. Plan the ground routing carefully. Know where the large
load switching current paths are. Maintain separate ground
return paths for the input pin and output pin to avoid
sharing small-signal ground with large load ground re-
turn. Terminate these two ground traces only at the GND
pin of the driver (STAR network).
E. Keep the copper trace between the driver output pin and
the load short and wide.
F. Place the small-signal components away from the high
frequency switching nodes. These components include
the resistive networks connected to the FB, RBLANK and
EN/SHDN pins.
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PACKAGE DESCRIPTIO
MSE Package
10-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1663)
MSOP (MSE) 0603
0.53 0.152
(.021 .006)
SEATING
PLANE
0.18
(.007)
1.10
(.043)
MAX
0.17 0.27
(.007 .011)
TYP
0.127 0.076
(.005 .003)
0.86
(.034)
REF
0.50
(.0197)
BSC
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
0.254
(.010)
0 6 TYP
DETAIL "A"
DETAIL "A"
GAUGE PLANE
10
1
5.23
(.206)
MIN
3.20 3.45
(.126 .136)
0.889 0.127
(.035 .005)
RECOMMENDED SOLDER PAD LAYOUT
0.305 0.038
(.0120 .0015)
TYP
2.083 0.102
(.082 .004)
2.794 0.102
(.110 .004)
0.50
(.0197)
BSC
BOTTOM VIEW OF
EXPOSED PAD OPTION
1.83 0.102
(.072 .004)
2.06 0.102
(.081 .004)
1 2 3 4 5
4.90 0.152
(.193 .006)
0.497 0.076
(.0196 .003)
REF
8
9
10
7 6
3.00 0.102
(.118 .004)
(NOTE 3)
3.00 0.102
(.118 .004)
(NOTE 4)
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
LTC4441/LTC4441-1
44411f
12
S8 Package
8-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610)
LINEAR TECHNOLOGY CORPORATION 2004
LT/TP 1104 1K PRINTED IN THE USA
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
FAX: (408) 434-0507
www.linear.com
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PACKAGE DESCRIPTIO
PART NUMBER
DESCRIPTION
COMMENTS
LTC1154
High Side Micropower MOSFET Driver
Internal Charge Pump, 4.5V to 48V Supply Range
LTC1155
Dual Micropower High/Low Side Driver
Internal Charge Pump, 4.5V to 18V Supply Range
LT
1161
Quad Protected High Side MOSFET Driver
8V to 48V Supply Range, t
ON
= 200ms, t
OFF
= 28ms
LTC1163
Triple 1.8V to 6V High Side MOSFET Driver
1.8V to 48V Supply Range, t
ON
= 95ms, t
OFF
= 45ms
LTC1693
High Speed Single/Dual N-Channel MOSFET Driver
CMOS Compatible Input, V
CC
Range: 4.5V to 12V
LTC3900
Synchronous Rectifier Driver for Forward Converter
Pulse Transformer Synchronization Input
LTC3901
Secondary Side Synchronous Driver for Push-Pull and
Gate Drive Transformer Synchronous Input
Full-Bridge Converter
LTC4440
High Speed, High Voltage, High Side Gate Driver
Wide Operating V
IN
Range: Up to 80V DC, 100V Transient
RELATED PARTS
.016 .050
(0.406 1.270)
.010 .020
(0.254 0.508)
45
0 8 TYP
.008 .010
(0.203 0.254)
SO8 0303
.053 .069
(1.346 1.752)
.014 .019
(0.355 0.483)
TYP
.004 .010
(0.101 0.254)
.050
(1.270)
BSC
1
2
3
4
.150 .157
(3.810 3.988)
NOTE 3
8
7
6
5
.189 .197
(4.801 5.004)
NOTE 3
.228 .244
(5.791 6.197)
.245
MIN
.160 .005
RECOMMENDED SOLDER PAD LAYOUT
.045 .005
.050 BSC
.030 .005
TYP
INCHES
(MILLIMETERS)
NOTE:
1. DIMENSIONS IN
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
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