DEVICES INCORPORATED
Multiplier-Accumulators
03/29/2000LDS.10/2009-L
1
LMA 1009/2009
12 x 12-bit Multiplier-Accumulator
u
u
u
u
u
20 ns Multiply-Accumulate Time
u
u
u
u
u Low Power CMOS Technology
u
u
u
u
u Replaces Fairchild TDC1009/
TMC2009
u
u
u
u
u Two's Complement or Unsigned
Operands
u
u
u
u
u Accumulator Performs Preload,
Accumulate, and Subtract
u
u
u
u
u Three-State Outputs
u
u
u
u
u 68-pin PLCC, J-Lead
FEATURES
DESCRIPTION
LMA1009/2009
12 x 12-bit Multiplier-Accumulator
DEVICES INCORPORATED
The LMA1009 and LMA2009 are high-
speed, low power 12-bit multiplier-accu-
mulators. They are pin-for-pin equiva-
lent to the TRW TDC1009/TMC2009
multiplier-accumulators. The LMA1009
and LMA2009 are functionally identical;
they differ only in packaging. Full ambi-
ent temperature range operation is
achieved by the use of advanced CMOS
technology.
The LMA1009/2009 produces the 24-bit
product of two 12-bit numbers. The
results of a series of multiplications may
be accumulated to form the sum of prod-
ucts. Accumulation is performed to
27-bit precision with the multiplier prod-
uct sign extended as appropriate.
Data present at the A and B input regis-
ters is latched on the rising edges of
CLK A and CLK B respectively. RND,
TC, ACC, and SUB controls are latched
on the rising edge of the logical OR of
CLK A and CLK B. TC specifies the input
as two's complement
(TC HIGH) or unsigned magnitude
(TC LOW). RND, when HIGH, adds `1'
to the most significant bit position of the
least significant half of the product. Sub-
sequent truncation of the 12 least signifi-
cant bits produces a result correctly
rounded to 12-bit precision.
The ACC and SUB inputs control accu-
mulator operation. ACC HIGH results in
addition of the multiplier product and
the accumulator contents, with the result
stored in the accumulator register on the
rising edge of CLK R. ACC and SUB
HIGH results in subtraction of the accu-
mulator contents from the multiplier
product, with the result stored in the
accumulator register. With ACC LOW
and SUB LOW, no accumulation occurs
and the next product is loaded directly
into the accumulator register. ACC LOW
and SUB HIGH is undefined.
The LMA1009/2009 output register (ac-
cumulator register) is divided into three
independently controlled sections. The
least significant result (LSR) and most
significant result (MSR) registers are 12
bits in length. The extended result regis-
ter (XTR) is 3 bits long.
Each output register has an independ-
ent output enable control. In addition
to providing control of the three-state
output buffers, when OEX, OEM, or
OEL are HIGH and PREL is HIGH, data
can be preloaded via the bidirectional
output pins into the respective output
registers. Data present on the output
pins is latched on the rising edge of
CLK R. The interrelation of PREL and
the enable controls is summarized in
Table 1.
LMA1009/2009 B
LOCK
D
IAGRAM
ACC
A REGISTER
B REGISTER
REGISTER
REGISTER
CLK A
CLK B
RND
12
12
24
A
11-0
R
23-12
12
B
11-0
R + A
R A
PASS R
LEM
LEL
LEX
R
11-0
12
R
26-24
3
27
PRELOAD
CONTROL
LOGIC
3
CLK R
ACCUMULATOR
TC
SUB
R
A
OEL
OEX
OEM
PREL
LEL
LEX
LEM
OEL
OEX
OEM
OEX
OEM
OEL
3
27
3
12
12
DEVICES INCORPORATED
Multiplier-Accumulators
03/29/2000LDS.10/2009-L
2
LMA 1009/2009
12 x 12-bit Multiplier-Accumulator
T
ABLE
1. P
RELOAD
T
RUTH
T
ABLE
PREL = Preload data to appropriate register
OUT = Register available on output pins
Z
= High impedance state
PREL OEX
OEM
OEL
XTR
MSR LSR
L
L
L
L
OUT
OUT
OUT
L
L
L
H
OUT
OUT
Z
L
L
H
L
OUT
Z
OUT
L
L
H
H
OUT
Z
Z
L
H
L
L
Z
OUT
OUT
L
H
L
H
Z
OUT
Z
L
H
H
L
Z
Z
OUT
L
H
H
H
Z
Z
Z
H
L
L
L
Z
Z
Z
H
L
L
H
Z
Z
PREL
H
L
H
L
Z
PREL
Z
H
L
H
H
Z
PREL PREL
H
H
L
L
PREL
Z
Z
H
H
L
H
PREL
Z
PREL
H
H
H
L
PREL PREL
Z
H
H
H
H
PREL PREL PREL
F
IGURE
1
A
.
I
NPUT
F
ORMATS
11 10 9
2
1
0
2
0
(Sign)
2
1
2
2
2
9
2
10
2
11
11 10 9
2
1
0
2
0
(Sign)
2
1
2
2
2
9
2
10
2
11
Fractional Two's Complement (TC = 1)
11 10 9
2
1
0
2
11
(Sign)
2
10
2
9
2
2
2
1
2
0
11 10 9
2
1
0
2
11
(Sign)
2
10
2
9
2
2
2
1
2
0
Integer Two's Complement (TC = 1)
11 10 9
2
1
0
2
1
2
2
2
3
2
10
2
11
2
12
11 10 9
2
1
0
2
1
2
2
2
3
2
10
2
11
2
12
Unsigned Fractional (TC = 0)
11 10 9
2
1
0
2
11
2
10
2
9
2
2
2
1
2
0
11 10 9
2
1
0
2
11
2
10
2
9
2
2
2
1
2
0
Unsigned Integer (TC = 0)
A
IN
B
IN
F
IGURE
1
B
.
O
UTPUT
F
ORMATS
23 22 21
14 13 12
2
1
2
0
2
1
2
8
2
9
2
10
26 25 24
2
4
(Sign)
2
3
2
2
Fractional Two's Complement
Integer Two's Complement
Unsigned Fractional
Unsigned Integer
MSR
LSR
23 22 21
14 13 12
2
23
2
22
2
21
2
14
2
13
2
12
23 22 21
14 13 12
2
1
2
2
2
3
2
10
2
11
2
12
23 22 21
14 13 12
2
23
2
22
2
21
2
14
2
13
2
12
11 10 9
2
1
0
2
11
2
12
2
13
2
20
2
21
2
22
XTR
26 25 24
2
26
(Sign)
2
25
2
24
11 10 9
2
1
0
2
11
2
10
2
9
2
2
2
1
2
0
26 25 24
2
2
2
1
2
0
11 10 9
2
1
0
2
13
2
14
2
15
2
22
2
23
2
24
26 25 24
2
26
2
25
2
24
11 10 9
2
1
0
2
11
2
10
2
9
2
2
2
1
2
0
DEVICES INCORPORATED
Multiplier-Accumulators
03/29/2000LDS.10/2009-L
3
LMA 1009/2009
12 x 12-bit Multiplier-Accumulator
Symbol
Parameter
Test Condition
Min
Typ
Max
Unit
V
OH
Output High Voltage
V
CC
= Min., I
OH
= 2.0 mA
2.4
V
V
OL
Output Low Voltage
V
CC
= Min., I
OL
= 8.0 mA
0.5
V
V
IH
Input High Voltage
2.0
V
CC
V
V
IL
Input Low Voltage
(Note 3)
0.0
0.8
V
I
IX
Input Current
Ground
V
IN
V
CC
(Note 12)
20
A
I
OZ
Output Leakage Current
Ground
V
OUT
V
CC
(Note 12)
20
A
I
CC1
V
CC
Current, Dynamic
(Notes 5, 6)
12
25
mA
I
CC2
V
CC
Current, Quiescent
(Note 7)
1.0
mA
Storage temperature ........................................................................................................... 65C to +150C
Operating ambient temperature ........................................................................................... 55C to +125C
V
CC
supply voltage with respect to ground ............................................................................ 0.5 V to +7.0 V
Input signal with respect to ground ........................................................................................ 3.0 V to +7.0 V
Signal applied to high impedance output ............................................................................... 3.0 V to +7.0 V
Output current into low outputs ............................................................................................................. 25 mA
Latchup current ............................................................................................................................... > 400 mA
M
AXIMUM
R
ATINGS
Above which useful life may be impaired (Notes 1, 2, 3, 8)
O
PERATING
C
ONDITIONS
To meet specified electrical and switching characteristics
E
LECTRICAL
C
HARACTERISTICS
Over Operating Conditions (Note 4)
Mode
Temperature Range (Ambient)
Supply
Voltage
Active Operation, Commercial
0C to +70C
4.75 V
V
CC
5.25 V
Active Operation, Military
55C to +125C
4.50 V
V
CC
5.50 V
DEVICES INCORPORATED
Multiplier-Accumulators
03/29/2000LDS.10/2009-L
4
LMA 1009/2009
12 x 12-bit Multiplier-Accumulator
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LMA1009/2009
95*
65*
55*
25*
Symbol
Parameter
Min
Max
Min
Max
Min
Max
Min
Max
t
MC
Clocked Multiply Time
95
65
55
25
t
PW
Clock Pulse Width
20
20
15
10
t
S
Input Register Setup Time
20
20
15
12
t
H
Input Register Hold Time
2
2
2
2
t
SP
Preload Setup Time
20
20
15
12
t
HP
Preload Hold Time
2
2
2
2
t
D
Output Delay
35
30
25
20
t
ENA
Three-State Output Enable Delay
(Note 11)
35
35
30
20
t
DIS
Three-State Output Disable Delay
(Note 11)
30
30
30
20
LMA1009/2009
75*
55*
45
20
Symbol
Parameter
Min
Max
Min
Max
Min
Max
Min
Max
t
MC
Clocked Multiply Time
75
55
45
20
t
PW
Clock Pulse Width
15
15
15
8
t
S
Input Register Setup Time
15
15
12
10
t
H
Input Register Hold Time
2
2
2
2
t
SP
Preload Setup Time
15
15
12
10
t
HP
Preload Hold Time
2
2
2
2
t
D
Output Delay
30
25
25
18
t
ENA
Three-State Output Enable Delay
(Note 11)
30
30
25
18
t
DIS
Three-State Output Disable Delay
(Note 11)
25
25
25
18
C
OMMERCIAL
O
PERATING
R
ANGE
(0C to +70C)
Notes 9, 10 (ns)
SWITCHING CHARACTERISTICS
M
ILITARY
O
PERATING
R
ANGE
(55C to +125C)
Notes 9, 10 (ns)
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*D
ISCONTINUED
S
PEED
G
RADE
S
WITCHING
W
AVEFORMS
HIGH IMPEDANCE
A
11-0
B
11-0
t
ENA
t
DIS
t
MC
t
H
t
S
CLK A
CLK B
CLK R
OE*
t
SP
OUTPUT
PRELOAD
t
HP
R
26-0
PREL
t
PW
t
PW
t
PW
t
D
*includes OEX, OEM, OEL
DEVICES INCORPORATED
Multiplier-Accumulators
03/29/2000LDS.10/2009-L
5
LMA 1009/2009
12 x 12-bit Multiplier-Accumulator
1. Maximum Ratings indicate stress
specifications only. Functional oper-
ation of these products at values beyond
those indicated in the Operating Condi-
tions table is not implied. Exposure to
maximum rating conditions for ex-
tended periods may affect reliability.
2. The products described by this spec-
ification include internal circuitry de-
signed to protect the chip from damag-
ing substrate injection currents and ac-
cumulations of static charge. Neverthe-
less, conventional precautions should
be observed during storage, handling,
and use of these circuits in order to
avoid exposure to excessive electrical
stress values.
3. This device provides hard clamping of
transient undershoot and overshoot. In-
put levels below ground or above V
CC
will be clamped beginning at 0.6 V and
V
CC
+ 0.6 V. The device can withstand
indefinite operation with inputs in the
range of 0.5 V to +7.0 V. Device opera-
tion will not be adversely affected, how-
ever, input current levels will be well in
excess of 100 mA.
4. Actual test conditions may vary from
those designated but operation is guar-
anteed as specified.
5. Supply current for a given applica-
tion can be accurately approximated by:
where
N = total number of device outputs
C = capacitive load per output
V = supply voltage
F = clock frequency
6. Tested with all outputs changing ev-
ery cycle and no load, at a 5 MHz clock
rate.
7. Tested with all inputs within 0.1 V of
V
CC
or Ground, no load.
8. These parameters are guaranteed
but not 100% tested.
NCV F
4
2
NOTES
9. AC specifications are tested with
input transition times less than 3 ns,
output reference levels of 1.5 V (except
t
DIS
test), and input levels of nominally
0 to 3.0 V. Output loading may be a
resistive divider which provides for
specified I
OH
and I
OL
at an output
voltage of V
OH
min and V
OL
max
respectively. Alternatively, a diode
bridge with upper and lower current
sources of I
OH
and I
OL
respectively,
and a balancing voltage of 1.5 V may be
used. Parasitic capacitance is 30 pF
minimum, and may be distributed.
This device has high-speed outputs ca-
pable of large instantaneous current
pulses and fast turn-on/turn-off times.
As a result, care must be exercised in the
testing of this device. The following
measures are recommended:
a. A 0.1 F ceramic capacitor should be
installed between V
CC
and Ground
leads as close to the Device Under Test
(DUT) as possible. Similar capacitors
should be installed between device V
CC
and the tester common, and device
ground and tester common.
b. Ground and V
CC
supply planes
must be brought directly to the DUT
socket or contactor fingers.
c. Input voltages should be adjusted to
compensate for inductive ground and V
CC
noise to maintain required DUT input
levels relative to the DUT ground pin.
10. Each parameter is shown as a min-
imum or maximum value. Input re-
quirements are specified from the point
of view of the external system driving
the chip. Setup time, for example, is
specified as a minimum since the exter-
nal system must supply at least that
much time to meet the worst-case re-
quirements of all parts. Responses from
the internal circuitry are specified from
the point of view of the device. Output
delay, for example, is specified as a
maximum since worst-case operation of
any device always provides data within
that time.
11. For the t
ENA
test, the transition is
measured to the 1.5 V crossing point
with datasheet loads. For the t
DIS
test,
the transition is measured to the
200mV level from the measured
steady-state output voltage with
10mA loads. The balancing volt-
age, V
TH
, is set at 3.5 V for Z-to-0
and 0-to-Z tests, and set at 0 V for Z-
to-1 and 1-to-Z tests.
12. These parameters are only tested at
the high temperature extreme, which is
the worst case for leakage current.
S1
I
OH
I
OL
V
TH
C
L
DUT
OE
0.2 V
t
DIS
t
ENA
0.2 V
1.5 V
1.5 V
3.5V Vth
1
Z
0
Z
Z
1
Z
0
1.5 V
1.5 V
0V Vth
V
OL
*
V
OH
*
V
OL
*
V
OH
*
Measured V
OL
with I
OH
= 10mA and I
OL
= 10mA
Measured V
OH
with I
OH
= 10mA and I
OL
= 10mA
F
IGURE
B. T
HRESHOLD
L
EVELS
F
IGURE
A. O
UTPUT
L
OADING
C
IRCUIT
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