Digitally Programmable Sensor Signal Amplifier
Preliminary Technical Data
AD8557
Rev.PrC
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FEATURES
Very low offset voltage: 10 V max over temperature
Very low input offset voltage drift: 50 nV/C max
High CMRR: 96 dB min
Digitally programmable gain and output offset voltage
Gain Range from 28 to 1300
Single-wire serial interface
Stable with any capacitive load
SOIC_N and LFCSP_VQ packages
2.7 V to 5.5 V operation
APPLICATIONS
Automotive sensors
Pressure and position sensors
Precision current sensing
Thermocouple amplifiers
Industrial weigh scales
Strain gages
FUNCTIONAL BLOCK DIAGRAM
Figure 1.
A3
A2
A4
VDD
VDD
DAC
VSS
VSS
VDD
VSS
VDD
VCLAMP
VPOS
VSS
VOUT
A1
VDD
VSS
VNEG
R1
R3
R2
R5
R7
P4
R4
R6
P3
P2
P1
AD8557
Preliminary Technical Data
Rev. PrC | Page 2 of 19
TABLE OF CONTENTS
Specifications..................................................................................... 4
Absolute Maximum Ratings....... Error! Bookmark not defined.
Thermal Resistance ................. Error! Bookmark not defined.
ESD Caution............................. Error! Bookmark not defined.
Pin Configurations and Function Descriptions ........................... 7
Typical Performance Characteristics ............................................. 8
Theory of Operation ...................................................................... 10
Gain Values ................................................................................. 11
Open Wire Fault Detection....................................................... 12
Shorted Wire Fault Detection................................................... 12
Floating VPOS, VNEG, or VCLAMP Fault Detection ......... 12
Device Programming................................................................. 12
Outline Dimensions ....................................................................... 17
Ordering Guide .......................................................................... 17
REVISION HISTORY
XXXX--Revision 0: Initial Version
Preliminary Technical Data
AD8557
Rev. PrC | Page 3 of 19
GENERAL DESCRIPTION
The AD8557 is a zero-drift, sensor signal amplifier with
digitally programmable gain and output offset. Designed to
easily and accurately convert variable pressure sensor and strain
bridge outputs to a well-defined output voltage range, the
AD8557 accurately amplifies many other differential or single-
ended sensor outputs. The AD8557 uses the ADI patented low
noise auto-zero and DigiTrim technologies to create an
incredibly accurate and flexible signal processing solution in a
very compact footprint.
Gain is digitally programmable in a wide range from 28 to 1300
through a serial data interface. Gain adjustment can be fully
simulated in-circuit and then permanently programmed with
reliable polyfuse technology. Output offset voltage is also
digitally programmable and is ratiometric to the supply voltage.
When used in conjunction with an ADC referenced to the same
supply, the system accuracy becomes immune to normal supply
voltage variations. Output offset voltage can be adjusted with a
resolution of better than 0.4% of the difference between VDD
and VSS. A lockout trim after gain and offset adjustment
further ensures field reliability.
In addition to extremely low input offset voltage and input
offset voltage drift and very high dc and ac CMRR, the AD8557
also includes a pull-up current source at the input pins and a
pull-down current source at the VCLAMP pin. Output
clamping set via an external reference voltage allows the
AD8557 to drive lower voltage ADCs safely and accurately.
When used in conjunction with an ADC referenced to the same
supply, the system accuracy becomes immune to normal supply
voltage variations. Output offset voltage can be adjusted with a
resolution of better than 0.4% of the difference between VDD
and VSS. A lockout trim after gain and offset adjustment
further ensures field reliability.
The AD8557 is fully specified from -40C to +125C.
Operating from single-supply voltages of 2.7 V to 5.5 V, the
AD8557 is offered in the 8-lead SOIC_N, and 4 mm 4 mm
16-lead LFCSP_VQ.
AD8557
Preliminary Technical Data
Rev. PrC | Page 4 of 19
SPECIFICATIONS
VDD = 5.0 V, VSS = 0.0 V, V
CM
= 2.5 V, V
O
= 2.5 V, Gain = 28, T
A
= 25C, unless otherwise specified.
Table 1. Electrical Specifications
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
INPUT STAGE
Input Offset Voltage
V
OS
-40C T
A
+125C
2
10
V
Input Offset Voltage Drift
T
C
V
OS
50
nV/C
Input Bias Current
I
B
-40C T
A
+125C
8
18
28
nA
Input Offset Current
I
OS
-40C T
A
+125C
1
8
nA
Input Voltage Range
0.8
3.6
V
Common-Mode Rejection Ratio
CMRR
V
CM
= 0.9 V to 3.6 V, A
V
= 28
70
82
dB
V
CM
= 0.9 V to 3.6 V, A
V
= 1300
96
112
dB
Linearity
V
O
= 0.2 V to 3.4 V
20
ppm
V
O
= 0.2 V to 4.8 V
1000
ppm
Differential Gain Accuracy
Second stage gain = 10 to 70
1.6
%
Differential Gain Accuracy
Second stage gain = 100 to 250
2.5
%
Differential Gain Temperature
Coefficient
Second stage gain = 10 to 250
15
40
ppm/C
DAC
Accuracy
Offset codes = 8 to 248
0.7
0.8
%
Ratiometricity
Offset codes = 8 to 248
50
ppm
Output Offset
Offset codes = 8 to 248
5
35
mV
Temperature Coefficient
20
80
ppm FS/C
VCLAMP
Input Bias Current
ICLAMP
100
166
330
nA
Input Voltage Range
1.25
2.64
V
OUTPUT STAGE
Short-Circuit Current
I
SC
Source
-40
-25
mA
I
SC
Sink
40
50
mA
Output Voltage, Low
V
OL
R
L
= 10 k to 5 V
30
mV
Output Voltage, High
V
OH
R
L
= 10 k to 0 V
4.94
V
POWER SUPPLY
Supply Current
I
SY
V
O
= 2.5 V, VPOS = VNEG = 2.5 V, VDAC code
= XXXX
1.8
mA
Power Supply Rejection Ratio
PSRR
125
dB
-40C T
A
+125C
105
DYNAMIC PERFORMANCE
Gain Bandwidth Product
GBP
First gain stage
2
MHz
Second gain stage
8
MHz
Settling Time
t
s
To 0.1%, 4 V output step
8
s
NOISE PERFORMANCE
Input Referred Noise
f = 1 kHz
32
nV/Hz
Low Frequency Noise
e
n
p-p
f = 0.1 Hz to 10 Hz
0.5
V p-p
Total Harmonic Distortion
THD
V
IN
= 16.75 mV rms, f = 1 kHz
-100
dB
DIGITAL INTERFACE
Input Current
2
A
DIGIN Pulse Width to Load 0
tw
0
0.05
10
s
DIGIN Pulse Width to Load 1
tw
1
50
s
Time Between Pulses at DIGIN
tw
s
10
s
DIGIN Low
1
V
DIGIN High
4
V
DIGOUT Logic 0
1
V
Preliminary Technical Data
AD8557
Rev. PrC | Page 5 of 19
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
DIGOUT Logic 1
4
V
VDD = 2.7 V, VSS = 0.0 V, V
CM
= 1.35 V, V
O
= 1.35 V, Gain = 28, T
A
= 25C, unless otherwise specified.
Table 2. Electrical Specifications
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
INPUT STAGE
Input Offset Voltage
V
OS
-40C T
A
+125C
2
10
V
Input Offset Voltage Drift
T
C
V
OS
50
nV/C
Input Bias Current
I
B
-40C T
A
+125C
8
18
28
nA
Input Offset Current
I
OS
-40C T
A
+125C
0.2
1
nA
Input Voltage Range
0.5
1.6
V
Common-Mode Rejection Ratio
CMRR
V
CM
= 0.9 V to 3.6 V, A
V
= 28
70
82
dB
V
CM
= 0.9 V to 3.6 V, A
V
= 1300
96
112
dB
Linearity
V
O
= 0.2 V to 3.4 V
20
ppm
V
O
= 0.2 V to 4.8 V
1000
ppm
Differential Gain Accuracy
Second stage gain = 10 to 250
1.6
%
Differential Gain Temperature
Coefficient
Second stage gain = 10 to 250
15
40
ppm/C
DAC
Accuracy
Offset codes = 8 to 248
0.7
0.8
%
Ratiometricity
Offset codes = 8 to 248
50
ppm
Output Offset
Offset codes = 8 to 248
5
35
mV
Temperature Coefficient
20
80
ppm FS/C
VCLAMP
Input Bias Current
ICLAMP
100
166
330
nA
Input Voltage Range
1.25
2.64
V
OUTPUT STAGE
Short-Circuit Current
I
SC
Source
-12
-7
mA
Sink
15
20
mA
Output Voltage, Low
V
OL
R
L
= 10 k to 5 V
30
mV
Output Voltage, High
V
OH
R
L
= 10 k to 0 V
2.64
V
POWER SUPPLY
Supply Current
I
SY
V
O
= 2.5 V, VPOS = VNEG = 2.5 V, VDAC code
= XXXX
1.8
mA
Power Supply Rejection Ratio
PSRR
125
dB
-40C T
A
+125C
105
DYNAMIC PERFORMANCE
Gain Bandwidth Product
GBP
First gain stage
2
MHz
Second gain stage
8
MHz
Settling Time
t
s
To 0.1%, 4 V output step
8
s
NOISE PERFORMANCE
Input Referred Noise
f = 1 kHz
32
nV/Hz
Low Frequency Noise
e
n
p-p
f = 0.1 Hz to 10 Hz
0.5
V p-p
Total Harmonic Distortion
THD
V
IN
= 16.75 mV rms, f = 1 kHz
-100
dB
DIGITAL INTERFACE
Input Current
2
A
DIGIN Pulse Width to Load 0
tw
0
0.05
10
s
DIGIN Pulse Width to Load 1
tw
1
50
s
Time Between Pulses at DIGIN
tw
s
10
s
DIGIN Low
1
V
DIGIN High
4
V
DIGOUT Logic 0
1
V
DIGOUT Logic 1
4
V
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