General Description
The MAX1146MAX1149 low-power, 14-bit, multichan-
nel, analog-to-digital converters (ADCs) feature an
internal track/hold (T/H), voltage reference, and clock.
The MAX1146/MAX1148 operate from a single +4.75V
to +5.25V supply, and the MAX1147/MAX1149 operate
from a single +2.7V to +3.6V supply. All analog inputs
are software configurable for unipolar/bipolar and sin-
gle-ended/differential operation.
The 4-wire serial interface connects directly to
SPITM/QSPITM/MICROWIRETM devices without external
logic. The serial strobe output (SSTRB) allows conve-
nient connection to digital signal processors. The
MAX1146MAX1149 use an internal clock or an exter-
nal serial-interface clock to perform successive-approx-
imation analog-to-digital conversions.
The MAX1146/MAX1148 include an internal +4.096V
reference, while the MAX1147/MAX1149 include an
internal +2.500V reference. All devices accept an exter-
nal reference from 1.5V to V
DD
.
The MAX1146MAX1149 provide a hardware shutdown
and two software power-down modes. Using the soft-
ware power-down modes allows the devices to be pow-
ered down between conversions. When powered down,
accessing the serial interface automatically powers up
the devices. The quick turn-on time allows power-down
between all conversions. This technique reduces sup-
ply current to under 120A for quick turn-on.
The MAX1146MAX1149 are available in a 20-pin
TSSOP package.
Applications
Portable Data Logging
Data Acquisition
Medical Instruments
Battery-Powered Instruments
Process Control
Features
8-Channel Single-Ended or 4-Channel Differential
Inputs (MAX1148/MAX1149)
4-Channel Single-Ended or 2-Channel Differential
Inputs (MAX1146/MAX1147)
Internal Multiplexer and T/H
Single-Supply Operation
4.75V to 5.25V Supply (MAX1146/MAX1148)
2.7V to 3.6V Supply (MAX1147/MAX1149)
Internal Reference
+4.096V (MAX1146/MAX1148)
+2.500V (MAX1147/MAX1149)
116ksps Sampling Rate
Low Power
1.1mA (116ksps)
120A (10ksps)
12A (1ksps)
300nA (Power-Down Mode)
SPI-/QSPI-/MICROWIRE Compatible
20-Pin TSSOP
MAX1146MAX1149
Multichannel, True-Differential,
Serial, 14-Bit ADCs
________________________________________________________________ Maxim Integrated Products
1
Ordering Information/Selector Guide
19-3488; Rev 1; 1/05
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
EVALUATION KIT
AVAILABLE
PART
TEMP
RANGE
PIN-
PACKAGE
INL
(LSB)
INPUT
CHANNELS
INTERNAL
REFERENCE (V)
MAX1146
BCUP
0
C to +70
C
20 TSSOP
2
4
+4.096
MAX1146BEUP
-40
C to +85
C
20 TSSOP
2
4
+4.096
MAX1147
BCUP
0
C to +70
C
20 TSSOP
2
4
+2.500
MAX1147BEUP
-40
C to +85
C
20 TSSOP
2
4
+2.500
MAX1148
BCUP
0
C to +70
C
20 TSSOP
2
8
+4.096
MAX1148BEUP
-40
C to +85
C
20 TSSOP
2
8
+4.096
MAX1149
BCUP
0
C to +70
C
20 TSSOP
2
8
+2.500
MAX1149BEUP
-40
C to +85
C
20 TSSOP
2
8
+2.500
SPI/QSPI are trademarks of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor Corp.
Pin Configurations appear at end of data sheet.
MAX1146MAX1149
Multichannel, True-Differential,
Serial, 14-Bit ADCs
2
_______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(V
DD
= 5V (MAX1146/MAX1148), V
DD
= 3.3V (MAX1147/MAX1149),
SHDN = V
DD
, V
COM
= 0, f
SCLK
= 2.1MHz, external clock (50%
duty cycle), 18 clocks/conversion (116ksps), V
REFADJ
= V
DD
, C
REF
= 2.2F, external +4.096V reference at REF (MAX1146/
MAX1148), external 2.500V reference at REF (MAX1147/MAX1149), T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at
T
A
= +25C.)
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
V
DD
to AGND, DGND ............................................-0.3V to +6.0V
AGND to DGND.....................................................-0.3V to +0.3V
CH0CH7, COM to AGND..........................-0.3V to (V
DD
+ 0.3V)
REF, REFADJ to AGND ..............................-0.3V to (V
DD
+ 0.3V)
Digital Inputs to DGND...............................-0.3V to (V
DD
+ 0.3V)
Digital Outputs to DGND ............................-0.3V to (V
DD
+ 0.3V)
Digital Output Sink Current .................................................25mA
Continuous Power Dissipation (T
A
= +70C)
20 TSSOP (derate 10.9mW/C above +70C) .............879mW
Operating Temperature Ranges
MAX114_ BC_ _ ..................................................0C to +70C
MAX114_ BE_ _ ...............................................-40C to +85C
Storage Temperature Range .............................-60C to +150C
Lead Temperature (soldering, 10s) .................................+300C
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DC ACCURACY (Note 1)
Resolution
14
Bits
Relative Accuracy (Note 2)
INL
0.7
2
LSB
Differential Nonlinearity
DNL
No missing codes over temperature
-1.0
0.5
+1.5
LSB
Offset Error
10
LSB
Offset Temperature Coefficient
0.3
ppm/C
Gain Error
(Note 3)
20
LSB
Gain Temperature Coefficient
0.8
ppm/C
Channel-to-Channel Offset
Matching
1
LSB
Channel-to-Channel Gain
Matching
1
LSB
DYNAMIC SPECIFICATIONS (1kHz sine-wave input, 2.5VP-P, full-scale analog input, 116ksps, 2.1MHz external clock)
Signal-to-Noise Plus Distortion
Ratio
SINAD
77
81
dB
Total Harmonic Distortion
THD
Up to the 5th harmonic
-96
-88
dB
Spurious-Free Dynamic Range
SFDR
84
98
dB
Channel-to-Channel Crosstalk
(Note 4)
-85
dB
Small-Signal Bandwidth
SSBW
-3dB point
3.0
MHz
Full-Power Bandwidth
FPBW
SINAD > 68dB
2.0
MHz
CONVERSION RATE
External clock, 2.1MHz 15 SCLK cycles
7.2
Conversion Time (Note 5)
tCONV
Internal clock
6
8
s
MAX1146MAX1149
Multichannel, True-Differential,
Serial, 14-Bit ADCs
_______________________________________________________________________________________
3
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= 5V (MAX1146/MAX1148), V
DD
= 3.3V (MAX1147/MAX1149),
SHDN = V
DD
, V
COM
= 0, f
SCLK
= 2.1MHz, external clock (50%
duty cycle), 18 clocks/conversion (116ksps), V
REFADJ
= V
DD
, C
REF
= 2.2F, external +4.096V reference at REF (MAX1146/
MAX1148), external 2.500V reference at REF (MAX1147/MAX1149), T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at
T
A
= +25C.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
18 clocks/conversion
60.3
Internal clock mode,
fSCLK = 2.1MHz
24 clocks/conversion
51.5
18 clocks/conversion
116.66
Throughput Rate
fSAMPLE
External clock mode,
fSCLK = 2.1MHz
24 clocks/conversion
87.50
ksps
T/H Acquisition Time
tACQ
1.4
s
Aperture Delay
tAD
20
ns
Aperture Jitter
tAJ
<50
ps
External clock mode
0.1
2.1
Serial Clock Frequency
fSCLK
Internal clock mode
0
2.1
MHz
Internal Clock Frequency
2.1
MHz
ANALOG INPUTS (CH0CH7, COM)
Unipolar, COM = 0
0
VREF
Input Voltage Range, Single-
Ended and Differential (Note 6)
Bipolar, COM = VREF / 2, single-ended
VREF / 2
V
Multiplexer Leakage Current
On/off-leakage current, VCH_ = 0 to VDD
0.01
1
A
Input Capacitance
18
pF
INTERNAL REFERENCE (C
REF
= 2.2F, C
REFADJ
= 0.01F)
MAX1147/MAX1149, T
A
= +25C
2.480
2.500
2.520
REF Output Voltage
V
REF
MAX1146/MAX1148, T
A
= +25C
4.076
4.096
4.116
V
REF Short-Circuit Current
I
REFSC
REF = DGND
20
mA
MAX114_ BC _ _
30
50
V
REF
Tempco (Note 7)
MAX114_ BE _ _
40
60
ppm/C
Load Regulation
0 to 0.2mA output load (Note 8)
2.0
mV
Capacitive Bypass at REF
2
F
Capacitive Bypass at REFADJ
0.01
F
REFADJ Output Voltage
1.250
V
REFADJ Input Range
18
mV
REFADJ Logic High
Pull REFADJ high to disable the internal
bandgap reference and reference buffer
V
DD
-
0.25V
V
MAX1147/MAX1149
2.000
Reference Buffer Voltage Gain
MAX1146/MAX1148
3.277
V/V
MAX1146MAX1149
Multichannel, True-Differential,
Serial, 14-Bit ADCs
4
_______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= 5V (MAX1146/MAX1148), V
DD
= 3.3V (MAX1147/MAX1149),
SHDN = V
DD
, V
COM
= 0, f
SCLK
= 2.1MHz, external clock (50%
duty cycle), 18 clocks/conversion (116ksps), V
REFADJ
= V
DD
, C
REF
= 2.2F, external +4.096V reference at REF (MAX1146/
MAX1148), external 2.500V reference at REF (MAX1147/MAX1149), T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at
T
A
= +25C.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
EXTERNAL REFERENCE AT REF
REF Input Voltage Range
V
REF
1.5
V
DD
+
50mV
V
125
450
REF Input Current
I
REF
Shutdown
0.01
10
A
REF Input Resistance
6
8
k
DIGITAL INPUTS (DIN, SCLK,
CS
,
SHDN
)
V
DD
< 3.6V
2.0
Input High Voltage
V
IH
V
DD
> 3.6V
3.0
V
Input Low Voltage
V
IL
0.8
V
Input Hysteresis
V
HYST
0.2
V
Input Leakage
I
IN
1
A
Input Capacitance
C
IN
10
pF
DIGITAL OUTPUT (DOUT, SSTRB)
Output-Voltage Low
V
OL
I
SINK
= 2mA
0.4
V
Output-Voltage High
V
OH
I
SOURCE
= 2mA
V
DD
- 0.5
V
Tri-State Leakage Current
I
L
CS = V
DD
10
A
Tri-State Output Capacitance
C
OUT
CS = V
DD
10
pF
POWER REQUIREMENTS
MAX1147/MAX1149
2.7
3.6
Positive Supply Voltage
V
DD
MAX1146/MAX1148
4.75
5.25
V
116ksps
1.1
1.5
10ksps
0.12
External
reference
1ksps
0.012
mA
Supply Current (Note 8)
I
DD
Normal
operation, full-
scale input
Internal reference at
116ksps
1.9
2.4
mA
Fast power-down
120
Full power-down
0.3
Shutdown Supply Current
(Note 8)
SHDN = DGND
0.3
10
A
Power-Supply Rejection (Note 9)
PSR
External reference
0.2
mV
MAX1146MAX1149
Multichannel, True-Differential,
Serial, 14-Bit ADCs
_______________________________________________________________________________________
5
Note 1:
Tested at V
DD
= 3.0V (MAX1147/MAX1149) or 5.0V(MAX1146/MAX1148); V
COM
= 0; unipolar single-ended input mode.
Note 2:
Relative accuracy is the deviation of the analog value at any code from its theoretical value after the full-scale range has
been calibrated.
Note 3:
Offset nulled. Measured with external reference.
Note 4:
"On" channel grounded; full-scale 1kHz sine wave applied to all "off" channels.
Note 5:
Conversion time defined as the number of clock cycles multiplied by the clock period; clock has 50% duty cycle. (See
Figures 811.)
Note 6:
The common-mode range for the analog inputs is from AGND to V
DD
.
Note 7:
Digital inputs equal V
DD
or DGND.
Note 8:
External load should not change during conversion for specified accuracy.
Note 9:
Measured as (V
FS
x 3.6V) - (V
FS
x 2.7V) for the MAX1147/MAX1149 and (V
FS
x 5.25V) - (V
FS
x 4.75V) for the
MAX1146/MAX1148. V
DD
= 3.6V to 2.7V for MAX1147/MAX1149 and V
DD
= 5.25V to 4.75V for the MAX1146/MAX1148.
TIMING CHARACTERISTICS
(V
DD
= 4.75V to 5.25V (MAX1146/MAX1148), V
DD
= 2.7V to 3.6V (MAX1147/MAX1149),
SHDN = V
DD
, V
COM
= 0, f
SCLK
= 2.1MHz,
external clock (50% duty cycle), 18 clocks/conversion (116ksps), V
REFADJ
= V
DD
, C
REF
= 2.2F, external +4.096V reference at REF
for the MAX1146/MAX1148, external 2.500V reference at REF for the MAX1147/MAX1149, T
A
= T
MIN
to T
MAX
, unless otherwise noted.
Typical values are at T
A
= +25C.) (Figures 1, 2, and 3)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DIN to SCLK Setup Time
t
DS
50
ns
DIN to SCLK Hold Time
t
DH
0
ns
SCLK Fall to Output Data Valid
t
DOV
C
LOAD
= 50pF
10
80
ns
CS Fall to DOUT Enable
t
DOE
C
LOAD
= 50pF
120
ns
CS Rise to DOUT Disable
t
DOD
C
LOAD
= 50pF
120
ns
SHDN Rise CS Fall to SCLK Rise
Time
t
CSS
50
ns
SHDN Rise CS Fall to SCLK Rise
Hold Time
t
CSH
50
ns
External clock mode
0.1
2.1
SCLK Clock Frequency
f
SCLK
Internal clock mode
0
2.1
MHz
SCLK Pulse-Width High
t
CH
Internal clock mode
100
ns
SCLK Pulse-Width Low
t
CL
Internal clock mode
100
ns
CS Fall to SSTRB Output Enable
t
STE
External clock mode only
120
ns
CS Rise to SSTRB Output Disable
t
STD
External clock mode only
120
ns
SSTRB Rise to SCLK Rise
t
SCK
Internal clock mode only
0
ns
SCLK Fall to SSTRB Edge
t
SCST
80
ns
CS Pulse Width
t
CSW
100
ns
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