19-1190; Rev 0; 3/97
_______________General Description
The MAX1161 10-bit, monolithic analog-to-digital con-
verter (ADC) is capable of 40Msps minimum word
rates. An on-board track/hold ensures excellent dynam-
ic performance without the need for external compo-
nents. A 5pF input capacitance minimizes drive
requirement problems.
Inputs and outputs are TTL compatible. An overrange
output is provided to indicate overflow conditions.
Output data format is straight binary. Power dissipation
is low at only 1W with +5V and -5.2V power-supply volt-
ages. The MAX1161 also accepts wide, 2V input volt-
ages.
The MAX1161 is available in 28-pin DIP and SO pack-
ages in the commercial temperature range.
________________________Applications
Medical Imaging
Professional Video
Radar Receivers
Instrumentation
Digital Communications
____________________________Features
o
Monolithic 40Msps Converter
o
On-Chip Track/Hold
o
Bipolar, 2V Analog Input
o
57dB SNR at 3.58MHz Input
o
5pF Input Capacitance
o
TTL Outputs
MAX1161
10-Bit, 40Msps, TTL-Output ADC
________________________________________________________________
Maxim Integrated Products
1
For the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800
PART
MAX1161ACPI
MAX1161BCPI
MAX1161ACWI
0C to +70C
0C to +70C
0C to +70C
TEMP. RANGE
PIN-PACKAGE
28 Wide Plastic DIP
28 Wide Plastic DIP
28 SO
MAX1161BCWI
0C to +70C
28 SO
______________Ordering Information
________________Functional Diagram
COARSE
ADC
T/H
AMPLIFIER
BANK
SUCCESSIVE INTERPOLATION
STAGE i
SUCCESSIVE INTERPOLATION
STAGE i + 1
SUCCESSIVE INTERPOLATION
STAGE N
ANALOG
PRESCALER
ANALOG
INPUT
4
10
DIGITAL
OUTPUT
DECODING NETWORK
.
.
.
.
__________________Pin Configuration
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
DIP/SO
DV
CC
V
EE
AGND
V
CC
VFB
VSB
VRM
VIN
VST
VFT
V
CC
AGND
V
EE
CLK
DGND
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
DGND
DV
CC
MAX1161
TOP VIEW
TOP VIEW
EVALUATION KIT
AVAILABLE
MAX1161
10-Bit, 40Msps, TTL-Output ADC
2
_______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(V
CC
= +5.0V, V
EE
= -5.2V, DV
CC
= +5.0V, V
IN
= 2.0V, VSB = -2.0V, VST = +2.0V, f
CLK
= 40MHz, 50% clock duty cycle,
T
A
= T
MIN
to T
MAX
, unless otherwise noted.)
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
V
CC
........................................................................................+6V
V
EE
..........................................................................................-6V
Analog Input.......................................................VFB
VIN
VFT
VFT
,
VFB ...........................................................................3V, -3V
Reference-Ladder Current..................................................12mA
CLK Input...............................................................................V
CC
Digital Outputs.....................................................30mA to -30mA
Continuous Power Dissipation (T
A
= +70C)
Plastic DIP ........................................................................1.14W
SO .........................................................................................1W
Operating Temperature Range...............................0C to +70C
Junction Temperature ......................................................+150C
Storage Temperature Range .............................-65C to +150C
Lead Temperature (soldering, 10sec). ............................+300C
V
V
V
I
VI
V
I
VI
V
VI
VI
VI
V
VI
VI
V
VI
LSB
VI
TEST
LEVEL
ns
12
T
A
= +25C
Acquisition Time
ps-RMS
5
T
A
= +25C
Aperture Jitter Time
ns
14
18
T
A
= +25C
Output Delay
Clock
Cycle
1
Pipeline Delay (Latency)
ns
20
Overvoltage Recovery Time
MHz
40
Maximum Conversion Rate
/C
0.8
Reference-Ladder
Tempco
500
800
Reference-Ladder
Resistance
MHz
120
3dB small signal
Input Bandwidth
pF
5
Input Capacitance
k
75
300
T
A
= -55C to +125C
Input Resistance
LSB
0.5
Differential Nonlinearity
LSB
1.0
Bits
10
Resolution
Integral Nonlinearity
k
100
300
Input Resistance
A
75
T
A
= -55C to +125C
Input Bias Current
A
30
60
V
IN
= 0V
Input Bias Current
V
2.0
Input Voltage Range
Guaranteed
No Missing Codes
2.0
Positive Full-Scale Error
2.0
V
LSB
2.0
UNITS
MAX1161A
MIN
TYP
MAX
CONDITIONS
PARAMETER
12
5
14
18
1
20
40
0.8
500
800
120
5
75
300
0.75
1.5
10
100
300
75
30
60
2.0
Guaranteed
Negative Full-Scale Error
2.0
MAX1161B
MIN
TYP
MAX
V
ns
1
T
A
= +25C
Aperture Delay Time
1
DC ACCURACY
(full scale, 250kHz sample rate, T
A
= +25C)
ANALOG INPUT
REFERENCE INPUT
TIMING CHARACTERISTICS
MAX1161
10-Bit, 40Msps, TTL-Output ADC
_______________________________________________________________________________________
3
ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= +5.0V, V
EE
= -5.2V, DV
CC
= +5.0V, V
IN
= 2.0V, VSB = -2.0V, VST = +2.0V, f
CLK
= 40MHz, 50% clock duty cycle,
T
A
= T
MIN
to T
MAX
, unless otherwise noted.)
T
A
= +25C
T
A
= 0C to +70C,
T
A
= -25C to +85C
f
IN
= 1MHz
52
54
50
52
T
A
= +25C
53
55
T
A
= 0C to +70C,
T
A
= -25C to +85C
IV
55
57
I
f
IN
= 10.0MHz
f
IN
= 3.58MHz
f
IN
= 1MHz
MAX1161B
MIN
TYP
MAX
8.2
8.2
6.9
Effective Number of Bits
(ENOB)
7.3
Bits
PARAMETER
CONDITIONS
MAX1161A
MIN
TYP
MAX
UNITS
8.7
8.7
TEST
LEVEL
T
A
= +25C
T
A
= 0C to +70C,
T
A
= -25C to +85C
f
IN
= 3.58MHz
52
54
50
52
f
IN
= 1MHz
53
55
52
54
IV
55
57
I
T
A
= +25C
T
A
= 0C to +70C,
T
A
= -25C to +85C
f
IN
= 10.0MHz
46
48
43
45
Signal-to-Noise Ratio
(without harmonics)
(SNR)
45
47
dB
IV
48
50
I
49
51
51
53
IV
54
56
I
T
A
= +25C
T
A
= 0C to +70C,
T
A
= -25C to +85C
f
IN
= 3.58MHz
52
54
49
51
51
53
IV
54
56
I
T
A
= +25C
T
A
= 0C to +70C,
T
A
= -25C to +85C
f
IN
= 10.0MHz
43
45
41
44
Total Harmonic Distortion
(THD)
45
47
dB
IV
46
48
I
T
A
= +25C
T
A
= 0C to +70C,
T
A
= -25C to +85C
f
IN
= 1MHz
49
51
46
49
IV
52
54
I
T
A
= +25C
T
A
= 0C to +70C,
T
A
= -25C to +85C
f
IN
= 3.58MHz
49
51
46
49
IV
52
54
I
T
A
= +25C
T
A
= 0C to +70C,
T
A
= -25C to +85C
f
IN
= 10.0MHz
41
43
40
Signal-to-Noise and
Distortion Ratio
(SINAD)
43
dB
IV
44
46
I
T
A
= +25C
67
67
V
f
IN
= 3.58MHz,
4.35MHz
f
IN
= 1MHz
0.2
V
0.2
Degrees
dB
Differential Phase
Spurious-Free
Dynamic Range (SFDR)
T
A
= +25C
f
IN
= 3.58MHz,
4.35MHz
0.5
V
0.7
%
Differential Gain
DYNAMIC PERFORMANCE
T
A
= +25C
MAX1161
10-Bit, 40Msps, TTL-Output ADC
4
_______________________________________________________________________________________
V
V
2.4
4.5
Logic 1 Voltage
2.4
4.0
IV
A
0
5
20
T
A
= +25C
Maximum Input
Current Low
0
5
20
V
V
0.8
Logic 0 Voltage
0.8
Pulse Width High (CLK)
ns
10
300
IV
10
300
Maximum Input
Current High
Pulse Width Low (CLK)
A
ns
10
IV
10
IV
0
5
20
0
5
20
T
A
= +25C
TEST
LEVEL
UNITS
MAX1161A
MIN
TYP
MAX
CONDITIONS
PARAMETER
MAX1161B
MIN
TYP
MAX
Logic 1 Voltage
V
2.4
IV
2.4
Logic 0 Voltage
V
0.6
IV
0.6
LSB
4.75
5.0
5.25
IV
4.75
5.0
5.25
DV
CC
W
4.75
5.25
IV
4.75
5.25
V
CC
Power Dissipation
1.0
1.3
VI
1.0
1.3
Voltages
-4.95 -5.2
-5.45
IV
-4.95 -5.2
-5.45
-V
EE
Power-Supply Rejection
V
1.0
V
1.0
V
CC
= 5V 0.25V, V
EE
= -5.2V 0.25V
ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= +5.0V, V
EE
= -5.2V, DV
CC
= +5.0V, V
IN
= 2.0V, VSB = -2.0V, VST = +2.0V, f
CLK
= 40MHz, 50% clock duty cycle,
T
A
= T
MIN
to T
MAX
, unless otherwise noted.)
TEST LEVEL CODES
All electrical characteristics are subject to the following conditions:
All parameters having min/max specifications are guaranteed. The
Test Level column indicates the specific device testing actually per-
formed during production and Quality Assurance inspection. Any
blank section in the data column indicates that the specification is
not tested at the specified condition.
Unless otherwise noted, all tests are pulsed; therefore, Tj = TC = TA.
TEST LEVEL
I
II
III
IV
V
VI
TEST PROCEDURE
100% production tested at the specified temperature.
100% production tested at TA = +25C, and sample tested at the specified
temperatures.
QA sample tested only at the specified temperatures.
Parameter is guaranteed (but not tested) by design and characterization data.
Parameter is a typical value for information purposes only.
100% production tested at TA = +25C. Parameter is guaranteed over specified
temperature range.
40
55
VI
40
55
DI
CC
118
145
VI
118
145
I
CC
Currents
40
57
VI
40
57
-I
EE
mA
DIGITAL INPUTS
DIGITAL OUTPUTS
POWER-SUPPLY REQUIREMENTS
______________________________________________________________Pin Description
NAME
1, 13
DGND
2
D0
PIN
12
D10
15
CLK
310
FUNCTION
16, 27
V
EE
Digital Ground
D1D8
TTL Output (LSB)
TTL Outputs
11
D9
TTL Output (MSB)
14, 28
DV
CC
+5V Supply (digital)
TTL Output Overrange
Clock
-5.2V Supply (analog)
NAME
20
VST
19
PIN
VFT
21
18, 25
V
CC
VIN
FUNCTION
22
17, 26
AGND
VRM
23
VSB
Sense for Top of Reference Ladder
24
VFB
Force for Top of Reference Ladder
+5V Supply (analog)
Analog Input
Analog Ground
Middle of Voltage Reference Ladder
Sense for Bottom of Reference Ladder
Force for Bottom of Reference Ladder
MAX1161
10-Bit, 40Msps, TTL-Output ADC
_______________________________________________________________________________________
5
__________________________________________Typical Operating Characteristics
(T
A
= +25C, unless otherwise noted.)
80
20
1
10
100
TOTAL HARMONIC DISTORTION vs.
INPUT FREQUENCY
40
30
MAX1161-01
INPUT FREQUENCY (MHz)
THD (dB)
60
50
70
f
S
= 40Msps
80
20
1
10
100
SIGNAL-TO-NOISE AND DISTORTION
vs. INPUT FREQUENCY
40
30
MAX1161-03
INPUT FREQUENCY (MHz)
SINAD (dB)
60
50
70
f
S
= 40Msps
80
20
1
10
100
SNR, THD, SINAD vs.
SAMPLE RATE
40
30
MAX1161-04
SAMPLE RATE (Msps)
SNR, THD, SINAD (dB)
60
50
70
SINAD
SNR
f
IN
= 1MHz
THD
65
40
-25
50
75
0
25
SNR, THD, SINAD vs.
TEMPERATURE
50
45
MAX1161-06
TEMPERATURE (C)
SNR, THD, SINAD (dB)
60
55
f
S
= 40Msps
f
IN
= 1MHz
THD
SNR
SINAD
0
-120
0
6
8
10
2
4
SPECTRAL RESPONSE
-60
-90
MAX1161-05
INPUT FREQUENCY (MHz)
AMPLITUDE (dB)
-30
f
S
= 40Msps
f
IN
= 1MHz
80
20
1
10
100
SIGNAL-TO-NOISE vs.
INPUT FREQUENCY
40
30
MAX1161-02
INPUT FREQUENCY (MHz)
SNR (dB)
60
50
70
f
S
= 40Msps
_______________Detailed Description
The MAX1161 requires few external components to
achieve the stated operation and performance. Figure 2
shows the typical interface requirements when using the
MAX1161 in normal circuit operation. The following sec-
tion provides a description of the pin functions, and out-
lines critical performance criteria to consider for
achieving optimal device performance.
Power Supplies and Grounding
The MAX1161 requires -5.2V and +5V analog supply
voltages. The +5V supply is common to analog V
CC
and
digital DV
CC
. A ferrite bead in series with each supply
line reduces the transient noise injected into the analog
V
CC
. These beads should be connected as close to the
device as possible. The connection between the beads
and the MAX1161 should not be shared with any other
device. Bypass each power-supply pin as close to the
device as possible. Use 0.1F for V
EE
and V
CC
, and
0.01F for DV
CC
(chip capacitors are recommended).
The MAX1161 has two grounds: AGND and DGND.
These internal grounds are isolated on the device. Use
ground planes for optimum device performance.
Use DGND for the DV
CC
return path (typically 40mA)
and for the return path for all digital output logic inter-
faces. Separate AGND and DGND from each other,
connecting them together only through a ferrite bead at
the device.
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